WO2018068627A1 - Apparatus for chip testing and programming, and manufacturing method therefor - Google Patents

Apparatus for chip testing and programming, and manufacturing method therefor Download PDF

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Publication number
WO2018068627A1
WO2018068627A1 PCT/CN2017/103164 CN2017103164W WO2018068627A1 WO 2018068627 A1 WO2018068627 A1 WO 2018068627A1 CN 2017103164 W CN2017103164 W CN 2017103164W WO 2018068627 A1 WO2018068627 A1 WO 2018068627A1
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WIPO (PCT)
Prior art keywords
chip
pins
placement area
main board
positioning
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PCT/CN2017/103164
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French (fr)
Chinese (zh)
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肖敏
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肖敏
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Publication of WO2018068627A1 publication Critical patent/WO2018068627A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2884Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer

Definitions

  • Embodiments of the present disclosure relate to apparatus for chip testing and programming and methods of fabricating the same.
  • test bench or programming block of the chip is used extensively in the electronics industry.
  • the main purpose is to write software into a large number of chips, as well as software development and functional testing before plate making.
  • existing test or programming bases are more expensive.
  • the price of a programming base for a square flat package (QFP) chip is generally several hundred to several thousand dollars, which is too expensive for development, so there is no development process. Use a lot.
  • the present disclosure provides an apparatus for chip testing and programming and a method of fabricating the same that can simplify the manufacturing process, reduce cost, and enable the user to simply confirm whether the device is in good contact with the chip.
  • an apparatus for chip testing and programming including a motherboard on which a first placement area corresponding to a body of the chip, a plurality of tubes surrounding the first placement area and the chip are formed a plurality of first pins corresponding to the respective legs, a plurality of first contacts outside the first placement area, and a plurality of first wires, each of the first wires connecting a first pin and a first contact connection.
  • the plurality of pins of the chip are respectively in contact with the plurality of first pins.
  • the first placement area, the first lead, the first contact, and the first wire are formed on the first surface of the main board, and the second surface of the main board is further formed with a plurality of second pins, the plurality of The two pins respectively correspond to the plurality of pins of the chip, and each of the second pins is adjacent to but not in contact with the corresponding one of the first pins, And when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin, respectively.
  • a plurality of second contacts and a plurality of second wires are formed on the second surface of the main board opposite to the first surface outside the first placement area, and each of the second wires has a second contact and a second Pin connection.
  • the device further includes: a pressing plate, wherein the pressing plate is formed with at least two second positioning holes corresponding to the first positioning holes of the main board, and at least two A positioning pin for insertion into the first and second positioning holes.
  • the first positioning hole and the second positioning hole are respectively aligned, and inserted into the first and second positioning holes through the positioning pin to position the chip in the first placement region.
  • the platen is further formed with: a second placement area corresponding to the body of the chip, a plurality of third pins surrounding the second placement area and corresponding to the plurality of pins of the chip, and the second placement area And a plurality of third contacts, and a plurality of third wires, each of the third wires connecting a third pin to a third contact.
  • the plurality of pins of the chip are respectively in contact with the plurality of third pins.
  • the apparatus further includes: a fixing member that fixes the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
  • the second placement area is formed as a recess or opening capable of accommodating the chip.
  • the apparatus further includes a positioning plate formed with an opening capable of accommodating the chip, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board.
  • a positioning plate formed with an opening capable of accommodating the chip, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board.
  • a method of fabricating a device for chip testing and programming comprising providing a main board and forming on the main board: a first placement area corresponding to a body of the chip, surrounding the first placement area a plurality of first pins respectively corresponding to the plurality of pins of the chip, a plurality of first contacts outside the first placement area, and a plurality of first wires, each of the first wires will be a first pin Connected to a first contact.
  • the plurality of pins of the chip are respectively in contact with the plurality of first pins.
  • the manufacturing method further includes: forming a plurality of second pins on the first surface of the main board, the plurality of second pins respectively corresponding to the plurality of pins of the chip, each of the second pins and a corresponding one of the first pins is adjacent but not in contact, and when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin respectively; and is placed in the first place
  • a plurality of second contacts and a plurality of second wires are formed on the second surface of the main board opposite to the first surface outside the area. Each second wire connects a second contact to a second pin.
  • the manufacturing method further includes: forming at least two first positioning holes on the main board, providing a pressing plate, and forming at least two second positioning holes corresponding to the first positioning holes of the main board on the pressing plate, and providing at least two Locating pins for insertion into the first and second positioning holes.
  • the chip is placed on the first placement area of the main board and the platen is covered, the chip is positioned in the first placement area by the positioning pins being inserted into the first and second positioning holes on the platen and the main board.
  • the manufacturing method further includes: forming a second placement area corresponding to the body of the chip on the platen, and a plurality of third pins respectively surrounding the second placement area and corresponding to the plurality of pins of the chip, in the second A plurality of third contacts outside the placement area, and a plurality of third wires, each of the third wires connecting a third pin to a third contact.
  • the plurality of pins of the chip are respectively in contact with the plurality of third pins.
  • the manufacturing method further includes: providing a fixing member for fixing the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
  • the manufacturing method further includes: providing a positioning plate, and forming an opening capable of accommodating the chip on the positioning plate, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board.
  • the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
  • the above apparatus of the present disclosure has at least the following advantages compared to the existing programming base.
  • Each pin of the existing programming base is a precision gold-plated probe or spring piece.
  • the apparatus of the present disclosure can be fabricated using chemical etching techniques for printed circuit board (PCB) processing, once formed, regardless of the number of leads, processing costs can be maintained, and no precision processing equipment and processes are required.
  • PCB printed circuit board
  • the existing programming base requires a dedicated mold, and it is necessary to customize the precision mold and special materials for each chip, which is costly.
  • the device of the present disclosure uses common PCB processing technology, does not require special molds, and greatly reduces costs.
  • the factory needs special equipment and trained workers to assemble, no matter the initial investment and post-operation, can not avoid the cost of training.
  • the device of the present disclosure does not require complicated assembly equipment and well-trained workers, and can be assembled quickly by ordinary labor, without equipment investment, without training, and greatly reducing the cost.
  • the number of pins is large, and does not correspond to the chip pins, and it is difficult to confirm whether it is in good contact with the placed chip.
  • the device of the present disclosure can easily confirm whether it is in good contact with the placed chip by utilizing the pins and contacts on the main board and/or the platen.
  • FIG. 1 shows a schematic diagram of an apparatus for chip testing and programming in accordance with an embodiment of the present disclosure
  • Figure 2 shows a schematic diagram of chip mounting into a test and programming device
  • Figure 3 shows a schematic view of a test and programming device including a platen
  • Figure 4 shows a schematic diagram of chip mounting into a test and programming device
  • FIG. 5 shows a schematic view of a pressure plate according to another embodiment of the present disclosure
  • FIG. 6 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with an embodiment of the present disclosure
  • FIG. 7 shows a schematic diagram of a motherboard of a test and programming device in accordance with another embodiment of the present disclosure
  • Figure 8 is a schematic view showing the back side of the main board shown in Figure 7;
  • Figure 9 shows a schematic diagram of a test and programming device including a positioning plate
  • FIG. 10 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with another embodiment of the present disclosure.
  • FIG. 1 shows a schematic diagram of a device for chip testing and programming (hereinafter referred to as a test and programming device) in accordance with an embodiment of the present disclosure.
  • the test and programming apparatus includes a main board 1 on which a first placement area 10 corresponding to the body of the chip 2 is formed, for example, the shape and size of the area 10 correspond to the shape and size of the chip 2.
  • the chip 2 is a quad flat pack (QFP) chip, which is a 32-pin QFP chip as an example in the present disclosure.
  • QFP quad flat pack
  • the present disclosure is not limited to such a chip, but can be applied to chips of various packages.
  • a plurality of first pins 12 surrounding the first placement area 10 and corresponding to the plurality of pins of the chip 2, a plurality of first contacts 16 outside the first placement area 10, and A plurality of first wires 14, each of which connects a first pin 12 to a first contact 16.
  • the chip 2 When the chip 2 is placed on the first placement area 10, the plurality of pins of the chip are respectively in contact with the plurality of first pins 12, as shown in FIG. At this time, the chip 2 can be tested and programmed by being connected to the first contact 16.
  • the pin and the first contact 16 of the multimeter connection chip can be used to test the continuity, detecting whether the mounted chip is in good contact with the test and programming device.
  • the detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
  • Figure 3 shows a schematic view of a test and programming device comprising a pressure plate 3.
  • the test and programming apparatus further includes a pressure plate 3 and at least two positioning pins 4 for further positioning or fixing the chip 2.
  • at least two first positioning holes 18 are formed on the main board 1, for example, formed on the main board 1 outside the first placement area 10, and the two positioning holes 18 are located opposite to each other on the diagonal corners of the main board 1.
  • At least two second positioning holes 38 corresponding to the first positioning holes 18 of the main board 1 are formed on the pressure plate 3. Two positioning pins 4 are inserted into the first and second positioning holes to position the chip 2.
  • the present disclosure is not limited to this embodiment.
  • the chip 2 When the chip 2 is placed on the first placement area 10 of the main board 1 and the pressure plate 3 is covered, the first positioning hole 18 and the second positioning hole 38 are respectively aligned and inserted into the first and second positioning holes through the positioning pin 4.
  • the chip 2 is positioned in the first placement area 10.
  • the pressure plate 3 A recess or opening capable of accommodating the chip 2 can be formed, as shown in Fig. 4, the chip 2 is housed in the opening of the platen 2, which helps to further position the chip 2.
  • FIG. 5 shows a schematic view of a pressure plate in accordance with another embodiment of the present disclosure.
  • a second placement area 30 corresponding to the main body of the chip 2 is formed on the pressure plate 3', and a plurality of third pins 32 respectively surrounding the second placement area 30 and corresponding to the plurality of pins of the chip 2
  • the plurality of pins of the chip 2 are in contact with the plurality of third pins 32, respectively.
  • the second placement area 30 is shown in FIG.
  • the chip 2 can be first placed in the second placement area 30 of the pressure plate 3', then inserted into the positioning pin 4, and then the main board 1 is covered, so that the positioning pin 4 is inserted into the first and second positioning holes. Thereby the chip 2 is accurately mounted and positioned.
  • the test and programming apparatus may further include a fixing member that fixes the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
  • the fixing member can be, for example, a screw that is fixed by screwing into a corresponding screw hole on the main plate and the pressure plate.
  • the fastener may also be, for example, a clip that holds the main plate and the pressure plate.
  • the present disclosure is not limited to these examples, but any suitable fixing means may be utilized.
  • the test and programming device of Figure 6 includes a main board 1 and a pressure plate 3'.
  • the pins of the chip 2 should be in contact with the first pin 12 of the main board 1 and the third pin 32 of the press plate 3', respectively.
  • the multi-table is connected to the first contact 16 and the third contact 36 to test the continuity, and it is possible to detect whether the mounted chip is in good contact with the test and programming device.
  • the detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
  • FIG. 7 shows a schematic diagram of a motherboard 1' of a test and programming device in accordance with another embodiment of the present disclosure.
  • a first placement area 10' corresponding to the main body of the chip is formed on the main board 1' in FIG. 7, and a plurality of first pins 12' respectively surrounding the first placement area 10' and corresponding to the plurality of pins of the chip, a plurality of first contacts 16' outside the first placement area 10', and a plurality of first wires 14', each of the first wires 14' having a first pin 12' and a first contact 16 'connection.
  • the first placement area 10', the first lead 12', the first contact 16', and the first lead 14' are formed on the first surface of the main board 1', for example, for Place the front side of the chip.
  • a plurality of second pins 74 are further formed on the first surface of the main board 1'.
  • the plurality of second pins 74 also surround the first placement area 10', respectively corresponding to the plurality of pins of the chip, and each of the second leads
  • the foot 74 is adjacent to but not in contact with a corresponding one of the first pins 12', and each pin of the chip and the corresponding first pin 12' and the second lead when the chip is placed on the first placement area 10'
  • the feet 74 are in contact respectively.
  • a plurality of second contacts 72 and a plurality of second wires 70 are formed on the second surface (eg, the back surface) of the main board 1' opposite to the first surface outside the first placement area 10', as shown in the figure. As shown in FIG. 8, each of the second wires 70 connects a second contact 72 to a second pin 74.
  • a chip such as a quad flat no-lead package (QFN) can be placed using the main board 1' shown in Figs. 7 and 8, which is a 16-pin QFN chip as an example in the present disclosure.
  • the chip 2' can be placed on the first placement area 10' of the main board 1', and the pins of the chip 2' should be in good contact with the first pin 12' and the second pin 74 of the main board 1'. .
  • the multimeter to connect to the first contact 16' and the second contact 72 it is possible to detect whether the mounted chip is in good contact with the test and programming device.
  • the detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
  • the test and programming device may further include a positioning plate 5 formed with an opening capable of accommodating the chip, and at least two third portions corresponding to at least two first positioning holes of the main board Positioning holes.
  • a positioning plate 5 formed with an opening capable of accommodating the chip, and at least two third portions corresponding to at least two first positioning holes of the main board Positioning holes.
  • FIG. 10 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with another embodiment of the present disclosure.
  • the test and programming device of Fig. 10 includes a main board 1', a positioning plate 5, a pressure plate 3, and a screw 6 as a fixing member.
  • the chip 2' is placed on the first placement area 10' of the main board 1', then the positioning board 5 is placed, and the positioning pins are inserted.
  • the pressure plate 3 is covered so that the positioning pins are inserted into the corresponding positioning holes of the main plate 1', the positioning plate 5, and the pressure plate 3.
  • the first contact 16' and the second contact 72 are connected by a multimeter to test the on-off, thereby detecting whether the chip 2' is in good contact with the main board 1'.
  • the mounting of the chip and the detection and verification of the test and programming devices of the present disclosure are simple and straightforward compared to existing programming bases.
  • the existing programming block is constructed with a gold-plated precision flexible probe under each chip pin or
  • the spring piece is attached to the underside of the programming block, and a plurality of probes or spring pieces are precisely fixed to the programming housing, and then the chip is fixed to the probe or the spring piece by a mechanical structure.
  • This structure is not easy to use and it is not easy to detect and confirm whether it is in good contact.
  • the test and programming apparatus according to an embodiment of the present disclosure is convenient to use, and can intuitively and easily detect and confirm whether or not it is in good contact.
  • the manufacturing method includes: providing a main board, and forming a first placement area corresponding to the main body of the chip on the main board, and a plurality of first pins respectively surrounding the first placement area and corresponding to the plurality of pins of the chip, at the first a plurality of first contacts outside the placement area, and a plurality of first wires, each of the first wires connecting a first pin to a first contact.
  • the plurality of pins of the chip are respectively in contact with the plurality of first pins.
  • the first placement area, the first lead, the first contact, and the first wire are formed on the first surface of the main board
  • the manufacturing method further comprising: forming a plurality of second leads on the first surface of the main board a plurality of second pins respectively corresponding to the plurality of pins of the chip, each of the second pins being adjacent to but not in contact with the corresponding one of the first pins, and when the chip is placed on the first placement area, the chip
  • Each of the pins is in contact with the corresponding first pin and the second pin, respectively; and a plurality of second contacts and a plurality of second contacts are formed on the second surface of the main plate opposite to the first surface outside the first placement area
  • the second wire Each second wire connects a second contact to a second pin.
  • the manufacturing method further includes: forming at least two first positioning holes on the main board, providing a pressing plate, and forming at least two second positioning holes corresponding to the first positioning holes of the main board on the pressing plate, and providing at least two Locating pins for insertion into the first and second positioning holes.
  • the chip is placed on the first placement area of the main board and the platen is covered, the chip is positioned in the first placement area by the positioning pins being inserted into the first and second positioning holes on the platen and the main board.
  • the manufacturing method further includes: forming a second placement region corresponding to the body of the chip on the platen, a plurality of third pins surrounding the second placement region and corresponding to the plurality of pins of the chip, respectively a plurality of third contacts outside the second placement area, and a plurality of third wires, each of the third wires connecting a third pin to a third contact.
  • the plurality of pins of the chip are respectively in contact with the plurality of third pins.
  • the manufacturing method further includes: providing a fixing member for using the fixing member to sandwich the main plate and the pressing plate and the clamping member when the chip is placed on the first placement area of the main board and the pressing plate is covered The chip is fixed.
  • the manufacturing method further includes: providing a positioning plate, and forming an opening capable of accommodating the chip on the positioning plate, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board.
  • the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
  • the existing programming base has a gold-plated precision flexible probe or spring piece under each chip pin, which is connected under the programming seat; a plurality of probes or spring pieces are precisely fixed on the programming housing; The chip is fixed to the probe or spring piece by a mechanical structure.
  • the manufacturing method of the existing programming base includes: manufacturing a mold housing mold, producing a programming housing by an injection molding process, producing a probe, fixing the probe to the programming housing, and assembling the housing with special equipment. This structure is more complicated, and the manufacturing method requires special equipment and well-trained workers, which is costly.
  • the test and programming device of the present disclosure can adopt a PCB board process to manufacture the main board, the pressure plate and the positioning board at one time, and replace the probe with the contacts on the PCB board, forming one time, no matter how many pins The cost is fixed. In this way, the use of common PCB processing technology, no special molds, no complicated assembly equipment and well-trained workers, no equipment investment, no training, and greatly reduced costs.

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Abstract

An apparatus for chip testing and programming, and a manufacturing method therefor. The apparatus comprises a main board (1). The main board (1) is formed with a first placement region (10) corresponding to the main board (1) of a chip (2), a plurality of first pins (12) surrounding the first placement region (10) and respectively corresponding to a plurality of pins of the chip (2), a plurality of first contacts (16) outside the first placement region (10), and a plurality of first wires (14), wherein each of the first wires (14) connects one of the first pins (12) to one of the first contacts (16). When the chip (2) is placed on the first placement region (10), the plurality of pins of the chip are respectively in contact with the plurality of first pins (12). The apparatus and method can simplify a manufacturing process and reduce costs, and it is easy for a user to determine whether the apparatus is in good contact with a chip.

Description

用于芯片测试和编程的装置及其制造方法Device for chip testing and programming and method of manufacturing same
相关申请的引用Reference to related application
本申请要求于2016年10月12日递交的题为“用于芯片测试和编程的装置及其制造方法”的中国专利申请201610891906.6的优先权,其内容一并于此用作参考。The present application claims priority to Chinese Patent Application No. 201610891906.6, filed on Oct. 12,,,,,,,,,,,,,,,,,
技术领域Technical field
本公开实施例涉及用于芯片测试和编程的装置及其制造方法。Embodiments of the present disclosure relate to apparatus for chip testing and programming and methods of fabricating the same.
背景技术Background technique
芯片的测试座或编程座大量使用在电子工业中,主要用途是将软件写入大量的芯片中,以及在制版前进行软件开发和功能测试。但是现有的测试或编程座价格较高,例如针对方形扁平封装(QFP)芯片的编程座的价格一般在几百到上千元,对于开发而言成本太高,因此在开发过程中并没有大量使用。The test bench or programming block of the chip is used extensively in the electronics industry. The main purpose is to write software into a large number of chips, as well as software development and functional testing before plate making. However, existing test or programming bases are more expensive. For example, the price of a programming base for a square flat package (QFP) chip is generally several hundred to several thousand dollars, which is too expensive for development, so there is no development process. Use a lot.
现有编程座还有一个重要的缺点,也就是使用者无法确认,编程座是否和放入的芯片良好接触。An important disadvantage of the existing programming base is that the user cannot confirm whether the programming seat is in good contact with the placed chip.
发明内容Summary of the invention
本公开提供了用于芯片测试和编程的装置及其制造方法,能够简化制造过程,降低成本,并且使用者能够简单确认装置与芯片是否良好接触。The present disclosure provides an apparatus for chip testing and programming and a method of fabricating the same that can simplify the manufacturing process, reduce cost, and enable the user to simply confirm whether the device is in good contact with the chip.
根据本公开一方面,提供了一种用于芯片测试和编程的装置,包括主板,主板上形成有:与芯片的主体对应的第一放置区域,围绕第一放置区域并与芯片的多个管脚分别对应的多个第一引脚,在第一放置区域之外的多个第一触点,以及多条第一导线,每条第一导线将一个第一引脚与一个第一触点连接。当芯片放置在第一放置区域上时,芯片的多个管脚分别与多个第一引脚相接触。According to an aspect of the present disclosure, an apparatus for chip testing and programming is provided, including a motherboard on which a first placement area corresponding to a body of the chip, a plurality of tubes surrounding the first placement area and the chip are formed a plurality of first pins corresponding to the respective legs, a plurality of first contacts outside the first placement area, and a plurality of first wires, each of the first wires connecting a first pin and a first contact connection. When the chip is placed on the first placement area, the plurality of pins of the chip are respectively in contact with the plurality of first pins.
根据实施例,第一放置区域、第一引脚、第一触点和第一导线形成在主板的第一表面,在主板的第一表面上还形成有多个第二引脚,多个第二引脚与芯片的多个管脚分别对应,每一个第二引脚与相应的一个第一引脚邻近但不接触, 并且当芯片放置在第一放置区域上时,芯片的每个管脚与对应的第一引脚和第二引脚分别接触。在第一放置区域之外、主板的与第一表面相对的第二表面上形成有多个第二触点和多条第二导线,每条第二导线将一个第二触点与一个第二引脚连接。According to an embodiment, the first placement area, the first lead, the first contact, and the first wire are formed on the first surface of the main board, and the second surface of the main board is further formed with a plurality of second pins, the plurality of The two pins respectively correspond to the plurality of pins of the chip, and each of the second pins is adjacent to but not in contact with the corresponding one of the first pins, And when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin, respectively. A plurality of second contacts and a plurality of second wires are formed on the second surface of the main board opposite to the first surface outside the first placement area, and each of the second wires has a second contact and a second Pin connection.
根据实施例,主板上还形成有至少两个第一定位孔,所述装置还包括:压板,压板上形成有与主板的第一定位孔对应的至少两个第二定位孔,以及至少两个定位销,用于插入到第一和第二定位孔中。当芯片放置在主板的第一放置区域上并且盖上压板时,第一定位孔和第二定位孔分别对齐,并通过定位销插入到第一和第二定位孔,将芯片定位在第一放置区域。According to an embodiment, at least two first positioning holes are further formed on the main board, the device further includes: a pressing plate, wherein the pressing plate is formed with at least two second positioning holes corresponding to the first positioning holes of the main board, and at least two A positioning pin for insertion into the first and second positioning holes. When the chip is placed on the first placement area of the main board and the pressure plate is covered, the first positioning hole and the second positioning hole are respectively aligned, and inserted into the first and second positioning holes through the positioning pin to position the chip in the first placement region.
根据实施例,压板上还形成有:与芯片的主体对应的第二放置区域,围绕第二放置区域并与芯片的多个管脚分别对应的多个第三引脚,在第二放置区域之外的多个第三触点,以及多条第三导线,每条第三导线将一个第三引脚与一个第三触点连接。当芯片放置在第二放置区域上时,芯片的多个管脚分别与多个第三引脚相接触。According to an embodiment, the platen is further formed with: a second placement area corresponding to the body of the chip, a plurality of third pins surrounding the second placement area and corresponding to the plurality of pins of the chip, and the second placement area And a plurality of third contacts, and a plurality of third wires, each of the third wires connecting a third pin to a third contact. When the chip is placed on the second placement area, the plurality of pins of the chip are respectively in contact with the plurality of third pins.
根据实施例,所述装置还包括:固定件,当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的芯片固定。According to an embodiment, the apparatus further includes: a fixing member that fixes the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
根据实施例,第二放置区域形成为能够容纳芯片的凹入或开口。According to an embodiment, the second placement area is formed as a recess or opening capable of accommodating the chip.
根据实施例,所述装置还包括定位板,定位板上形成有能够容纳芯片的开口,以及与主板的至少两个第一定位孔对应的至少两个第三定位孔。当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。According to an embodiment, the apparatus further includes a positioning plate formed with an opening capable of accommodating the chip, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board. When the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
根据本公开另一方面,提供了一种用于芯片测试和编程的装置的制造方法,包括提供主板,并在主板上形成:与芯片的主体对应的第一放置区域,围绕第一放置区域并与芯片的多个管脚分别对应的多个第一引脚,在第一放置区域之外的多个第一触点,以及多条第一导线,每条第一导线将一个第一引脚与一个第一触点连接。当芯片放置在第一放置区域上时,芯片的多个管脚分别与多个第一引脚相接触。According to another aspect of the present disclosure, there is provided a method of fabricating a device for chip testing and programming, comprising providing a main board and forming on the main board: a first placement area corresponding to a body of the chip, surrounding the first placement area a plurality of first pins respectively corresponding to the plurality of pins of the chip, a plurality of first contacts outside the first placement area, and a plurality of first wires, each of the first wires will be a first pin Connected to a first contact. When the chip is placed on the first placement area, the plurality of pins of the chip are respectively in contact with the plurality of first pins.
根据实施例,第一放置区域、第一引脚、第一触点和第一导线形成在主板 的第一表面,所述制造方法还包括:在主板的第一表面上形成多个第二引脚,多个第二引脚与芯片的多个管脚分别对应,每一个第二引脚与相应的一个第一引脚邻近但不接触,并且当芯片放置在第一放置区域上时,芯片的每个管脚与对应的第一引脚和第二引脚分别接触;以及在第一放置区域之外、主板的与第一表面相对的第二表面上形成多个第二触点和多条第二导线。每条第二导线将一个第二触点与一个第二引脚连接。According to an embodiment, the first placement area, the first pin, the first contact, and the first wire are formed on the main board The first surface, the manufacturing method further includes: forming a plurality of second pins on the first surface of the main board, the plurality of second pins respectively corresponding to the plurality of pins of the chip, each of the second pins and a corresponding one of the first pins is adjacent but not in contact, and when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin respectively; and is placed in the first place A plurality of second contacts and a plurality of second wires are formed on the second surface of the main board opposite to the first surface outside the area. Each second wire connects a second contact to a second pin.
根据实施例,制造方法还包括:在主板上形成至少两个第一定位孔,提供压板,并在压板上形成与主板的第一定位孔对应的至少两个第二定位孔,以及提供至少两个定位销,用于插入到第一和第二定位孔中。当芯片放置在主板的第一放置区域上并且盖上压板时,通过定位销插入到压板和主板上的第一和第二定位孔,将芯片定位在第一放置区域。According to an embodiment, the manufacturing method further includes: forming at least two first positioning holes on the main board, providing a pressing plate, and forming at least two second positioning holes corresponding to the first positioning holes of the main board on the pressing plate, and providing at least two Locating pins for insertion into the first and second positioning holes. When the chip is placed on the first placement area of the main board and the platen is covered, the chip is positioned in the first placement area by the positioning pins being inserted into the first and second positioning holes on the platen and the main board.
根据实施例,制造方法还包括:在压板上形成与芯片的主体对应的第二放置区域,围绕第二放置区域并与芯片的多个管脚分别对应的多个第三引脚,在第二放置区域之外的多个第三触点,以及多条第三导线,每条第三导线将一个第三引脚与一个第三触点连接。当芯片放置在第二放置区域上时,芯片的多个管脚分别与多个第三引脚相接触。According to an embodiment, the manufacturing method further includes: forming a second placement area corresponding to the body of the chip on the platen, and a plurality of third pins respectively surrounding the second placement area and corresponding to the plurality of pins of the chip, in the second A plurality of third contacts outside the placement area, and a plurality of third wires, each of the third wires connecting a third pin to a third contact. When the chip is placed on the second placement area, the plurality of pins of the chip are respectively in contact with the plurality of third pins.
根据实施例,制造方法还包括:提供固定件,用于当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的芯片固定。According to an embodiment, the manufacturing method further includes: providing a fixing member for fixing the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
根据实施例,制造方法还包括:提供定位板,并在定位板上形成能够容纳芯片的开口、以及与主板的至少两个第一定位孔对应的至少两个第三定位孔。当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。According to an embodiment, the manufacturing method further includes: providing a positioning plate, and forming an opening capable of accommodating the chip on the positioning plate, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board. When the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
相比于现有编程座,本公开的上述装置至少具有如下优点。The above apparatus of the present disclosure has at least the following advantages compared to the existing programming base.
现有编程座的每一个引脚均为精密镀金探针或弹簧片,引脚越多,加工成本越大。本公开的装置可以使用印刷电路板(PCB)加工的化学腐蚀技术,一次成型,无论多少引脚,加工成本能够保持不变,并且无需精密加工设备和工艺。 Each pin of the existing programming base is a precision gold-plated probe or spring piece. The more pins, the higher the processing cost. The apparatus of the present disclosure can be fabricated using chemical etching techniques for printed circuit board (PCB) processing, once formed, regardless of the number of leads, processing costs can be maintained, and no precision processing equipment and processes are required.
现有编程座需要专用的模具,需要针对每种芯片,定制精密模具和特殊材料,成本很高。本公开的装置使用常用的PCB加工技术,不需要特殊模具,大幅度降低成本。The existing programming base requires a dedicated mold, and it is necessary to customize the precision mold and special materials for each chip, which is costly. The device of the present disclosure uses common PCB processing technology, does not require special molds, and greatly reduces costs.
对于现有编程座,在工厂需要专用设备和训练有素的工人组装,无论是前期投资和后期运营,都无法回避培训等成本。本公开的装置无需复杂的组装设备和训练有素的工人,普通人工就可以迅速组装,无需设备投资,无需培训,大大降低了成本。For the existing programming base, the factory needs special equipment and trained workers to assemble, no matter the initial investment and post-operation, can not avoid the cost of training. The device of the present disclosure does not require complicated assembly equipment and well-trained workers, and can be assembled quickly by ordinary labor, without equipment investment, without training, and greatly reducing the cost.
现有编程座中引脚数量较多,不与芯片管脚对应,难以确认是否与放入的芯片良好接触。本公开的装置可以利用主板和/或压板上的引脚和触点,容易地确认是否与放入的芯片良好接触。In the existing programming block, the number of pins is large, and does not correspond to the chip pins, and it is difficult to confirm whether it is in good contact with the placed chip. The device of the present disclosure can easily confirm whether it is in good contact with the placed chip by utilizing the pins and contacts on the main board and/or the platen.
附图说明DRAWINGS
从参考附图的实施例的以下描述,本公开的进一步特征和优点将变得清楚明白。Further features and advantages of the present disclosure will become apparent from the following description of the embodiments.
图1示出了根据本公开实施例的用于芯片测试和编程的装置的示意图;FIG. 1 shows a schematic diagram of an apparatus for chip testing and programming in accordance with an embodiment of the present disclosure;
图2示出了芯片安装到测试和编程装置中的示意图;Figure 2 shows a schematic diagram of chip mounting into a test and programming device;
图3示出了包括压板的测试和编程装置的示意图;Figure 3 shows a schematic view of a test and programming device including a platen;
图4示出了芯片安装到测试和编程装置中的示意图;Figure 4 shows a schematic diagram of chip mounting into a test and programming device;
图5示出了根据本公开另一实施例的压板的示意图;FIG. 5 shows a schematic view of a pressure plate according to another embodiment of the present disclosure; FIG.
图6示出了根据本公开实施例的确认安装的芯片与测试和编程装置否良好接触的示意图;6 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with an embodiment of the present disclosure;
图7示出了根据本公开另一实施例的测试和编程装置的主板的示意图;7 shows a schematic diagram of a motherboard of a test and programming device in accordance with another embodiment of the present disclosure;
图8示出了图7所示主板的背面的示意图;Figure 8 is a schematic view showing the back side of the main board shown in Figure 7;
图9示出了包括定位板的测试和编程装置的示意图;以及Figure 9 shows a schematic diagram of a test and programming device including a positioning plate;
图10示出了根据本公开另一实施例的确认安装的芯片与测试和编程装置否良好接触的示意图。FIG. 10 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with another embodiment of the present disclosure.
具体实施方式detailed description
在本公开中,各种实施例及其附图只是说明,不应该以任何方式解释为限 制公开的范围。本领域技术人员应理解,可以以任何适当配置或结构来实现本公开的原理。下文中,将参照附图描述本公开的示例性实施例。在以下描述中,将省略公知功能或配置的详细描述,原因在于其将不必要地混淆本公开的主旨。此外,本文使用的术语是根据本公开的功能定义的。因此,这些术语可以随用户或使用者的意图或实践而改变。因此,必须基于本文的描述来理解本文使用的术语。In the present disclosure, the various embodiments and the accompanying drawings are merely illustrative and should not be construed as limiting in any way. The scope of the disclosure. Those skilled in the art will appreciate that the principles of the present disclosure may be implemented in any suitable configuration or structure. Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings. In the following description, a detailed description of known functions or configurations will be omitted, as they will unnecessarily obscure the gist of the present disclosure. Moreover, the terms used herein are defined in accordance with the functionality of the present disclosure. Therefore, these terms may vary depending on the intention or practice of the user or the user. Therefore, the terms used herein must be understood based on the description herein.
图1示出了根据本公开实施例的用于芯片测试和编程的装置(下文简称测试和编程装置)的示意图。如图1所示,该测试和编程装置包括主板1,主板上形成有与芯片2的主体对应的第一放置区域10,例如区域10的形状和尺寸与芯片2的形状和尺寸对应。芯片2是方形扁平封装(QFP)的芯片,在本公开中作为示例,为32个管脚的QFP芯片。本公开不限于这种芯片,而是可以适用于各种封装的芯片。主板1上还形成有围绕第一放置区域10并与芯片2的多个管脚分别对应的多个第一引脚12,在第一放置区域10之外的多个第一触点16,以及多条第一导线14,每条第一导线14将一个第一引脚12与一个第一触点16连接。当芯片2放置在第一放置区域10上时,芯片的多个管脚分别与多个第一引脚12相接触,如图2所示。此时,可以通过连接到第一触点16对芯片2进行测试和编程。此外,可以利用例如万用表连接芯片的管脚和第一触点16来测试通断,检测安装的芯片与测试和编程装置否良好接触。相比于现有编程座,本公开的测试和编程装置的检测和确认方式简单易行。FIG. 1 shows a schematic diagram of a device for chip testing and programming (hereinafter referred to as a test and programming device) in accordance with an embodiment of the present disclosure. As shown in FIG. 1, the test and programming apparatus includes a main board 1 on which a first placement area 10 corresponding to the body of the chip 2 is formed, for example, the shape and size of the area 10 correspond to the shape and size of the chip 2. The chip 2 is a quad flat pack (QFP) chip, which is a 32-pin QFP chip as an example in the present disclosure. The present disclosure is not limited to such a chip, but can be applied to chips of various packages. Formed on the main board 1 with a plurality of first pins 12 surrounding the first placement area 10 and corresponding to the plurality of pins of the chip 2, a plurality of first contacts 16 outside the first placement area 10, and A plurality of first wires 14, each of which connects a first pin 12 to a first contact 16. When the chip 2 is placed on the first placement area 10, the plurality of pins of the chip are respectively in contact with the plurality of first pins 12, as shown in FIG. At this time, the chip 2 can be tested and programmed by being connected to the first contact 16. In addition, the pin and the first contact 16 of the multimeter connection chip can be used to test the continuity, detecting whether the mounted chip is in good contact with the test and programming device. The detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
图3示出了包括压板3的测试和编程装置的示意图。如图3所示,除了主板1,该测试和编程装置还包括压板3以及至少两个定位销4,用于进一步定位或固定芯片2。在该实施例中,主板1上形成有至少两个第一定位孔18,例如形成在主板1上第一放置区域10之外,两个定位孔18彼此相对地位于主板1的对角角落上。压板3上形成有与主板1的第一定位孔18对应的至少两个第二定位孔38。两个定位销4插入到第一和第二定位孔中,以定位芯片2。还可以采用其他形式的定位件,例如其他形状、其他数目的定位孔和定位销,本公开不限于该实施例。当芯片2放置在主板1的第一放置区域10上并且盖上压板3时,第一定位孔18和第二定位孔38分别对齐,并通过定位销4插入到第一和第二定位孔,将芯片2定位在第一放置区域10。根据实施例,压板3 上可以形成能够容纳芯片2的凹入或开口,如图4所示,芯片2被容纳在压板2的开口中,这样有助于进一步定位芯片2。Figure 3 shows a schematic view of a test and programming device comprising a pressure plate 3. As shown in FIG. 3, in addition to the main board 1, the test and programming apparatus further includes a pressure plate 3 and at least two positioning pins 4 for further positioning or fixing the chip 2. In this embodiment, at least two first positioning holes 18 are formed on the main board 1, for example, formed on the main board 1 outside the first placement area 10, and the two positioning holes 18 are located opposite to each other on the diagonal corners of the main board 1. . At least two second positioning holes 38 corresponding to the first positioning holes 18 of the main board 1 are formed on the pressure plate 3. Two positioning pins 4 are inserted into the first and second positioning holes to position the chip 2. Other forms of locating members, such as other shapes, other numbers of locating holes, and locating pins, may also be employed, and the present disclosure is not limited to this embodiment. When the chip 2 is placed on the first placement area 10 of the main board 1 and the pressure plate 3 is covered, the first positioning hole 18 and the second positioning hole 38 are respectively aligned and inserted into the first and second positioning holes through the positioning pin 4. The chip 2 is positioned in the first placement area 10. According to an embodiment, the pressure plate 3 A recess or opening capable of accommodating the chip 2 can be formed, as shown in Fig. 4, the chip 2 is housed in the opening of the platen 2, which helps to further position the chip 2.
图5示出了根据本公开另一实施例的压板的示意图。不同于压板3,压板3’上还形成有与芯片2的主体对应的第二放置区域30,围绕第二放置区域30并与芯片2的多个管脚分别对应的多个第三引脚32,在第二放置区域30之外的多个第三触点36,以及多条第三导线34,每条第三导线34将一个第三引脚32与一个第三触点36连接。当芯片2放置在第二放置区域30上时,芯片2的多个管脚分别与多个第三引脚32相接触。图5中示出了第二放置区域30形成为形状和尺寸与芯片2对应的、能够容纳芯片2的凹入或开口。当进行测试或编程时,可以先将芯片2放入压板3’的第二放置区域30,再插入定位销4,然后盖上主板1,使得定位销4插入到第一和第二定位孔,从而将芯片2准确安装和定位。FIG. 5 shows a schematic view of a pressure plate in accordance with another embodiment of the present disclosure. Different from the pressure plate 3, a second placement area 30 corresponding to the main body of the chip 2 is formed on the pressure plate 3', and a plurality of third pins 32 respectively surrounding the second placement area 30 and corresponding to the plurality of pins of the chip 2 A plurality of third contacts 36 outside the second placement area 30, and a plurality of third wires 34, each of the third wires 34 connecting a third pin 32 to a third contact 36. When the chip 2 is placed on the second placement area 30, the plurality of pins of the chip 2 are in contact with the plurality of third pins 32, respectively. The second placement area 30 is shown in FIG. 5 as a recess or opening that is shaped and sized to correspond to the chip 2 and that can accommodate the chip 2. When testing or programming, the chip 2 can be first placed in the second placement area 30 of the pressure plate 3', then inserted into the positioning pin 4, and then the main board 1 is covered, so that the positioning pin 4 is inserted into the first and second positioning holes. Thereby the chip 2 is accurately mounted and positioned.
根据本公开实施例,该测试和编程装置还可以包括固定件,当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的芯片固定。该固定件例如可以是螺钉,通过拧到主板和压板上的对应螺孔中,将芯片固定。该固定件还可以是例如夹子,将主板和压板夹持住。本公开不限于这些示例,而是可以利用任何适当的固定方式。According to an embodiment of the present disclosure, the test and programming apparatus may further include a fixing member that fixes the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered. The fixing member can be, for example, a screw that is fixed by screwing into a corresponding screw hole on the main plate and the pressure plate. The fastener may also be, for example, a clip that holds the main plate and the pressure plate. The present disclosure is not limited to these examples, but any suitable fixing means may be utilized.
图6示出了根据本公开实施例的确认安装的芯片2与测试和编程装置否良好接触的示意图。图6的测试和编程装置包括主板1和压板3’。当芯片2安装好时,芯片2的管脚应该与主板1的第一引脚12和压板3’的第三引脚32分别接触。这样,利用万用表连接到第一触点16和第三触点36来测试通断,能够检测安装的芯片与测试和编程装置否良好接触。相比于现有编程座,本公开的测试和编程装置的检测和确认方式简单易行。6 shows a schematic diagram of confirming that the mounted chip 2 is in good contact with the test and programming device, in accordance with an embodiment of the present disclosure. The test and programming device of Figure 6 includes a main board 1 and a pressure plate 3'. When the chip 2 is mounted, the pins of the chip 2 should be in contact with the first pin 12 of the main board 1 and the third pin 32 of the press plate 3', respectively. Thus, the multi-table is connected to the first contact 16 and the third contact 36 to test the continuity, and it is possible to detect whether the mounted chip is in good contact with the test and programming device. The detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
图7示出了根据本公开另一实施例的测试和编程装置的主板1’的示意图。图7中的主板1’上形成有与芯片的主体对应的第一放置区域10’,围绕第一放置区域10’并与芯片的多个管脚分别对应的多个第一引脚12’,在第一放置区域10’之外的多个第一触点16’,以及多条第一导线14’,每条第一导线14’将一个第一引脚12’与一个第一触点16’连接。第一放置区域10’、第一引脚12’、第一触点16’和第一导线14’形成在主板1’的第一表面,例如用于 放置芯片的正面。主板1’的第一表面上还形成有多个第二引脚74,多个第二引脚74也围绕第一放置区域10’,与芯片的多个管脚分别对应,每一个第二引脚74与相应的一个第一引脚12’邻近但不接触,并且当芯片放置在第一放置区域上10’时,芯片的每个管脚与对应的第一引脚12’和第二引脚74分别接触。此外,在第一放置区域10’之外、主板1’的与第一表面相对的第二表面(例如背面)上还形成有多个第二触点72和多条第二导线70,如图8所示,每条第二导线70将一个第二触点72与一个第二引脚74连接。FIG. 7 shows a schematic diagram of a motherboard 1' of a test and programming device in accordance with another embodiment of the present disclosure. A first placement area 10' corresponding to the main body of the chip is formed on the main board 1' in FIG. 7, and a plurality of first pins 12' respectively surrounding the first placement area 10' and corresponding to the plurality of pins of the chip, a plurality of first contacts 16' outside the first placement area 10', and a plurality of first wires 14', each of the first wires 14' having a first pin 12' and a first contact 16 'connection. The first placement area 10', the first lead 12', the first contact 16', and the first lead 14' are formed on the first surface of the main board 1', for example, for Place the front side of the chip. A plurality of second pins 74 are further formed on the first surface of the main board 1'. The plurality of second pins 74 also surround the first placement area 10', respectively corresponding to the plurality of pins of the chip, and each of the second leads The foot 74 is adjacent to but not in contact with a corresponding one of the first pins 12', and each pin of the chip and the corresponding first pin 12' and the second lead when the chip is placed on the first placement area 10' The feet 74 are in contact respectively. In addition, a plurality of second contacts 72 and a plurality of second wires 70 are formed on the second surface (eg, the back surface) of the main board 1' opposite to the first surface outside the first placement area 10', as shown in the figure. As shown in FIG. 8, each of the second wires 70 connects a second contact 72 to a second pin 74.
可以利用图7和8所示的主板1’来放置例如方形扁平无引线封装(QFN)的芯片,在本公开中作为示例,为16个管脚的QFN芯片。如图9所示,芯片2’可以放置在主板1’的第一放置区域10’上,芯片2’的管脚应该与主板1’的第一引脚12’和第二引脚74良好接触。为了确认是否良好接触,利用万用表连接到第一触点16’和第二触点72,就能够检测安装的芯片与测试和编程装置否良好接触。相比于现有编程座,本公开的测试和编程装置的检测和确认方式简单易行。A chip such as a quad flat no-lead package (QFN) can be placed using the main board 1' shown in Figs. 7 and 8, which is a 16-pin QFN chip as an example in the present disclosure. As shown in FIG. 9, the chip 2' can be placed on the first placement area 10' of the main board 1', and the pins of the chip 2' should be in good contact with the first pin 12' and the second pin 74 of the main board 1'. . In order to confirm whether or not the contact is good, by using the multimeter to connect to the first contact 16' and the second contact 72, it is possible to detect whether the mounted chip is in good contact with the test and programming device. The detection and verification of the test and programming apparatus of the present disclosure is simple and straightforward compared to existing programming bases.
此外,如图9所示,该测试和编程装置还可以包括定位板5,定位板5上形成有能够容纳芯片的开口,以及与主板的至少两个第一定位孔对应的至少两个第三定位孔。当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。In addition, as shown in FIG. 9, the test and programming device may further include a positioning plate 5 formed with an opening capable of accommodating the chip, and at least two third portions corresponding to at least two first positioning holes of the main board Positioning holes. When the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
图10示出了根据本公开另一实施例的确认安装的芯片与测试和编程装置否良好接触的示意图。图10中的测试和编程装置包括主板1’、定位板5、压板3以及作为固定件的螺钉6。首先将芯片2’放置到主板1’的第一放置区域10’上,接着套上定位板5,并插上定位销。然后,盖上压板3,使得定位销插入到主板1’、定位板5、压板3的对应定位孔中。最后,为了进一步固定,拧入螺钉6。安装完毕之后,为了确认是否良好接触,利用万用表连接到第一触点16’和第二触点72来测试通断,从而检测芯片2’与主板1’是否良好接触。相比于现有编程座,芯片的安装以及本公开的测试和编程装置的检测和确认方式简单易行。FIG. 10 illustrates a schematic diagram of confirming that a mounted chip is in good contact with a test and programming device, in accordance with another embodiment of the present disclosure. The test and programming device of Fig. 10 includes a main board 1', a positioning plate 5, a pressure plate 3, and a screw 6 as a fixing member. First, the chip 2' is placed on the first placement area 10' of the main board 1', then the positioning board 5 is placed, and the positioning pins are inserted. Then, the pressure plate 3 is covered so that the positioning pins are inserted into the corresponding positioning holes of the main plate 1', the positioning plate 5, and the pressure plate 3. Finally, for further fixing, screw in the screw 6. After the mounting is completed, in order to confirm whether or not the contact is good, the first contact 16' and the second contact 72 are connected by a multimeter to test the on-off, thereby detecting whether the chip 2' is in good contact with the main board 1'. The mounting of the chip and the detection and verification of the test and programming devices of the present disclosure are simple and straightforward compared to existing programming bases.
现有的编程座的结构是每一个芯片管脚下面有一个镀金精密柔性探针或 弹簧片,连接到编程座下面,多个探针或弹簧片精确地固定在编程座壳体上,然后通过机械结构将芯片固定在探针或弹簧片上。这种结构不易于使用,也不易于检测和确认是否良好接触。与之不同,根据本公开实施例的测试和编程装置使用方便,能够直观简单地检测和确认是否良好接触。The existing programming block is constructed with a gold-plated precision flexible probe under each chip pin or The spring piece is attached to the underside of the programming block, and a plurality of probes or spring pieces are precisely fixed to the programming housing, and then the chip is fixed to the probe or the spring piece by a mechanical structure. This structure is not easy to use and it is not easy to detect and confirm whether it is in good contact. In contrast, the test and programming apparatus according to an embodiment of the present disclosure is convenient to use, and can intuitively and easily detect and confirm whether or not it is in good contact.
下面描述根据本公开实施例的上述测试和编程装置的制造方法。该制造方法包括:提供主板,并在主板上形成与芯片的主体对应的第一放置区域,围绕第一放置区域并与芯片的多个管脚分别对应的多个第一引脚,在第一放置区域之外的多个第一触点,以及多条第一导线,每条第一导线将一个第一引脚与一个第一触点连接。当芯片放置在第一放置区域上时,芯片的多个管脚分别与多个第一引脚相接触。A method of manufacturing the above-described test and programming apparatus according to an embodiment of the present disclosure is described below. The manufacturing method includes: providing a main board, and forming a first placement area corresponding to the main body of the chip on the main board, and a plurality of first pins respectively surrounding the first placement area and corresponding to the plurality of pins of the chip, at the first a plurality of first contacts outside the placement area, and a plurality of first wires, each of the first wires connecting a first pin to a first contact. When the chip is placed on the first placement area, the plurality of pins of the chip are respectively in contact with the plurality of first pins.
根据实施例,第一放置区域、第一引脚、第一触点和第一导线形成在主板的第一表面,所述制造方法还包括:在主板的第一表面上形成多个第二引脚,多个第二引脚与芯片的多个管脚分别对应,每一个第二引脚与相应的一个第一引脚邻近但不接触,并且当芯片放置在第一放置区域上时,芯片的每个管脚与对应的第一引脚和第二引脚分别接触;以及在第一放置区域之外、主板的与第一表面相对的第二表面上形成多个第二触点和多条第二导线。每条第二导线将一个第二触点与一个第二引脚连接。According to an embodiment, the first placement area, the first lead, the first contact, and the first wire are formed on the first surface of the main board, the manufacturing method further comprising: forming a plurality of second leads on the first surface of the main board a plurality of second pins respectively corresponding to the plurality of pins of the chip, each of the second pins being adjacent to but not in contact with the corresponding one of the first pins, and when the chip is placed on the first placement area, the chip Each of the pins is in contact with the corresponding first pin and the second pin, respectively; and a plurality of second contacts and a plurality of second contacts are formed on the second surface of the main plate opposite to the first surface outside the first placement area The second wire. Each second wire connects a second contact to a second pin.
根据实施例,制造方法还包括:在主板上形成至少两个第一定位孔,提供压板,并在压板上形成与主板的第一定位孔对应的至少两个第二定位孔,以及提供至少两个定位销,用于插入到第一和第二定位孔中。当芯片放置在主板的第一放置区域上并且盖上压板时,通过定位销插入到压板和主板上的第一和第二定位孔,将芯片定位在第一放置区域。According to an embodiment, the manufacturing method further includes: forming at least two first positioning holes on the main board, providing a pressing plate, and forming at least two second positioning holes corresponding to the first positioning holes of the main board on the pressing plate, and providing at least two Locating pins for insertion into the first and second positioning holes. When the chip is placed on the first placement area of the main board and the platen is covered, the chip is positioned in the first placement area by the positioning pins being inserted into the first and second positioning holes on the platen and the main board.
根据另一实施例,制造方法还包括:在压板上形成与芯片的主体对应的第二放置区域,围绕第二放置区域并与芯片的多个管脚分别对应的多个第三引脚,在第二放置区域之外的多个第三触点,以及多条第三导线,每条第三导线将一个第三引脚与一个第三触点连接。当芯片放置在第二放置区域上时,芯片的多个管脚分别与多个第三引脚相接触。According to another embodiment, the manufacturing method further includes: forming a second placement region corresponding to the body of the chip on the platen, a plurality of third pins surrounding the second placement region and corresponding to the plurality of pins of the chip, respectively a plurality of third contacts outside the second placement area, and a plurality of third wires, each of the third wires connecting a third pin to a third contact. When the chip is placed on the second placement area, the plurality of pins of the chip are respectively in contact with the plurality of third pins.
根据另一实施例,制造方法还包括:提供固定件,用于当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的 芯片固定。According to another embodiment, the manufacturing method further includes: providing a fixing member for using the fixing member to sandwich the main plate and the pressing plate and the clamping member when the chip is placed on the first placement area of the main board and the pressing plate is covered The chip is fixed.
根据另一实施例,制造方法还包括:提供定位板,并在定位板上形成能够容纳芯片的开口、以及与主板的至少两个第一定位孔对应的至少两个第三定位孔。当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。According to another embodiment, the manufacturing method further includes: providing a positioning plate, and forming an opening capable of accommodating the chip on the positioning plate, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board. When the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
现有的编程座的结构是,每一个芯片管脚下面有一个镀金精密柔性探针或弹簧片,连接到编程座下面;多个探针或弹簧片精确地固定在编程座壳体上;然后通过机械结构将芯片固定在探针或弹簧片上。由此,管脚越多,探针和弹簧片也越多,加工成本越高。现有编程座的制造方法包括:制造编程座壳体模具,通过注塑工艺生产编程座壳体,生产探针,将探针固定到编程座壳体上,以及利用专用设备组装壳体。这种结构较为复杂,制造方法要求专用设备和训练有素的工人,成本很高。相比于现有编程座,本公开的测试和编程装置可以采用PCB板工艺,一次性制造主板、压板和定位板,并且以PCB板上的触点替代探针,一次成型,不管管脚多少,成本固定。这样,使用常用的PCB加工技术,不需要特殊模具,无需复杂的组装设备和训练有素的工人,无需设备投资,无需培训,大大降低了成本。The existing programming base has a gold-plated precision flexible probe or spring piece under each chip pin, which is connected under the programming seat; a plurality of probes or spring pieces are precisely fixed on the programming housing; The chip is fixed to the probe or spring piece by a mechanical structure. Thus, the more pins, the more probes and springs, and the higher the processing cost. The manufacturing method of the existing programming base includes: manufacturing a mold housing mold, producing a programming housing by an injection molding process, producing a probe, fixing the probe to the programming housing, and assembling the housing with special equipment. This structure is more complicated, and the manufacturing method requires special equipment and well-trained workers, which is costly. Compared with the existing programming base, the test and programming device of the present disclosure can adopt a PCB board process to manufacture the main board, the pressure plate and the positioning board at one time, and replace the probe with the contacts on the PCB board, forming one time, no matter how many pins The cost is fixed. In this way, the use of common PCB processing technology, no special molds, no complicated assembly equipment and well-trained workers, no equipment investment, no training, and greatly reduced costs.
上述实施例仅是示例并不限制本公开。示例性实施例的描述意在说明性的,而不是为了限制权利要求的范围,并且本领域技术人员将清楚多种替代、改进和变化。 The above embodiments are merely examples and do not limit the disclosure. The description of the exemplary embodiments is intended to be illustrative, and not restrictive

Claims (13)

  1. 一种用于芯片测试和编程的装置,包括:A device for chip testing and programming, comprising:
    主板,主板上形成有Motherboard, formed on the motherboard
    与芯片的主体对应的第一放置区域,a first placement area corresponding to the body of the chip,
    围绕第一放置区域并与芯片的多个管脚分别对应的多个第一引脚,a plurality of first pins surrounding the first placement area and corresponding to the plurality of pins of the chip,
    在第一放置区域之外的多个第一触点,以及a plurality of first contacts outside the first placement area, and
    多条第一导线,每条第一导线将一个第一引脚与一个第一触点连接,a plurality of first wires, each of the first wires connecting a first pin to a first contact
    其中当芯片放置在第一放置区域上时,芯片的多个管脚分别与多个第一引脚相接触。Wherein when the chip is placed on the first placement area, the plurality of pins of the chip are respectively in contact with the plurality of first pins.
  2. 根据权利要求1所述的装置,其中第一放置区域、多个第一引脚、第一触点和第一导线形成在主板的第一表面,The apparatus of claim 1, wherein the first placement area, the plurality of first leads, the first contacts, and the first wires are formed on the first surface of the main board,
    在主板的第一表面上还形成有多个第二引脚,多个第二引脚与芯片的多个管脚分别对应,每一个第二引脚与相应的一个第一引脚邻近但不接触,并且当芯片放置在第一放置区域上时,芯片的每个管脚与对应的第一引脚和第二引脚分别接触,Forming a plurality of second pins on the first surface of the motherboard, the plurality of second pins respectively corresponding to the plurality of pins of the chip, each second pin being adjacent to the corresponding one of the first pins but not Contacting, and when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin, respectively
    在第一放置区域之外、主板的与第一表面相对的第二表面上形成有多个第二触点和多条第二导线,每条第二导线将一个第二触点与一个第二引脚连接。A plurality of second contacts and a plurality of second wires are formed on the second surface of the main board opposite to the first surface outside the first placement area, and each of the second wires has a second contact and a second Pin connection.
  3. 根据权利要求1所述的装置,其中主板上还形成有至少两个第一定位孔,The device according to claim 1, wherein at least two first positioning holes are further formed on the main board.
    所述装置还包括:The device also includes:
    压板,压板上形成有与主板的第一定位孔对应的至少两个第二定位孔,以及a pressure plate on which at least two second positioning holes corresponding to the first positioning holes of the main board are formed, and
    至少两个定位销,用于插入到第一和第二定位孔中,At least two positioning pins for insertion into the first and second positioning holes,
    当芯片放置在主板的第一放置区域上并且盖上压板时,第一定位孔和第二定位孔分别对齐,并通过定位销插入到第一和第二定位孔,将芯片定位在第一放置区域。When the chip is placed on the first placement area of the main board and the pressure plate is covered, the first positioning hole and the second positioning hole are respectively aligned, and inserted into the first and second positioning holes through the positioning pin to position the chip in the first placement region.
  4. 根据权利要求3所述的装置,其中压板上还形成有:The apparatus according to claim 3, wherein the platen is further formed with:
    与芯片的主体对应的第二放置区域, a second placement area corresponding to the body of the chip,
    围绕第二放置区域并与芯片的多个管脚分别对应的多个第三引脚,a plurality of third pins surrounding the second placement area and corresponding to the plurality of pins of the chip,
    在第二放置区域之外的多个第三触点,以及a plurality of third contacts outside the second placement area, and
    多条第三导线,每条第三导线将一个第三引脚与一个第三触点连接,a plurality of third wires, each of the third wires connecting a third pin to a third contact
    其中当芯片放置在第二放置区域上时,芯片的多个管脚分别与多个第三引脚相接触。Wherein when the chip is placed on the second placement area, the plurality of pins of the chip are respectively in contact with the plurality of third pins.
  5. 根据权利要求3所述的装置,还包括:The apparatus of claim 3 further comprising:
    固定件,当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的芯片固定。The fixing member fixes the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
  6. 根据权利要求4所述的装置,其中第二放置区域形成为能够容纳芯片的凹入或开口。The device of claim 4 wherein the second placement area is formed as a recess or opening capable of receiving a chip.
  7. 根据权利要求1或2所述的装置,还包括:The apparatus according to claim 1 or 2, further comprising:
    定位板,定位板上形成有Positioning plate, formed on the positioning plate
    能够容纳芯片的开口,以及Capable of accommodating the opening of the chip, and
    与主板的至少两个第一定位孔对应的至少两个第三定位孔;At least two third positioning holes corresponding to at least two first positioning holes of the main board;
    当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。When the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and third through the positioning pin Position the hole to position the chip in the first placement area.
  8. 一种用于芯片测试和编程的装置的制造方法,包括:A method of fabricating a device for chip testing and programming, comprising:
    提供主板,并在主板上形成Provide a motherboard and form on the motherboard
    与芯片的主体对应的第一放置区域,a first placement area corresponding to the body of the chip,
    围绕第一放置区域并与芯片的多个管脚分别对应的多个第一引脚,a plurality of first pins surrounding the first placement area and corresponding to the plurality of pins of the chip,
    在第一放置区域之外的多个第一触点,以及a plurality of first contacts outside the first placement area, and
    多条第一导线,每条第一导线将一个第一引脚与一个第一触点连接,a plurality of first wires, each of the first wires connecting a first pin to a first contact
    其中当芯片放置在第一放置区域上时,芯片的多个管脚分别与多个第一引脚相接触。Wherein when the chip is placed on the first placement area, the plurality of pins of the chip are respectively in contact with the plurality of first pins.
  9. 根据权利要求8所述的制造方法,其中第一放置区域、多个第一引脚、第一触点和第一导线形成在主板的第一表面,The manufacturing method according to claim 8, wherein the first placement region, the plurality of first leads, the first contacts, and the first wires are formed on the first surface of the main board,
    所述制造方法还包括:在主板的第一表面上形成多个第二引脚,多个第二引脚与芯片的多个管脚分别对应,每一个第二引脚与相应的一个第一引脚邻近 但不接触,并且当芯片放置在第一放置区域上时,芯片的每个管脚与对应的第一引脚和第二引脚分别接触;The manufacturing method further includes: forming a plurality of second pins on the first surface of the main board, the plurality of second pins respectively corresponding to the plurality of pins of the chip, each of the second pins and the corresponding one of the first Pin proximity But not in contact, and when the chip is placed on the first placement area, each pin of the chip is in contact with the corresponding first pin and the second pin, respectively;
    在第一放置区域之外、主板的与第一表面相对的第二表面上形成多个第二触点和多条第二导线,每条第二导线将一个第二触点与一个第二引脚连接。Forming a plurality of second contacts and a plurality of second wires on the second surface of the main board opposite to the first surface outside the first placement area, each of the second wires connecting a second contact and a second lead The feet are connected.
  10. 根据权利要求8所述的制造方法,还包括:The manufacturing method according to claim 8, further comprising:
    在主板上形成至少两个第一定位孔,Forming at least two first positioning holes on the main board,
    提供压板,并在压板上形成与主板的第一定位孔对应的至少两个第二定位孔,以及Providing a pressure plate, and forming at least two second positioning holes corresponding to the first positioning holes of the main board on the pressure plate, and
    提供至少两个定位销,用于插入到第一和第二定位孔中,Providing at least two positioning pins for insertion into the first and second positioning holes,
    其中当芯片放置在主板的第一放置区域上并且盖上压板时,通过定位销插入到压板和主板上的第一和第二定位孔,将芯片定位在第一放置区域。Wherein when the chip is placed on the first placement area of the main board and the pressure plate is covered, the chip is positioned in the first placement area by the first and second positioning holes inserted into the pressure plate and the main board by the positioning pins.
  11. 根据权利要求10所述的制造方法,还包括:The manufacturing method according to claim 10, further comprising:
    在压板上形成Formed on the platen
    与芯片的主体对应的第二放置区域,a second placement area corresponding to the body of the chip,
    围绕第二放置区域并与芯片的多个管脚分别对应的多个第三引脚,a plurality of third pins surrounding the second placement area and corresponding to the plurality of pins of the chip,
    在第二放置区域之外的多个第三触点,以及a plurality of third contacts outside the second placement area, and
    多条第三导线,每条第三导线将一个第三引脚与一个第三触点连接,a plurality of third wires, each of the third wires connecting a third pin to a third contact
    其中当芯片放置在第二放置区域上时,芯片的多个管脚分别与多个第三引脚相接触。Wherein when the chip is placed on the second placement area, the plurality of pins of the chip are respectively in contact with the plurality of third pins.
  12. 根据权利要求10所述的制造方法,还包括:The manufacturing method according to claim 10, further comprising:
    提供固定件,用于当芯片放置在主板的第一放置区域上并且盖上压板时,利用固定件将主板和压板以及夹在其间的芯片固定。A fixing member is provided for fixing the main board and the pressing plate and the chip sandwiched therebetween by the fixing member when the chip is placed on the first placement area of the main board and the pressing plate is covered.
  13. 根据权利要求8或9所述的制造方法,还包括:The manufacturing method according to claim 8 or 9, further comprising:
    提供定位板,并在定位板上形成能够容纳芯片的开口、以及与主板的至少两个第一定位孔对应的至少两个第三定位孔;Providing a positioning plate, and forming an opening capable of accommodating the chip on the positioning plate, and at least two third positioning holes corresponding to the at least two first positioning holes of the main board;
    其中当芯片放置在主板的第一放置区域上并盖上定位板时,第一定位孔和第三定位孔分别对齐,芯片容纳在定位板的开口中,并通过定位销插入到第一和第三定位孔,将芯片定位在第一放置区域。 Wherein when the chip is placed on the first placement area of the main board and the positioning plate is covered, the first positioning hole and the third positioning hole are respectively aligned, the chip is accommodated in the opening of the positioning plate, and inserted into the first and the first through the positioning pin Three positioning holes that position the chip in the first placement area.
PCT/CN2017/103164 2016-10-12 2017-09-25 Apparatus for chip testing and programming, and manufacturing method therefor WO2018068627A1 (en)

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