CN108417500B - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 145
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 229910000679 solder Inorganic materials 0.000 claims abstract description 152
- 239000002923 metal particle Substances 0.000 claims abstract description 66
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 230000005484 gravity Effects 0.000 claims abstract description 35
- 239000002184 metal Substances 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 26
- 239000002245 particle Substances 0.000 claims description 18
- 238000002844 melting Methods 0.000 claims description 10
- 230000008018 melting Effects 0.000 claims description 10
- 238000003475 lamination Methods 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims 2
- 238000010030 laminating Methods 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 23
- 229910052802 copper Inorganic materials 0.000 description 23
- 239000010949 copper Substances 0.000 description 23
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 8
- 229910010271 silicon carbide Inorganic materials 0.000 description 8
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000012798 spherical particle Substances 0.000 description 1
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Abstract
提供一种半导体装置及其制造方法,抑制金属块的下部的焊料层变薄。半导体装置具有配线构件、配置在配线构件的上部的半导体芯片及配置在半导体基板的上部的金属块。半导体芯片具有半导体基板、下部电极、上部大电极及上部小电极。半导体芯片具有相对于其重心位于上部小电极侧的第一部分和位于相反侧的第二部分。金属块的重心配置在第二部分的上部。下部电极通过下部焊料层与配线构件连接。下部焊料层具有焊料母材和金属颗粒。金属颗粒在位于第二部分的下部的下部焊料层中所占的体积比率比金属颗粒在位于第一部分的下部的下部焊料层中所占的体积比率高。
Description
技术领域
本说明书公开的技术涉及半导体装置及其制造方法。
背景技术
在专利文献1中公开了利用焊料层将半导体芯片与配线构件进行连接的技术。在焊料层中分散有熔点比焊料层高的金属颗粒。通过使金属颗粒分散在焊料层中,来使焊料层的厚度均匀化。
在先技术文献
专利文献
专利文献1:日本特开平6-216167号公报
发明内容
发明要解决的课题
已知有具有上部大电极和上部小电极的半导体芯片。上部大电极和上部小电极设置在半导体芯片的上表面。上部小电极是供信号等小电流流动的电极,上部大电极是供比上部小电极大的电流流动的电极。在这样的半导体芯片中,有时使用金属块作为对于上部大电极的配线。在这种半导体装置的制造工序中,进行将配线构件、下部焊料层、半导体芯片、上部焊料层及金属块依次层叠的层叠工序。上部焊料层配置在上部大电极上,金属块层叠在上部焊料层上。接下来,对层叠体进行加热而使下部焊料层和上部焊料层熔融。然后,对层叠体进行冷却而使下部焊料层和上部焊料层凝固。由此,将配线构件、半导体芯片及金属块相互连接。
由于在半导体芯片的上表面存在上部大电极和上部小电极,因此上部大电极的中心位置从半导体芯片的上表面的中心位置偏离。在层叠工序中,金属块层叠在上部大电极的大致中央。因此,在金属块的重心位置从半导体芯片的重心位置偏离的状态下,将金属块层叠于半导体芯片的上部。当之后使下部焊料层和上部焊料层熔融时,在金属块的重心侧,半导体芯片会向下侧(下部焊料层侧)下沉。其结果是,半导体芯片相对于配线构件倾斜,在金属块的重心的下部,下部焊料层的厚度变薄。在半导体装置的使用时,在金属块的重心的下部(即,上部大电极的中心的下部附近)处在半导体芯片流动大的电流,因此在该部分处半导体芯片成为高温。因此,金属块的重心的下部的下部焊料层也成为高温。当金属块的重心的下部(即,成为高温的部分)的下部焊料层的厚度薄时,容易因热应力而在该部分的下部焊料层产生裂纹。即便使用了上述的专利文献1的技术,也无法充分抑制金属块的重心的下部的半导体芯片的下沉。
用于解决课题的方案
本说明书公开的半导体装置具有:配线构件;半导体芯片,配置在所述配线构件的上部;及金属块,配置在所述半导体芯片的上部。所述半导体芯片具有:半导体基板;下部电极,设置在所述半导体基板的下表面;上部大电极,设置在所述半导体基板的上表面;及上部小电极,设置在所述半导体基板的上表面,且比所述上部大电极小。在从所述上部小电极朝向所述上部大电极的方向上,所述半导体芯片具有相对于所述半导体芯片的重心位于所述上部小电极侧的第一部分和相对于所述半导体芯片的所述重心位于所述上部小电极的相反侧的第二部分。所述金属块的重心配置在所述第二部分的上部。所述下部电极通过下部焊料层与所述配线构件连接。所述上部大电极通过上部焊料层与所述金属块连接。所述下部焊料层具有焊料母材和分散在所述焊料母材中并且熔点比所述焊料母材高的金属颗粒。所述金属颗粒在位于所述第二部分的下部的所述下部焊料层中所占的体积比率比所述金属颗粒在位于所述第一部分的下部的所述下部焊料层中所占的体积比率高。
需要说明的是,位于第一部分的下部的下部焊料层可以不包含金属颗粒。即,金属颗粒在位于第一部分的下部的下部焊料层中所占的体积比率可以为零。
在该半导体装置中,金属块的重心位于半导体芯片的第二部分的上部。因此,会向位于半导体芯片的第二部分的下部的下部焊料层施加比位于半导体芯片的第一部分的下部的下部焊料层高的载荷。而且,在该半导体装置中,金属颗粒在位于第二部分的下部的下部焊料层中所占的体积比率比金属颗粒在位于第一部分的下部的下部焊料层中所占的体积比率高。在使下部焊料层的母材熔融时,熔点高的金属颗粒不熔融。因此,在母材熔融的状态下,金属颗粒的体积比率高的下部焊料层(第二部分的下部的下部焊料层)比金属颗粒的体积比率低的下部焊料层(第一部分的下部焊料层)难以变形。由于被施加高的载荷的位于第二部分的下部的下部焊料层难以变形,所以能抑制第二部分向下部焊料层侧下沉。而且,由于不被施加高的载荷的位于第一部分的下部的下部焊料层容易变形,所以在一定程度上容许第一部分向下部焊料层侧下沉。这样,通过容许第一部分向下部焊料层侧下沉,能够更有效地抑制第二部分向下部焊料层侧下沉。因此,在该半导体装置中,能够抑制在第二部分的下部处下部焊料层的厚度变薄的情况。由此,能抑制下部焊料层的裂纹。
附图说明
图1是半导体装置10的纵向剖视图。
图2是半导体芯片16的俯视图。
图3是半导体装置10的制造工序的说明图。
图4是变形例的半导体装置的纵向剖视图。
图5是变形例的半导体装置的纵向剖视图。
图6是变形例的半导体装置的纵向剖视图。
图7是变形例的半导体装置的纵向剖视图。
具体实施方式
图1所示的实施方式的半导体装置10具有引线框架12、半导体芯片16、铜块20、引线框架24、引线28及绝缘树脂30。
引线框架12是金属制的配线构件。
半导体芯片16配设在引线框架12的上部。半导体芯片16具有半导体基板16f、下部电极16c、上部大电极16d及多个上部小电极16e。半导体基板16f是以SiC(碳化硅)为主成分的SiC基板。在半导体基板16f的内部形成有MOSFET(metal oxide semiconductor fieldeffect transistor:金属氧化物半导体场效晶体管)等。下部电极16c覆盖半导体基板16f的下表面的大致整个区域。在下部电极16c与引线框架12之间配置有下部焊料层14。下部电极16c通过下部焊料层14与引线框架12连接。如图2所示,在半导体基板16f的上表面设有上部大电极16d和多个上部小电极16e。上部大电极16d比各上部小电极16e大。上部小电极16e是MOSFET的栅电极或用于测定半导体基板16f的电流、温度等的电极。在各上部小电极16e流动的电流小。MOSFET的主电流在上部大电极16d与下部电极16c之间流动。MOSFET的主电流比在各上部小电极16e流动的电流大。多个上部小电极16e沿着半导体基板16f的上表面的一边排列。上部大电极16d配置在与多个上部小电极16e相邻的位置。
如图1所示,铜块20配置在上部大电极16d的上部。在铜块20与上部大电极16d之间配置有上部焊料层18。铜块20通过上部焊料层18与上部大电极16d连接。
引线框架24是金属制的配线构件。引线框架24配置在铜块20的上部。在引线框架24与铜块20之间配置有焊料层22。引线框架24通过焊料层22与铜块20连接。
引线28配置在半导体芯片16的侧方。虽然未图示,但在半导体芯片16的侧方配置有与多个上部小电极16e对应的数量的引线28。各上部小电极16e通过金属丝26与对应的引线28连接。
绝缘树脂30将位于引线框架12与引线框架24之间的各构件的表面覆盖。
在图1、2中,重心40表示半导体芯片16的重心,重心42表示铜块20的重心。而且,在图2中,通过单点划线表示铜块20的位置。如图2所示,在从上侧观察半导体芯片16时,半导体芯片16的重心40位于半导体芯片16的大致中心。以下,在从上部小电极16e朝向上部大电极16d的方向(图1、2的x方向)上,将相对于重心40位于上部小电极16e侧的部分的半导体芯片16称为第一部分16a。而且,将相对于重心40位于上部小电极16e的相反侧的部分的半导体芯片16称为第二部分16b。如上所述,MOSFET的主电流在上部大电极16d与下部电极16c之间流动。如图2所示,上部大电极16d的大部分位于半导体芯片16的第二部分16b内。因此,主电流的大部分在半导体芯片16的第二部分16b内流动。因此,在半导体装置10动作时,与第一部分16a相比,第二部分16b成为高温。
如图2所示,铜块20配置在上部大电极16d的正上方。因此,在从上侧观察半导体芯片16时,铜块20的重心42位于上部大电极16d的大致中心。上部大电极16d的中心的位置从半导体芯片16的中心的位置偏离。因此,在从上侧观察半导体芯片16时,铜块20的重心42的位置从半导体芯片16的重心40的位置偏离。铜块20的重心42配置在半导体芯片16的第二部分16b的上部。因此,铜块20的载荷的大部分向半导体芯片16的第二部分16b施加。
如图1所示,下部焊料层14具有由焊料构成的母材50和分散在母材50的内部的金属颗粒52。金属颗粒52由具有比母材50高的熔点的金属构成。在本实施方式中,金属颗粒52由镍构成。金属颗粒52是大致球形的颗粒。下部焊料层14具有包含粒径小的金属颗粒52a的第一区域14a和包含粒径大的金属颗粒52b的第二区域14b。即,第二区域14b内的金属颗粒52的平均粒径比第一区域14a内的金属颗粒52的平均粒径大。金属颗粒52在第二区域14b所占的体积比率比金属颗粒52在第一区域14a所占的体积比率高。第一区域14a配置在半导体芯片16的第一部分16a的下部,第二区域14b配置在半导体芯片16的第二部分16b的下部。在x方向上,半导体芯片16的第一部分16a与第二部分16b的交界的位置(即,重心40的位置)和下部焊料层14的第一区域14a与第二区域14b的交界的位置大致一致。
接下来,说明半导体装置10的制造方法。首先,如图3所示,将引线框架12、下部焊料层14、半导体芯片16、上部焊料层18及铜块20层叠。更详细而言,在引线框架12上载置构成下部焊料层14的薄板状的部件。需要说明的是,既可以是下部焊料层14由一个薄板状的部件构成,也可以是第一区域14a和第二区域14b由分离的不同部件构成。而且,在下部焊料层14上载置半导体芯片16。在此,使下部电极16c与下部焊料层14接触。而且,以使半导体芯片16的第一部分16a位于下部焊料层14的第一区域14a上且半导体芯片16的第二部分16b位于下部焊料层14的第二区域14b上的方式载置半导体芯片16。而且,在上部大电极16d上载置构成上部焊料层18的薄板状的部件。而且,在上部焊料层18上载置铜块20。在此,以使铜块20的重心42位于半导体芯片16的第二部分16b的上部的方式载置铜块20。在该时刻,下部焊料层14和上部焊料层18未与相邻的构件接合。而且,在该时刻,引线框架12在未图示的位置连结于引线28。
接下来,对图3所示的层叠体进行加热。更详细而言,将层叠体加热至比下部焊料层14的母材50的熔点高且比金属颗粒52的熔点低的温度,由此使母材50熔融。而且,也使上部焊料层18熔融。然后,对层叠体进行冷却,使下部焊料层14的母材50和上部焊料层18凝固。由此,引线框架12与下部电极16c通过下部焊料层14而接合,上部大电极16d与铜块20通过上部焊料层18而接合。
对将层叠体加热时的下部焊料层14更详细地进行说明。如图3所示,铜块20的重心42位于半导体芯片16的第二部分16b的上部。因此,会向第二部分16b施加比第一部分16a高的载荷。其结果是,对于半导体芯片16,向以其重心40为中心而第二部分16b朝向下侧的方向作用力矩。因此,向位于第二部分16b的下部的第二区域14b施加比位于第一部分16a的下部的第一区域14a高的载荷。
另一方面,当层叠体被加热时,下部焊料层14的母材50熔融。此时,下部焊料层14的内部的金属颗粒52不熔融。未熔融的金属颗粒52的体积比率在第二区域14b中比第一区域14a高。因此,在母材50熔融的状态下,第二区域14b的粘度比第一区域14a的粘度高。因此,在母材50熔融的状态下,第二区域14b难以变形(流动),第一区域14a容易变形。由于第二区域14b难以变形,所以即使向第二区域14b施加高的载荷,也能抑制半导体芯片16的第二部分16b朝向下部焊料层14下沉。而且,由于第一区域14a容易变形,所以即使向第一区域14a施加的载荷低,半导体芯片16的第一部分16a也会朝向下部焊料层14下沉一定程度。通过容许第一部分16a的下沉,能有效地抑制第二部分16b的下沉。因此,能抑制第二部分16b的下部的下部焊料层14(即,第二区域14b)的厚度变薄。然后,当对层叠体进行冷却而使下部焊料层14凝固时,能得到在第二部分16b的下部具有足够的厚度的下部焊料层14。如上所述,在半导体装置10的使用时,半导体芯片16的第二部分16b成为高温。因此,第二部分16b的下部的下部焊料层14(即,第二区域14b)也成为高温。当第二区域14b的厚度厚时,第二区域14b容易根据热应力而弹性变形。因此,即使第二区域14b成为高温,也能抑制在第二区域14b产生裂纹。
需要说明的是,也可以通过调节下部焊料层14的第一区域14a和第二区域14b的金属颗粒52的粒径,来使半导体芯片16的第一部分16a与第二部分16b的下沉量大致均等。通过使第一部分16a与第二部分16b的下沉量均等,下部焊料层14的厚度变得均匀,能够更有效地抑制下部焊料层14的裂纹。
另外,第一部分16a的下沉量也可以大于第二部分16b的下沉量。这种情况下,下部焊料层14的第一区域14a的厚度变得比下部焊料层14的第二区域14b的厚度薄。即使是这样的结构,由于第二区域14b的厚度变厚,所以也能够抑制第二区域14b的裂纹。而且,如上所述,由于半导体芯片16的第一部分16a难以成为高温,所以下部焊料层14的第一区域14a也难以成为高温。因此,即使第一区域14a的厚度薄,也难以在第一区域14a产生裂纹。
当使下部焊料层14及上部焊料层18凝固后,通过金属丝26将各上部小电极16e与对应的引线28连接。接下来,通过焊料层22将铜块20与引线框架24连接。接下来,通过注射成型来形成绝缘树脂30。然后,通过将引线框架12和引线28切割成所希望的形状,而完成图1所示的半导体装置10。
如以上说明那样,在本实施方式的半导体装置10中,半导体芯片16的第二部分16b的下部的下部焊料层14(即,第二区域14b)在熔融时难以变形。由此,即使向第二区域14b施加高的载荷,也能抑制第二部分16b的下沉。此外,半导体芯片16的第一部分16a的下部的下部焊料层14(即,第一区域14a)在熔融时容易变形。由此,在一定程度上容许第一部分16a的下沉。通过容许第一部分16a的下沉,能进一步抑制第二部分16b的下沉。因此,根据该技术,能够确保第二区域14b的厚度,能够抑制第二区域14b中的裂纹的产生。
需要说明的是,在上述的实施方式中,下部焊料层14的第一区域14a与第二区域14b的交界的位置和半导体芯片16的第一部分16a与第二部分16b的交界的位置大致一致。然而,如图4、5所示,这些交界的位置也可以错开。即使是这些结构,也是在半导体芯片16的第二部分16b的下部中下部焊料层14的内部的金属颗粒52的体积比率比半导体芯片16的第一部分16a的下部高,因此能够抑制第二部分16b的下沉。而且,在上述的实施方式中,下部焊料层14的第一区域14a包含金属颗粒52,但也可以如图6所示那样,第一区域14a不包含金属颗粒52。而且,也可以如图7所示那样,金属颗粒52的粒径以三阶段进行变化。而且,也可以使金属颗粒52的粒径以比图7多的阶段进行变化。而且,金属颗粒52的粒径可以随着从第一部分16a侧的端部朝向第二部分16b侧的端部而逐渐增大。而且,也可以是粒径不同的金属颗粒52以混合的状态分散在下部焊料层14内,第二部分16b的下部的金属颗粒52的平均粒径比第一部分16a的下部的金属颗粒52的平均粒径大。而且,也可以采用将这些变形例组合而成的结构。
另外,在上述的实施方式中,金属颗粒52为大致球形。然而,金属颗粒52也可以是其他的形状(例如,圆柱形状、立方体形状、长方体形状等)。在金属颗粒52为圆柱形状的情况下,其轴可以沿纵向(下部焊料层14的厚度方向)延伸,也可以沿横向(与纵向正交的方向)延伸,还可以沿其他的方向延伸。
另外,在上述的实施方式中,金属颗粒52由镍构成。然而,只要是在母材50的熔点下能够维持形状的材料即可,金属颗粒52可以由任意的材料构成。例如,也可以用铜、树脂、玻璃等构成金属颗粒52。
以下,列举本说明书公开的技术要素。需要说明的是,以下的各技术要素分别是独立而有用的要素。
在本说明书公开的一例的半导体装置中,位于第一部分的下部的下部焊料层和位于第二部分的下部的下部焊料层可以分别具有金属颗粒。位于第二部分的下部的下部焊料层内的金属颗粒的平均粒径可以比位于第一部分的下部的下部焊料层内的金属颗粒的平均粒径大。
在本说明书公开的一例的半导体装置中,下部焊料层可以具有第一区域和第二区域。包含于第二区域的金属颗粒的粒径可以大于包含于第一区域的金属颗粒的粒径。可以是第一区域位于第一部分的下部,第二区域位于第二部分的下部。
根据这些结构,能够有效地抑制第二部分的下部的下部焊料层的厚度变薄。
在本说明书公开的一例的半导体装置中,半导体基板可以是SiC基板。
SiC基板在高的电流密度下使用。因此,在SiC基板中,上部大电极的尺寸小。因此,与其他的半导体基板(例如,硅基板)等相比,上部大电极的尺寸相对于上部小电极的尺寸的比率小。因此,上部大电极的中心具有配置在从半导体基板的中心大幅偏离的位置的倾向。因此,在SiC基板中,容易产生第二部分的下沉的问题。因此,本说明书公开的技术对于具有SiC基板的半导体装置而言更有效。
以上,虽然详细地说明了实施方式,但这些只不过是例示,不对权利要求书进行限定。权利要求书所记载的技术包括对以上例示的具体例进行各种变形、变更而得到的技术。本说明书或附图中说明的技术要素以单独或各种组合的方式发挥技术有用性,不限定于申请时权利要求记载的组合。而且,本说明书或附图中例示的技术是同时实现多个目的的技术,实现其中一个目的本身就具有技术有用性。
标号说明
10:半导体装置
12:引线框架
14:下部焊料层
16:半导体芯片
16a:第一部分
16b:第二部分
16c:下部电极
16d:上部大电极
16e:上部小电极
16f:半导体基板
18:上部焊料层
20:铜块
22:焊料层
24:引线框架
40:重心
42:重心
50:母材
52:金属颗粒
Claims (8)
1.一种半导体装置,具有:
配线构件;
半导体芯片,配置在所述配线构件的上部;及
金属块,配置在所述半导体芯片的上部,
所述半导体芯片具有:
半导体基板;
下部电极,设置在所述半导体基板的下表面;
上部大电极,设置在所述半导体基板的上表面;及
上部小电极,设置在所述半导体基板的上表面,且比所述上部大电极小,
在从所述上部小电极朝向所述上部大电极的方向上,所述半导体芯片具有相对于所述半导体芯片的重心位于所述上部小电极侧的第一部分和相对于所述半导体芯片的所述重心位于所述上部小电极的相反侧的第二部分,
所述金属块的重心配置在所述第二部分的上部,
所述下部电极通过下部焊料层与所述配线构件连接,
所述上部大电极通过上部焊料层与所述金属块连接,
所述下部焊料层具有焊料母材和分散在所述焊料母材中并且熔点比所述焊料母材高的金属颗粒,
所述金属颗粒在位于所述第二部分的下部的所述下部焊料层中所占的体积比率比所述金属颗粒在位于所述第一部分的下部的所述下部焊料层中所占的体积比率高。
2.根据权利要求1所述的半导体装置,
位于所述第一部分的下部的所述下部焊料层和位于所述第二部分的下部的所述下部焊料层分别具有所述金属颗粒,
位于所述第二部分的下部的所述下部焊料层内的所述金属颗粒的平均粒径比位于所述第一部分的下部的所述下部焊料层内的所述金属颗粒的平均粒径大。
3.根据权利要求2所述的半导体装置,
所述下部焊料层具有第一区域和第二区域,
包含于所述第二区域的所述金属颗粒的粒径比包含于所述第一区域的所述金属颗粒的粒径大,
所述第一区域位于所述第一部分的下部,
所述第二区域位于所述第二部分的下部。
4.根据权利要求1~3中任一项所述的半导体装置,
所述半导体基板是SiC基板。
5.一种半导体装置的制造方法,其中,具有:
形成层叠体的工序,所述层叠体通过将配线构件、下部焊料层、半导体芯片、上部焊料层及金属块层叠而形成;及
对所述层叠体进行加热的工序,
所述半导体芯片具有:
半导体基板;
下部电极,设置在所述半导体基板的下表面;
上部大电极,设置在所述半导体基板的上表面;及
上部小电极,设置在所述半导体基板的上表面,且比所述上部大电极小,
在从所述上部小电极朝向所述上部大电极的方向上,所述半导体芯片具有相对于所述半导体芯片的重心位于所述上部小电极侧的第一部分和相对于所述半导体芯片的所述重心位于所述上部小电极的相反侧的第二部分,
所述下部焊料层具有焊料母材和分散在所述焊料母材中并且熔点比所述焊料母材高的金属颗粒,
在进行层叠的所述工序中,在所述配线构件上配置所述下部焊料层,在所述下部焊料层上配置所述下部电极,在所述上部大电极上配置所述上部焊料层,在所述上部焊料层上配置所述金属块,以使所述金属块的重心配置在所述第二部分的上部且所述金属颗粒在位于所述第二部分的下部的所述下部焊料层中所占的体积比率比所述金属颗粒在位于所述第一部分的下部的所述下部焊料层中所占的体积比率高的方式进行层叠,
在进行加热的所述工序中,使所述下部焊料层中的所述金属颗粒不熔融而使所述下部焊料层中的所述焊料母材熔融并且使所述上部焊料层熔融,然后,使所述下部焊料层中的所述焊料母材和所述上部焊料层凝固。
6.根据权利要求5所述的半导体装置的制造方法,
在进行层叠的所述工序中,位于所述第一部分的下部的所述下部焊料层和位于所述第二部分的下部的所述下部焊料层分别具有所述金属颗粒,以使位于所述第二部分的下部的所述下部焊料层内的所述金属颗粒的平均粒径比位于所述第一部分的下部的所述下部焊料层内的所述金属颗粒的平均粒径大的方式进行层叠。
7.根据权利要求6所述的半导体装置的制造方法,
所述下部焊料层具有第一区域和第二区域,
包含于所述第二区域的所述金属颗粒的粒径比包含于所述第一区域的所述金属颗粒的粒径大,
在进行层叠的所述工序中,以使所述第一区域位于所述第一部分的下部且所述第二区域位于所述第二部分的下部的方式进行层叠。
8.根据权利要求5~7中任一项所述的半导体装置的制造方法,
所述半导体基板是SiC基板。
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