CN108336200A - LED chip structure and preparation method thereof - Google Patents
LED chip structure and preparation method thereof Download PDFInfo
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- CN108336200A CN108336200A CN201810258615.2A CN201810258615A CN108336200A CN 108336200 A CN108336200 A CN 108336200A CN 201810258615 A CN201810258615 A CN 201810258615A CN 108336200 A CN108336200 A CN 108336200A
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- 238000004020 luminiscence type Methods 0.000 claims abstract description 43
- 230000004888 barrier function Effects 0.000 claims abstract description 24
- 239000010410 layer Substances 0.000 claims description 368
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 23
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 239000004411 aluminium Substances 0.000 claims description 9
- 229910052709 silver Inorganic materials 0.000 claims description 8
- 239000004332 silver Substances 0.000 claims description 8
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
This application provides a kind of LED chip structures and preparation method thereof, it is related to LED technology field, LED chip structure includes the substrate set gradually, buffer layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer, current extending and transparent insulating layer, and transparent insulating layer is located at side and part n type semiconductor layer side far from substrate of the current extending far from substrate；LED chip structure further includes P-type electrode and N-type electrode, and P-type electrode orthographic projection of plane where substrate is overlapping with multi-quantum well luminescence layer, and N-type electrode orthographic projection of plane where substrate is not overlapped with multi-quantum well luminescence layer；Wherein, at least partly side wall of P-type electrode is covered with the first reflective layer, and at least partly side wall of N-type electrode is covered with the second reflective layer.Such scheme effectively reduces the absorption of P-type electrode and N-type electrode to light, is conducive to the brightness for improving LED chip.
Description
Technical field
The invention belongs to LED technology fields, and in particular to LED chip structure and preparation method thereof.
Background technology
LED (Light Emitting Diode, light emitting diode) is a kind of solid state lighting, small, power consumption at present
The long high brightness of low service life, environmental protection, it is sturdy and durable the advantages that approved by consumers in general, the scale of domestic production LED
Gradually expanding；Demand in the market to LED luminance and light efficiency is growing day by day, and client is concerned with LED more power savings, and brightness is more
Height, light efficiency are more preferable, this is just that more stringent requirements are proposed for LED epitaxial growths；How to grow better epitaxial wafer and is increasingly subject to weight
Depending on because of the raising of epitaxial layer crystal quality, the performance of LED component can get a promotion, the luminous efficiency of LED, the service life, anti-ageing
Change ability, antistatic effect, stability can be promoted with the promotion of epitaxial layer crystal quality.
Up to the present, LED light emitting diodes be widely used in illumination, display, planting, biomedicine,
The every aspect of the lives such as agricultural, indicator light, and play a crucial role wherein.Currently, the method for preparing LED chip
The semi-conducting materials such as the GAN of certain structure are mainly grown on substrate material using MOCVD, and work is then prepared by chip
Skill prepares LED chip.Wherein GAN materials are to belong to third generation semi-conducting material, its crystal structure is hexagonal wurtzite knot
Structure has good Wuli-Shili-Renli system approach；Secondly it also has many advantages, such as that energy gap is big.
Although LED has been widely used in production and life, LED still exists in application field much to be asked
Topic needs to solve；For example the brightness of LED chip how is further promoted, how to reduce cost and prepares the high-quality of dependable performance
LED chip etc..It is that must face and solve the problems, such as the technical staff of LED chip industry.
Invention content
In view of this, the present invention provides LED chip structure and preparation method thereof, can reduce electric in LED chip structure
Extremely to the absorption of light, reflection efficiency of the electrode to light is improved, and then is conducive to be promoted the brightness of LED chip structure.
In order to solve the above technical problems, in a first aspect, the present invention provides a kind of LED chip structures, including：It sets gradually
Substrate, buffer layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer, current extending and
Transparent insulating layer, the transparent insulating layer, which is located at the side and part N-type of the current extending far from substrate, partly leads
Side of the body layer far from the substrate；
The LED chip structure further includes P-type electrode and N-type electrode, and the P-type electrode is located at the p type semiconductor layer
Side far from the substrate, the P-type electrode sequentially pass through the transparent insulating layer, the current extending and the electric current
Barrier layer is simultaneously electrically connected with the p type semiconductor layer；The N-type electrode is located at the n type semiconductor layer far from the substrate
Side, the N-type electrode are electrically connected through the transparent insulating layer and with the n type semiconductor layer；
The P-type electrode is overlapping in the orthographic projection of plane where the substrate and the multi-quantum well luminescence layer, the N-type
Electrode is not overlapped in the orthographic projection of plane where the substrate with the multi-quantum well luminescence layer；
Wherein, at least partly side wall of the P-type electrode is covered with the first reflective layer, and the N-type electrode is at least partly
Side wall is covered with the second reflective layer.
Second aspect, the application also provide a kind of preparation method of LED chip structure, which is characterized in that the preparation side
Method includes：
Substrate is made, processing is patterned to the first surface of substrate；
On the first surface on grown buffer layer；
N type semiconductor layer is grown on the buffer layer；
Multi-quantum well luminescence layer is grown on the n type semiconductor layer；
The growing P-type semiconductor layer in the multi-quantum well luminescence layer；
Current barrier layer is grown on the p type semiconductor layer；
Current extending is grown on the current barrier layer；
P-type electrode and N-type electrode are made, and the first reflective layer is made in at least partly side wall of the P-type electrode, in institute
At least partly side wall for stating N-type electrode makes the second reflective layer；The P-type electrode is located at the p type semiconductor layer far from described
The side of substrate, the P-type electrode sequentially pass through the transparent insulating layer, the current extending and the current barrier layer simultaneously
It is electrically connected with the p type semiconductor layer；The N-type electrode is located at side of the n type semiconductor layer far from the substrate, described
N-type electrode is electrically connected through the transparent insulating layer and with the n type semiconductor layer；The P-type electrode is where the substrate
The orthographic projection of plane and the multi-quantum well luminescence layer are overlapping, the N-type electrode the orthographic projection of plane where the substrate with
The multi-quantum well luminescence layer does not overlap；
Transparent insulating layer is made, the transparent insulating layer is located at side and part of the current extending far from substrate
Side of the n type semiconductor layer far from the substrate, and cover the region other than the P-type electrode and the N-type electrode.
Compared with prior art, LED chip structure described herein and preparation method thereof has reached following effect：
In LED chip structure provided herein and preparation method thereof, P-type electrode is at least in LED chip structure
The first reflective layer is introduced in partial sidewall, and introduces the second reflective layer on at least partly side wall of N-type electrode, is being introduced
After first reflective layer and the second luminescent layer, the absorption of P-type electrode and N-type electrode to light can be reduced, increases LED chip structure
Light extraction efficiency, meanwhile, the first reflective layer and the second reflective layer have good reflex to light, by the first reflective layer
Or second reflective layer reflection light be conducive to promoted LED chip structure brightness.In addition, introducing first in P-type electrode side wall
Reflective layer is simultaneously simple in the method and process route of N-type electrode side wall the second reflective layer of introducing, is conducive to industrialization production.
Certainly, implementing any of the products of the present invention specific needs while must not reach all the above technique effect.
Description of the drawings
Attached drawing described herein is used to provide further understanding of the present invention, and constitutes the part of the present invention, this hair
Bright illustrative embodiments and their description are not constituted improper limitations of the present invention for explaining the present invention.In the accompanying drawings：
Fig. 1 show a kind of sectional view for the LED chip structure that the prior art is provided；
Fig. 2 show a kind of sectional view for the LED chip structure that the embodiment of the present application is provided；
Fig. 3 show another sectional view for the LED chip structure that the embodiment of the present application is provided；
Fig. 4 show another sectional view for the LED chip structure that the embodiment of the present application is provided；
Fig. 5 show the close-up schematic view of P-type electrode part in the LED chip structure that Fig. 4 is provided；
Fig. 6 show the close-up schematic view of N-type electrode part in the LED chip structure that Fig. 4 is provided；
Fig. 7 show another sectional view for the LED chip structure that the embodiment of the present application is provided；
Fig. 8 show a kind of flow chart of the preparation method for the LED chip structure that the embodiment of the present application is provided,
Wherein, 1, substrate, 2, buffer layer, 3, n type semiconductor layer, 4, multi-quantum well luminescence layer, 5, p type semiconductor layer, 6,
Current barrier layer, 7, current extending, 8-1, P-type electrode, 8-2, N-type electrode, 9, transparent insulating layer.
Specific implementation mode
Some vocabulary has such as been used to censure specific components in specification and claim.Those skilled in the art answer
It is understood that hardware manufacturer may call the same component with different nouns.This specification and claims are not with name
The difference of title is used as the mode for distinguishing component, but is used as the criterion of differentiation with the difference of component functionally.Such as logical
The "comprising" of piece specification and claim mentioned in is an open language, therefore should be construed to " include but do not limit
In "." substantially " refer in receivable error range, those skilled in the art can be described within a certain error range solution
Technical problem basically reaches the technique effect.In addition, " coupling " word includes any direct and indirect electric property coupling herein
Means.Therefore, if it is described herein that a first device is coupled to a second device, then representing the first device can directly electrical coupling
It is connected to the second device, or the second device indirectly electrically coupled through other devices or coupling means.Specification
Subsequent descriptions be implement the application better embodiment, so it is described description be for the purpose of the rule for illustrating the application,
It is not limited to scope of the present application.The protection domain of the application is when subject to appended claims institute defender.
In addition, there is no the structures that component disclosed in claims and method and step are defined in embodiment for this specification
Part and method and step.In particular, the size for the structure member recorded in embodiments, material, shape, its structural order and neighbour
It connects sequence and manufacturing method etc. to limit as long as no specific, is just only used as and illustrates example, rather than the scope of the present invention is limited
Due to this.The size and location relationship of structure member shown in attached drawing is amplified and is shown to clearly illustrate.
The application is described in further detail below in conjunction with attached drawing, but not as the restriction to the application.
A kind of sectional view for the LED chip structure that the prior art is provided, the LED are shown referring firstly to Fig. 1, Fig. 1
Chip structure includes the substrate set gradually, buffer layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, electric current
Barrier layer, current extending and transparent insulating layer further include the P-type electrode being electrically connected with p type semiconductor layer and are partly led with N-type
The N-type electrode of body layer electrical connection.The LED chip of such structure is when luminous, since P-type electrode is located at multi-quantum well luminescence layer
The side of light direction, and N-type electrode is located at the side of multi-quantum well luminescence layer, in addition, due to P-type electrode and N-type electrode
Side is completely exposed, in this way, a part can be by P-type electrode and N-type electrode in the light that multi-quantum well luminescence layer is sent out
It is absorbed, this some light can not be that the brightness of LED chip is contributed, therefore the brightness of LED chip is made to be difficult to be improved.
In view of this, the present invention provides LED chip structure and preparation method thereof, can reduce electric in LED chip structure
Extremely to the absorption of light, reflection efficiency of the electrode to light is improved, and then is conducive to be promoted the brightness of LED chip structure.
Fig. 2 show a kind of sectional view for the LED chip structure that the embodiment of the present application is provided, referring to Fig. 2, the LED core
Chip architecture includes：Substrate, buffer layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, the electric current set gradually
Barrier layer, current extending and transparent insulating layer, transparent insulating layer are located at side and part N of the current extending far from substrate
Side of the type semiconductor layer far from substrate；
LED chip structure further includes P-type electrode and N-type electrode, and P-type electrode is located at one of p type semiconductor layer far from substrate
Side, P-type electrode sequentially pass through transparent insulating layer, current extending and current barrier layer and are electrically connected with p type semiconductor layer；N-type
Electrode is located at side of the n type semiconductor layer far from substrate, and N-type electrode is electrically connected through transparent insulating layer and with n type semiconductor layer；
P-type electrode orthographic projection of plane where substrate is overlapping with multi-quantum well luminescence layer, and N-type electrode is put down where substrate
The orthographic projection in face is not overlapped with multi-quantum well luminescence layer；
Wherein, at least partly side wall of P-type electrode is covered with the first reflective layer 11, and at least partly side wall of N-type electrode covers
It is stamped the second reflective layer 12.
Specifically, Fig. 2 is referred to, in the provided LED chip structure of the embodiment of the present application, the substrate that sets gradually, buffering
Layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer, current extending and transparent insulating layer, P
Type electrode is located at side of the p type semiconductor layer far from substrate and runs through transparent insulating layer, current extending and current barrier layer and P
Type semiconductor layer is electrically connected, and N-type electrode is located at side of the n type semiconductor layer far from substrate and through transparent insulating layer and N-type half
Conductor layer is electrically connected.It is not grow multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer on the n type semiconductor layer of part
With current extending, N-type electrode is set on this part n type semiconductor layer.The surface and multiple quantum well light emitting of N-type electrode
Layer is adjacent, and P-type electrode is located at side of the multi-quantum well luminescence layer far from substrate.In particular, the embodiment of the present application is in P-type electrode
At least partly side wall is provided with the first reflective layer 11, at least partly side wall of N-type electrode is provided with the second reflective layer 12, when more
When mqw light emitting layer shines, the light sent out is provided with the first reflective layer 11 or the second in reaching P-type electrode or N-type electrode
When the side wall of reflective layer 12, the first reflective layer 11 and the second luminescent layer can play the role of reflection to this some light, compare
In P-type electrode and N-type electrode side wall, the mode of the first reflective layer 11 or the second reflective layer 12, reality provided herein are not set
The absorption of P-type electrode and N-type electrode to light can be reduced by applying example, increase the light extraction efficiency of LED chip structure, meanwhile, first
Reflective layer 11 and the second reflective layer 12 have good reflex to light, by the first reflective layer 11 or the second reflective layer 12
The light of reflection is conducive to be promoted the brightness of LED chip structure.In addition, introducing the first reflective layer 11 in P-type electrode side wall and in N
The method and process route that type electrode sidewall introduces the second reflective layer 12 is simple, is conducive to industrialization production.
In embodiment illustrated in fig. 2, the partial sidewall of P-type electrode is only provided with the first reflective layer 11, while only in N-type electricity
The partial sidewall of pole is provided with the second reflective layer 12, to reduce light that P-type electrode and N-type electrode are reflected to the full extent
Amount, optionally, Fig. 3 show another sectional view for the LED chip structure that the embodiment of the present application is provided, and implement shown in Fig. 3
In example, the side wall of P-type electrode is all covered with the first reflective layer 11；It is at least adjacent with multi-quantum well luminescence layer in N-type electrode
Side wall is covered with the second reflective layer 12.
Specifically, Fig. 3 is referred to, since when multi-quantum well luminescence layer is when luminous, light can be conducted to P-type electrode
Entire side wall, and at least partly side wall adjacent with multiple quantum wells can be passed into N-type electrode, therefore, embodiment illustrated in fig. 3 will
The light contacts that may be sent out with multi-quantum well luminescence layer to P-type electrode entire side wall and N-type electrode at least with
The first reflective layer 11 and the second reflective layer 12 is respectively set in the adjacent side wall of multi-quantum well luminescence layer, to substantially reduce p-type
The possibility that electrode and N-type electrode absorb light will so have more light to be projected from LED chip, therefore be conducive to
Promote the brightness of LED chip.
Optionally, in the LED chip structure that the embodiment of the present application is provided, the first reflective layer 11 include aluminium, aluminium alloy and
At least one of silver, the second reflective layer 12 include at least one of aluminium, aluminium alloy and silver.In the actual production process,
One reflecting layer and the second reflecting layer can be used composite material and be made, and the material for having high reflectance be adulterated in composite material, herein
The material of high reflectance for example can be at least one of aluminium, aluminium alloy and silver, and composite material for example can be chromated aluminum, chromium
Change silver etc., the application is to this without specifically limiting.
Optionally, continuing with referring to Fig. 3, in the LED chip structure that the embodiment of the present application is provided, the first reflective layer 11
Height is identical as the height of P-type electrode, and the height of the second reflective layer 12 is identical as the height of N-type electrode；
The height of first reflective layer 11 is D1, and the height of the second reflective layer 12 is D2, wherein 1 μm≤D1≤3 μm, 1 μm≤
D2≤3μm。
Specifically, Fig. 3 is referred to, the height of the first reflective layer 11 is designed identical as the height of P-type electrode by the application,
And the height of the second reflective layer 12 is designed identical as the height of N-type electrode, on the one hand, the first reflective layer 11 can be by P
The side wall of type electrode blocks completely, and the second reflective layer 12 can be complete by side wall adjacent with multi-quantum well luminescence layer in N-type electrode
It blocks entirely, P-type electrode and N-type electrode is effectively prevent to absorb light, on the other hand, can also be arranged the according to P-type electrode
The height of one reflective layer 11, and according to the height of N-type electrode the second reflective layer 12 of setting, without being in addition 11 He of the first reflective layer
Other height are arranged in second reflective layer 12, thus are conducive to simplify the production procedure of LED chip, improve the production of LED chip
Efficiency.
Optionally, Fig. 4 show another sectional view for the LED chip structure that the embodiment of the present application is provided, shown in Fig. 5
The close-up schematic view of P-type electrode part in the LED chip structure provided by Fig. 4, Fig. 6 show the LED that Fig. 4 is provided
The close-up schematic view of N-type electrode part in chip structure, referring to Fig. 4 and Fig. 5, in the first reflective layer 11 and P-type electrode
At least one layer of the first metal layer 21 is provided between side wall, referring to Fig. 4 and Fig. 6, in the side wall of the second reflective layer 12 and N-type electrode
Between be provided at least one layer of second metal layer 22.
Specifically, referring to Fig. 4-Fig. 6, before the first reflective layer 11 is arranged in the side wall of P-type electrode, first in P-type electrode
At least one layer of the first metal layer 21 of side wall setting, is then arranged on the surface of side wall of the first metal layer 21 far from P-type electrode again
First reflective layer 11, the first metal layer 21 can either be with the side wall reliable connections of P-type electrode, and can be reliable with the first reflective layer 11
In conjunction with, therefore such mode improves the adhesive force of the first reflective layer 11, effectively prevent the first reflective layer 11 from the side of P-type electrode
Wall falls off, and reliable reflex is played to light, is conducive to the brightness for promoting LED chip.Similarly, in 12 He of the second reflective layer
At least one layer of second metal layer 22 is set between the side wall of N-type electrode, and second metal layer 22 can either can with the side wall of N-type electrode
By combining, and can be with 12 reliable connection of the second reflective layer, therefore such mode improves the adhesive force of the second reflective layer 12, effectively
It prevents the second reflective layer 12 from falling off from the side wall of N-type electrode, reliable reflex is played to light, be conducive to promote LED
The brightness of chip.
Optionally, referring to Fig. 5, in the LED chip structure that the embodiment of the present application is provided, the first reflective layer 11 and the first gold medal
The overall thickness for belonging to layer 21 is D3, and referring to Fig. 6, the overall thickness of the second reflective layer 12 and second metal layer 22 is D4, wherein 150 angstroms
≤ D3≤1500 angstrom, 150 angstroms≤D4≤1500 angstrom.
Optionally, Fig. 7 show another sectional view for the LED chip structure that the embodiment of the present application is provided, first
The surface of side wall of the reflective layer 11 far from P-type electrode layer is provided at least one layer of first transparent protective layer 31, in the second reflective layer
The surface of 12 side walls far from N-type electrode layer is provided at least one layer of second transparent protective layer 32.In this way, passing through the first transparent guarantor
Sheath 31 can play a certain protective role the first reflective layer 11, it is advantageously ensured that the integrity of the first reflective layer 11, leads to
The second reflective layer 12 can be played a certain protective role by crossing the second transparent protective layer 32, it is advantageously ensured that the second reflective layer 12
Integrity.
Optionally, the embodiment of the present application is done in the LED chip structure provided, and P-type electrode is cuboid, square, cylinder
Body or irregular cylinder, N-type electrode are cuboid, square, cylinder or irregular cylinder.Certainly, P-type electrode and N-type electricity
Pole may also be configured to other feasible structures, and the application is to this without specifically limiting.
Based on same inventive concept, the embodiment of the present application also provides a kind of preparation method of LED chip structure, shown in Fig. 8
A kind of flow chart of the preparation method of the LED chip structure provided by the embodiment of the present application, referring to Fig. 8, the embodiment of the present application
The preparation method of the LED chip structure provided includes：
Step 101 makes substrate, and processing is patterned to the first surface of substrate；
Step 102, on the first surface on grown buffer layer；
Step 103 grows n type semiconductor layer on the buffer layer；
Step 104 grows multi-quantum well luminescence layer on n type semiconductor layer；
Step 105, the growing P-type semiconductor layer in multi-quantum well luminescence layer；
Step 106 grows current barrier layer on p type semiconductor layer；
Current extending is grown in step 107, current barrier layer；
Step 108 makes P-type electrode and N-type electrode, and makes the first reflective layer in at least partly side wall of P-type electrode
11, make the second reflective layer 12 in at least partly side wall of N-type electrode；P-type electrode is located at one of p type semiconductor layer far from substrate
Side, P-type electrode sequentially pass through transparent insulating layer, current extending and current barrier layer and are electrically connected with p type semiconductor layer；N-type
Electrode is located at side of the n type semiconductor layer far from substrate, and N-type electrode is electrically connected through transparent insulating layer and with n type semiconductor layer；
The P-type electrode orthographic projection of plane and multi-quantum well luminescence layer where substrate is overlapping, the positive throwing of N-type electrode plane where substrate
Shadow is not overlapped with multi-quantum well luminescence layer；
Step 109 makes transparent insulating layer, and transparent insulating layer is located at side and part of the current extending far from substrate
Side of the n type semiconductor layer far from substrate, and cover the region other than P-type electrode and N-type electrode.
Specifically, in the preparation method for the LED chip structure that the embodiment of the present application is provided, by step 101-109 according to
Secondary making substrate, buffer layer, n type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer, current expansion
Layer, P-type electrode and N-type electrode, transparent insulating layer, finally so that P-type electrode is located at side of the p type semiconductor layer far from substrate simultaneously
It is electrically connected with p type semiconductor layer through transparent insulating layer, current extending and current barrier layer, N-type electrode is located at N-type semiconductor
Side of the layer far from substrate is simultaneously electrically connected through transparent insulating layer with n type semiconductor layer.It is not raw on the n type semiconductor layer of part
Long multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer and current extending, are arranged on this part n type semiconductor layer
N-type electrode.The surface of N-type electrode is adjacent with multi-quantum well luminescence layer, and P-type electrode is located at multi-quantum well luminescence layer far from lining
The side at bottom.In particular, the embodiment of the present application is provided with the first reflective layer 11 in at least partly side wall of P-type electrode, in N-type electricity
At least partly side wall of pole is provided with the second reflective layer 12, and when multi-quantum well luminescence layer shines, the light sent out reaches p-type
When being provided with the side wall of the first reflective layer 11 or the second reflective layer 12 in electrode or N-type electrode, the first reflective layer 11 and second hair
Photosphere can play the role of reflection to this some light, and the first reflective layer is not arranged compared in P-type electrode and N-type electrode side wall
11 or second reflective layer 12 mode, embodiment provided herein can reduce the suction of P-type electrode and N-type electrode to light
It receives, increases the light extraction efficiency of LED chip structure, meanwhile, the first reflective layer 11 and the second reflective layer 12 have light good
Reflex, the light reflected by the first reflective layer 11 or the second reflective layer 12 are conducive to be promoted the brightness of LED chip structure.
In addition, introducing the first reflective layer 11 in P-type electrode side wall and introducing the method and process road of the second reflective layer 12 in N-type electrode side wall
Line is simple, is conducive to industrialization production.
Optionally, in above-mentioned steps 108, the first reflective layer 11 is covered in at least portion of P-type electrode by way of vapor deposition
Side wall, the second reflective layer 12 is divided to be covered in at least partly side wall of N-type electrode by way of vapor deposition, wherein during vapor deposition,
The rotating speed that pot is deposited is r, and metal is aluminized as v, 8 turns/min≤r≤15 turn/min, 1 angstrom/s≤v≤15 angstrom/s.It needs to illustrate
It is that the first reflective layer 11 and the second luminescent layer can be composite material, the metal of its reflex is that aluminium, aluminium close in composite material
It is one or more in the materials such as gold, silver, moreover, at least one can be arranged between the first reflective layer 11 and the side wall of P-type electrode
Layer the first metal layer 21, the first metal layer 21 and the first reflective layer 11 form laminated construction, in the second reflective layer 12 and N-type electrode
Side wall between at least one layer of second metal layer 22 can be set, second metal layer 22 and the second reflective layer 12 form laminated construction,
Being provided with conducive to the adhesive force of the first reflective layer 11 and the second reflective layer 12 is increased for laminated construction, prevents 11 He of the first reflective layer
Second reflective layer 12 falls off from the side wall of P-type electrode or N-type electrode, is conducive to the first reflective layer 11 and the second reflective layer 12 plays
Reliable reflection action, to be conducive to promote the chip brightness of LED.
It should be noted that in above-mentioned steps 101, the material for forming substrate can be Si substrate materials, Sapphire Substrate
One kind in the materials such as material, SiC substrate material.Substrate material has grown buffer layer successively in MOCVD device, N-type is partly led
Body layer (N-GaN layers), multiple quantum well layer (MQW), p type semiconductor layer (P-GaN layers) full structure extension sheet.
One layer of SiO2 material is deposited as current barrier layer using PECVD device in full structure epitaxial on piece, and thickness exists
Between 500-3500A.SiO2 figures (and CB figures) are prepared using photoetching process and etch process.
Layer of transparent conductive layer ITO materials are deposited as electricity on the epitaxial wafer for preparing CB figures using the method for vapor deposition
Flow extension layer.It is being prepared into current extending pattern (ITO layer) by yellow light photoetching process and etch process, is utilizing photoetching work
Skill and ICP etching technics etch N-GaN layers.The upper radio frequency of ICP etchings is 100-330W, and lower radio frequency is 50-220W, vacuum degree
For 3-7mTorr, CL2：BCl3=3-6：1.Between ICP etching depths 0.8-1.4um.
Be deposited one layer of electrode in electrode position using the method for metal evaporation, the thickness of metal electrode 1.0-3.0um it
Between.Then pass through Tube alloys technique, metal alloy is carried out between 270 DEG C -350 DEG C, forms alloy electrode.
Using the method and etch process of metal evaporation, lamination high reflection mirror is prepared, lamination high reflection mirror pair herein
Include the first reflective layer 11 and at least one layer of the first metal layer 21 for P-type electrode, includes second anti-for N-type electrode
Photosphere 12 and at least one layer of second metal layer 22.Lamination high reflection mirror is combined for multiple material, wherein playing reflex
Metal can be one or more of materials such as aluminium (AL) or aluminium alloy, silver, and wherein lamination high reflection mirror position is located at
On the side wall of electrode homonymy, highly it is between 1.0-3.0um, width is between 150-1500A.Pot rotating speed is plated during vapor deposition
Turn/min in 8-15, metal-plated rate is between 1-15A/s.
Further, PECVD device and yellow light photoetching process are used with exterior domain in electrode, prepare transparent insulating layer,
The material of transparent insulating layer used can be Si3N4、SiO2One or more of equal materials.The thickness of transparent insulating layer exists
Between 500-2000A.
Further, by grinding, essence throw, the back of the body plating, cutting, sliver, point survey, sort etc. techniques prepare LED chip.
By the above various embodiments it is found that advantageous effect existing for the application is：
In LED chip structure provided herein and preparation method thereof, P-type electrode is at least in LED chip structure
The first reflective layer 11 is introduced in partial sidewall, and introduces the second reflective layer on at least partly side wall of N-type electrode, is being drawn
After entering the first reflective layer 11 and the second luminescent layer, the absorption of P-type electrode and N-type electrode to light can be reduced, increases LED chip
The light extraction efficiency of structure, meanwhile, the first reflective layer 11 and the second reflective layer have good reflex to light, by first
Reflective layer 11 or the light of the second reflective layer reflection are conducive to be promoted the brightness of LED chip structure.In addition, in P-type electrode side wall
It introduces the first reflective layer 11 and the method and process route for introducing the second reflective layer in N-type electrode side wall is simple, be conducive to industrialization
Production.
Several preferred embodiments of the application have shown and described in above description, but as previously described, it should be understood that the application
Be not limited to form disclosed herein, be not to be taken as excluding other embodiments, and can be used for various other combinations,
Modification and environment, and the above teachings or related fields of technology or knowledge can be passed through in application contemplated scope described herein
It is modified.And changes and modifications made by those skilled in the art do not depart from spirit and scope, then it all should be in this Shen
It please be in the protection domain of appended claims.
Claims (10)
1. a kind of LED chip structure, which is characterized in that the LED chip structure includes：Substrate, buffer layer, the N set gradually
Type semiconductor layer, multi-quantum well luminescence layer, p type semiconductor layer, current barrier layer, current extending and transparent insulating layer, it is described
Transparent insulating layer is located at the side and part n type semiconductor layer of the current extending far from substrate far from the substrate
Side；
The LED chip structure further includes P-type electrode and N-type electrode, and it is separate that the P-type electrode is located at the p type semiconductor layer
The side of the substrate, the P-type electrode sequentially pass through the transparent insulating layer, the current extending and the current blocking
Layer is simultaneously electrically connected with the p type semiconductor layer；The N-type electrode is located at side of the n type semiconductor layer far from the substrate,
The N-type electrode is electrically connected through the transparent insulating layer and with the n type semiconductor layer；
The P-type electrode is overlapping in the orthographic projection of plane where the substrate and the multi-quantum well luminescence layer, the N-type electrode
It is not overlapped with the multi-quantum well luminescence layer in the orthographic projection of plane where the substrate；
Wherein, at least partly side wall of the P-type electrode is covered with the first reflective layer, at least partly side wall of the N-type electrode
It is covered with the second reflective layer.
2. LED chip structure according to claim 1, which is characterized in that the side wall of the P-type electrode all covers
State the first reflective layer；It is anti-to be covered with described second to side wall at least adjacent with the multi-quantum well luminescence layer in the N-type electrode
Photosphere.
3. LED chip structure according to claim 1, which is characterized in that first reflective layer include aluminium, aluminium alloy and
At least one of silver, second reflective layer include at least one of aluminium, aluminium alloy and silver.
4. LED chip structure according to claim 1, which is characterized in that the height of first reflective layer and the p-type
The height of electrode is identical, and the height of second reflective layer is identical as the height of the N-type electrode；
The height of first reflective layer is D1, and the height of second reflective layer is D2, wherein 1 μm≤D1≤3 μm, 1 μm≤
D2≤3μm。
5. LED chip structure according to claim 1, which is characterized in that in first reflective layer and the P-type electrode
Side wall between be provided at least one layer of the first metal layer, set between second reflective layer and the side wall of the N-type electrode
It is equipped at least one layer of second metal layer.
6. LED chip structure according to claim 5, which is characterized in that first reflective layer and first metal
The overall thickness of layer is D3, and the overall thickness of second reflective layer and the second metal layer is D4, wherein 150 angstroms≤D3≤
1500 angstroms, 150 angstroms≤D4≤1500 angstrom.
7. LED chip structure according to claim 1, which is characterized in that in first reflective layer far from p-type electricity
The surface of the side wall of pole layer is provided at least one layer of first transparent protective layer, in second reflective layer far from the N-type electrode
The surface of the side wall of layer is provided at least one layer of second transparent protective layer.
8. LED chip structure according to claim 1, which is characterized in that the P-type electrode is cuboid, square, circle
Cylinder or irregular cylinder, the N-type electrode are cuboid, square, cylinder or irregular cylinder.
9. a kind of preparation method of LED chip structure, which is characterized in that the preparation method includes：
Substrate is made, processing is patterned to the first surface of substrate；
On the first surface on grown buffer layer；
N type semiconductor layer is grown on the buffer layer；
Multi-quantum well luminescence layer is grown on the n type semiconductor layer；
The growing P-type semiconductor layer in the multi-quantum well luminescence layer；
Current barrier layer is grown on the p type semiconductor layer；
Current extending is grown on the current barrier layer；
P-type electrode and N-type electrode are made, and the first reflective layer is made in at least partly side wall of the P-type electrode, in the N
At least partly side wall of type electrode makes the second reflective layer；The P-type electrode is located at the p type semiconductor layer far from the substrate
Side, the P-type electrode sequentially pass through the transparent insulating layer, the current extending and the current barrier layer and with institute
State p type semiconductor layer electrical connection；The N-type electrode is located at side of the n type semiconductor layer far from the substrate, the N-type
Electrode is electrically connected through the transparent insulating layer and with the n type semiconductor layer；The P-type electrode is in plane where the substrate
Orthographic projection and the multi-quantum well luminescence layer it is overlapping, the N-type electrode the orthographic projection of plane where the substrate with it is described
Multi-quantum well luminescence layer does not overlap；
Transparent insulating layer is made, the transparent insulating layer is located at described in side and part of the current extending far from substrate
Side of the n type semiconductor layer far from the substrate, and cover the region other than the P-type electrode and the N-type electrode.
10. the preparation method of LED chip structure according to claim 9, which is characterized in that first reflective layer passes through
The mode of vapor deposition is covered in at least partly side wall of the P-type electrode, and second reflective layer is covered in by way of vapor deposition
At least partly side wall of the N-type electrode, wherein during vapor deposition, the rotating speed that pot is deposited is r, and metal is aluminized as v, 8 turns/min
≤ r≤15 turn/min, 1 angstrom/s≤v≤15 angstrom/s.
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