CN106784192A - A kind of light-emitting diode chip for backlight unit and preparation method thereof - Google Patents
A kind of light-emitting diode chip for backlight unit and preparation method thereof Download PDFInfo
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- CN106784192A CN106784192A CN201611237083.1A CN201611237083A CN106784192A CN 106784192 A CN106784192 A CN 106784192A CN 201611237083 A CN201611237083 A CN 201611237083A CN 106784192 A CN106784192 A CN 106784192A
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- barrier layer
- current barrier
- layer
- perforate
- gallium nitride
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
Abstract
The invention provides a kind of preparation method of light-emitting diode chip for backlight unit, including step：A, current barrier layer is deposited on p type semiconductor layer, the thickness of current barrier layer is 250 1000nm；Now current barrier layer not perforate；B, transparency conducting layer is deposited on the current barrier layer of not perforate, now current barrier layer not perforate, transparency conducting layer perforate；Wet etching is carried out, photoresist is not removed；C, dry etching current barrier layer are to p-type gallium nitride layer upper surface.The application method processing step is simplified, and technological parameter is easily controllable, is adapted to industrialized production.
Description
Technical field
The present invention relates to technical field of semiconductors, especially, it is related to a kind of light-emitting diode chip for backlight unit and preparation method thereof.
Background technology
Push-pull effort during encapsulation bonding wire can not be met with the adhesive force of silica due to the adhesive force and metal of metal and ITO
It is required that, electrode can be caused to drop, cause the critical defect of semiconductor equipment.
In order to solve the above problems, the current barrier layer and ITO barrier layer of LED chip on the market all below P electrode
Need perforate.Common practice as shown in figure 1, be divided into five photoetching, respectively：Current barrier layer photoetching (is opened P electrode lower section
Hole), transparency conducting layer photoetching (P electrode lower section punches), mesa etch photoetching, NP electrode photoetching, protective layer photoetching.So do
The step of words photoetching, reaches five times, relatively costly and influence photoetching production capacity performance.
Chinese patent 201510547960.4 discloses a kind of preparation method of GaN base light emitting, including：In substrate
Upper formation extension lamination；Current blocking layer pattern and pattern for transparent conductive layer are formed in extension lamination；Dry etching is carried out, is made
Obtain the semiconductor layer of part N-type first exposed, form table top；Insulating protective layer is formed on table top, the insulating protective layer is entered
Row electrode photoetching, forms first electrode perforate and second electrode perforate, metal electrode is formed in electrode, so as to form hair
Optical diode.But, the pattern of the transparency conducting layer in such scheme and the photoetching in two steps of the dry etching of table top are carried out.
The content of the invention
It is secondary with photoetching in solving Tapping procedures present invention aim at a kind of preparation method of light-emitting diode chip for backlight unit is provided
The excessive technical problem of number.
To achieve the above object, the invention provides a kind of preparation method of light-emitting diode chip for backlight unit, including step：
A, current barrier layer is deposited on p type semiconductor layer, the thickness of current barrier layer is 250-1000nm；It is now electric
Flow barrier not perforate；
B, transparency conducting layer is deposited on the current barrier layer of not perforate, now current barrier layer not perforate is transparent to lead
Electric layer perforate；Wet etching is carried out, photoresist is not removed；
C, dry etching current barrier layer are to p-type gallium nitride layer upper surface.
Preferably, also including step D：
D, using wet etching mode, p-type gallium nitride layer is exposed in the current barrier layer removal that will be remained；Will with etching solution
Transparency conducting layer carries out secondary cleaning.
Preferably, the transparency conducting layer is plated on the p type semiconductor layer by evaporator or sputter coating method
Indium tin oxide films.
Preferably, the current barrier layer is the silica deposited by plasma enhanced chemical vapor deposition method
Film.
Preferably, the current barrier layer is with the etching selection ratio of gallium nitride：Current barrier layer：Gallium nitride ≈ 1:6.
The application also provides a kind of light-emitting diode chip for backlight unit, and the thickness of the current barrier layer is 250-1000nm.
Preferably, the current barrier layer is with the etching selection ratio of gallium nitride：Current barrier layer：Gallium nitride ≈ 1:6.
The invention has the advantages that：
Chip of the invention is completed due to transparency conducting layer photoetching and mesa etch light are engraved in same photoetching process,
Not only saved a photoetching number of times, and reduce the equipment precision error that causes mutually is aligned for Twi-lithography and in design
Increased offset distance is held, so as to increase luminous zone area.
The application method processing step is simplified, and technological parameter is easily controllable, is adapted to industrialized production.
In addition to objects, features and advantages described above, the present invention also has other objects, features and advantages.
Below with reference to figure, the present invention is further detailed explanation.
Brief description of the drawings
The accompanying drawing for constituting the part of the application is used for providing a further understanding of the present invention, schematic reality of the invention
Apply example and its illustrate, for explaining the present invention, not constitute inappropriate limitation of the present invention.In the accompanying drawings：
Fig. 1 is the Tapping procedures schematic diagram of prior art；
Fig. 2 is the Tapping procedures schematic diagram of the preferred embodiment of the present invention；
Fig. 3 is the finished product structure schematic diagram of the preferred embodiment of the present invention；
Wherein, 1- substrates, 2- cushions, 3-N type gallium nitride layers, 4- luminescent layers, 5-P type gallium nitride layers, 6- current blockings
Layer, 7- transparency conducting layers, 8-1-P electrodes, 8-2-N electrodes, 9- protective layers.
Specific embodiment
Embodiments of the invention are described in detail below in conjunction with accompanying drawing, but the present invention can be limited according to claim
Fixed and covering multitude of different ways is implemented.
Referring to Fig. 1, Fig. 2, this application provides a kind of more simple preparation method, following steps are specifically included：
Step one：In the axial direction, the cushion is set over the substrate, the n type semiconductor layer is set
On the cushion；The luminescent layer is arranged on the n type semiconductor layer, the p type semiconductor layer is arranged on institute
State on luminescent layer；
Step 2：The top of the chip body is deposited into current blocking by plasma enhanced chemical vapor deposition method
Layer, and produced by way of photoetching and need figure, now the current barrier layer below P electrode is not perforate, referring to Fig. 2
(a) and Fig. 2 (b).
Step 3：By the transparency conducting layer by evaporator or sputter coating method be plated in the p type semiconductor layer and
On current barrier layer, and produced by way of photoetching and need figure, now the transparency conducting layer below P electrode is perforate
, referring to Fig. 2 (b), after wet etching is complete, the mask that photoresist is used as next step dry etching is not removed.3rd EOS
When photoresist do not remove the mask for being used as and etching next time, so eliminate mesa etch mask pattern make photoetching.
Step 4：Chip is performed etching using inductively coupled plasma, normal gallium nitride region can be etched into N-type
Gallium nitride region, and current barrier layer below P electrode is due to the etching selection ratio with gallium nitride：Current barrier layer：Nitridation
Gallium ≈ 1:6, it is that will not be etched into p-type gallium nitride layer with the thickness (250-1000nm) for closing certain.Then wet etching is used
Mode will remain current barrier layer removal, expose p-type gallium nitride layer.Transparency conducting layer is carried out with etching solution again secondary clear
Aperture area and side wall are washed, it is some residue removals of edge are clean, it is to avoid electric leakage, referring to Fig. 2 (c).
Step 5：The P electrode and the N electrode are separately positioned on by evaporator or sputter coating method respectively
On the transparency conducting layer and the n type semiconductor layer.
Step 6：The top of second chip body is deposited into protection by plasma enhanced chemical vapor deposition method
Layer.
In addition, in normal operation, each photoetching contraposition has a precision problem for contraposition, typically at 3-5 microns, and
During wet etching, because isotropism can cause 2 microns of lateral erosion.
And the application by transparency conducting layer photoetching and mesa etch photoetching it is two-in-one after, only 2 microns of lateral erosion, without
There is a problem of aligning accuracy.The region that the making a circle in product week of i.e. normal 5 this photoetching has 6 microns does not have electrically conducting transparent
Layer, and the application only has the region of 2 microns.
By taking 10*10mil chips as an example：Chip area 250*250=62500 square microns, make a circle in week 4 microns of area
250*4*4=4000 square microns.Area about has more 4000/62500=6.4%.
Here is to test the blue light encapsulation of data that each embodiment is obtained.From following table, compared to traditional handicraft, the application
Advantageous or fair in terms of voltage, wavelength, luminous power, AVG each index, overall performance is better than traditional product.
The preferred embodiments of the present invention are the foregoing is only, is not intended to limit the invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.It is all within the spirit and principles in the present invention, made any repair
Change, equivalent, improvement etc., should be included within the scope of the present invention.
Claims (7)
1. a kind of preparation method of light-emitting diode chip for backlight unit, it is characterised in that including step：
A, current barrier layer is deposited on p type semiconductor layer, the thickness of current barrier layer is 250-1000nm；Now electric current resistance
Barrier not perforate；
B, transparency conducting layer is deposited on the current barrier layer of not perforate, now current barrier layer not perforate, transparency conducting layer
Perforate；Wet etching is carried out, photoresist is not removed；
C, dry etching current barrier layer are to p-type gallium nitride layer upper surface.
2. preparation method according to claim 1, it is characterised in that also including step D：
D, using wet etching mode, p-type gallium nitride layer is exposed in the current barrier layer removal that will be remained；Will be transparent with etching solution
Conductive layer carries out secondary cleaning.
3. preparation method according to claim 1, it is characterised in that the transparency conducting layer is by evaporator or splashes
Penetrate the indium tin oxide films that coating method is plated on the p type semiconductor layer.
4. preparation method according to claim 1, it is characterised in that the current barrier layer is by plasma enhancing
The silica membrane that chemical vapor deposition goes out.
5. preparation method according to claim 1, it is characterised in that the etching selection of the current barrier layer and gallium nitride
Than for：Current barrier layer：Gallium nitride ≈ 1:6.
6. a kind of light-emitting diode chip for backlight unit, it is characterised in that the thickness of the current barrier layer is 250-1000nm.
7. light-emitting diode chip for backlight unit according to claim 6, it is characterised in that the quarter of the current barrier layer and gallium nitride
Losing selection ratio is：Current barrier layer：Gallium nitride ≈ 1:6.
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| CN201611237083.1A CN106784192B (en) | 2016-12-28 | 2016-12-28 | A kind of light-emitting diode chip for backlight unit and preparation method thereof |
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| CN201611237083.1A CN106784192B (en) | 2016-12-28 | 2016-12-28 | A kind of light-emitting diode chip for backlight unit and preparation method thereof |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107293620A (en) * | 2017-07-13 | 2017-10-24 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| CN108110107A (en) * | 2017-12-18 | 2018-06-01 | 湘能华磊光电股份有限公司 | A kind of production method of LED chip |
| CN108336200A (en) * | 2018-03-27 | 2018-07-27 | 湘能华磊光电股份有限公司 | LED chip structure and preparation method thereof |
| CN108963039A (en) * | 2018-07-30 | 2018-12-07 | 湘能华磊光电股份有限公司 | A kind of LED epitaxial structure and preparation method thereof |
| CN109285924A (en) * | 2018-12-10 | 2019-01-29 | 合肥彩虹蓝光科技有限公司 | A kind of manufacturing method of semiconductor chip |
| CN109599464A (en) * | 2018-12-11 | 2019-04-09 | 合肥彩虹蓝光科技有限公司 | A kind of light-emitting diode chip for backlight unit and its manufacturing method and application |
| WO2020015630A1 (en) * | 2018-07-17 | 2020-01-23 | 厦门乾照光电股份有限公司 | Semiconductor chip of light-emitting diode, and method for manufacturing same |
| CN111710761A (en) * | 2020-06-29 | 2020-09-25 | 湘能华磊光电股份有限公司 | LED chip preparation method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120037636A (en) * | 2010-10-12 | 2012-04-20 | 엘지이노텍 주식회사 | A light emitting device and a light emitting device package |
| CN102694095A (en) * | 2011-03-22 | 2012-09-26 | 广东银雨芯片半导体有限公司 | Improved LED chip having current blocking layer and preparation method thereof |
| CN105244420A (en) * | 2015-08-28 | 2016-01-13 | 圆融光电科技股份有限公司 | Manufacturing method of GaN-based light emitting diode |
| CN106252476A (en) * | 2016-09-29 | 2016-12-21 | 山东浪潮华光光电子股份有限公司 | A kind of preparation method of GaN base light-emitting diode chip for backlight unit |
-
2016
- 2016-12-28 CN CN201611237083.1A patent/CN106784192B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120037636A (en) * | 2010-10-12 | 2012-04-20 | 엘지이노텍 주식회사 | A light emitting device and a light emitting device package |
| CN102694095A (en) * | 2011-03-22 | 2012-09-26 | 广东银雨芯片半导体有限公司 | Improved LED chip having current blocking layer and preparation method thereof |
| CN105244420A (en) * | 2015-08-28 | 2016-01-13 | 圆融光电科技股份有限公司 | Manufacturing method of GaN-based light emitting diode |
| CN106252476A (en) * | 2016-09-29 | 2016-12-21 | 山东浪潮华光光电子股份有限公司 | A kind of preparation method of GaN base light-emitting diode chip for backlight unit |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107293620A (en) * | 2017-07-13 | 2017-10-24 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| CN107293620B (en) * | 2017-07-13 | 2019-06-04 | 厦门乾照光电股份有限公司 | A kind of LED chip and preparation method thereof |
| CN108110107A (en) * | 2017-12-18 | 2018-06-01 | 湘能华磊光电股份有限公司 | A kind of production method of LED chip |
| CN108336200A (en) * | 2018-03-27 | 2018-07-27 | 湘能华磊光电股份有限公司 | LED chip structure and preparation method thereof |
| WO2020015630A1 (en) * | 2018-07-17 | 2020-01-23 | 厦门乾照光电股份有限公司 | Semiconductor chip of light-emitting diode, and method for manufacturing same |
| CN108963039A (en) * | 2018-07-30 | 2018-12-07 | 湘能华磊光电股份有限公司 | A kind of LED epitaxial structure and preparation method thereof |
| CN109285924A (en) * | 2018-12-10 | 2019-01-29 | 合肥彩虹蓝光科技有限公司 | A kind of manufacturing method of semiconductor chip |
| CN109599464A (en) * | 2018-12-11 | 2019-04-09 | 合肥彩虹蓝光科技有限公司 | A kind of light-emitting diode chip for backlight unit and its manufacturing method and application |
| CN111710761A (en) * | 2020-06-29 | 2020-09-25 | 湘能华磊光电股份有限公司 | LED chip preparation method |
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| CN106784192B (en) | 2019-10-29 |
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