CN108270424A - Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform - Google Patents
Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 57
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 57
- 238000005457 optimization Methods 0.000 title claims description 25
- 230000008859 change Effects 0.000 claims abstract description 53
- 238000000034 method Methods 0.000 claims abstract description 25
- 230000008569 process Effects 0.000 claims abstract description 25
- 238000013016 damping Methods 0.000 claims abstract description 24
- 230000001052 transient effect Effects 0.000 claims abstract description 16
- 230000000630 rising effect Effects 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims description 13
- 230000007423 decrease Effects 0.000 claims description 10
- 230000005764 inhibitory process Effects 0.000 claims description 3
- 230000009467 reduction Effects 0.000 claims description 3
- 230000006378 damage Effects 0.000 claims description 2
- 230000005611 electricity Effects 0.000 description 8
- 238000001514 detection method Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000003763 carbonization Methods 0.000 description 1
- 230000009514 concussion Effects 0.000 description 1
- 238000012053 enzymatic serum creatinine assay Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6877—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the control circuit comprising active elements different from those used in the output circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
- H03K17/08142—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0036—Means reducing energy consumption
Abstract
The invention discloses a kind of silicon carbide MOSFETs that optimizes to open the open loop driving circuit of waveform, including:Driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge;Become gate-drive resistance control circuit, for in the size of different phase control gate-drive resistance for opening transient process, wherein, in electric current ascent stage, the gate source voltage change rate of silicon carbide MOSFET is consistent with driving voltage rising change rate, electric current to be controlled to rise change rate and reverse current by the way that driving voltage is controlled to rise change rate;Depression of order section under voltage increases gate current, declines process, and reduce turn-on consumption with accelerating potential;Stablizing conducting phase, increasing gate pole damping resistance, in the case where not influencing switching speed, to inhibit gate voltage overshoot.The driving circuit structure is simple, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibits reverse current spike and gate voltage overshoot.
Description
Technical field
The present invention relates to Power Electronic Circuit technical field, more particularly to a kind of optimization silicon carbide MOSFET opens waveform
Open loop driving circuit.
Background technology
Silicon carbide MOSFET is a kind of novel electric semiconductor, still have from extensive industrialization at present with a certain distance from.By
Fast in silicon carbide device switching speed, gate voltage has more serious gate pole concussion and overshoot, may puncture Gate oxide
Layer causes device permanent failure, and larger current changing rate can bring more serious electromagnetic interference and larger open reversed electricity
Stream.Although the producers such as CREE provide driving, which can only change opening for silicon carbide MOSFET by changing gate resistor
Transient process is closed, it can only balanced compromise gate voltage hyperharmonic switching loss, switching speed and switching loss, it is difficult to realize carbonization
The optimization driving of silicon MOSFET.Closed-loop driving circuit is usually used in silicon IGBT (Insulated Gate Bipolar
Transistor, insulated gate bipolar transistor) optimization driving, need additional detection circuit and feedback circuit, but due to
Silicon carbide MOSFET switching speed is fast, and the bandwidth requirement and antijamming capability requirement to detection circuit and feedback circuit are very high, real
Existing complexity, it is difficult to for engineer application.
Open loop driving circuit does not need to detection circuit and what feedback circuit can optimize silicon carbide MOSFET opens waveform.Figure
1 is a kind of open loop driving circuit for silicon carbide MOSFET, and larger resistance R is used in electric current ascent stagegon, control electric current
Rise change rate and reverse current spike, switching tube Qbst is controlled by delay circuit, making it, depression of order section is open-minded under voltage, and
Additional gate current is injected by resistance Rbst, accelerating potential declines change rate, reduces turn-on consumption.Operation principle is as follows:
t0-t2:Qbst, which is in, closes section state, and driving voltage VCC passes through gate electrode resistance RgonElectricity is inputted to silicon carbide MOSFET
Hold Ciss(CgsAnd CgdThe sum of) charging, control resistance RgonControllable current rises change rate and reverse current;
t2-t3:Control delay time makes Qbst open-minded at this stage, and driving voltage VCC passes through gate electrode resistance RgonAnd Rbst
It charges to gate pole.Resistance Rbst branches can generate additional gate current Igbst, and accelerating potential declines process, and damage is opened in reduction
Consumption.
The driving circuit of the relevant technologies optimizes turn-on consumption while can controlling reverse current, but is lacked there are following
Point:
1) delay time is fixed, and can only have preferable effect of optimization under specific loading condition;
2) gate voltage overshoot is serious, and gate voltage overshoot usually exists in t3-t4 stages, the stage gate pole damping resistance
It is RgonWith the equivalent resistance of Rbst parallel connections, damping is smaller, and gate voltage spike can bigger.
In conclusion when the relevant technologies optimization silicon carbide MOSFET opens waveform, it is divided into close-loop driven and open loop driving two
Major class.The shortcomings of there are circuit complexity for close-loop driven, expensive, and detection circuit is easily disturbed.Although open loop driving circuit is electric
Road is simple, is easier to the advantages that realization, but current open loop driving is difficult to realize in the case where optimizing turn-on consumption, is inhibited simultaneously
Reverse current spike and gate voltage overshoot.
Invention content
The present invention is directed to solve at least some of the technical problems in related technologies.
For this purpose, it is an object of the invention to propose a kind of open loop driving circuit for optimizing silicon carbide MOSFET and opening waveform,
The driving circuit structure is simple, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibits reversely electricity
Flow spike and gate voltage overshoot.
In order to achieve the above objectives, the embodiment of the present invention proposes a kind of open loop drive for optimizing silicon carbide MOSFET and opening waveform
Dynamic circuit, including:Driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge;Become gate pole to drive
Dynamic resistance control circuit, for controlling the size of gate-drive resistance in the different phase for opening transient process, wherein, in electric current
Ascent stage, gate source voltage change rate and driving voltage the rising change rate of silicon carbide MOSFET are consistent, with by described in control
Driving voltage rises change rate control electric current and rises change rate and reverse current;Depression of order section under voltage increases gate current, with
Accelerating potential declines process, and reduces turn-on consumption;Stablize conducting phase, increase gate pole damping resistance, not influence out
It closes under speed, inhibits gate voltage overshoot.
The optimization silicon carbide MOSFET of the embodiment of the present invention opens the open loop driving circuit of waveform, can be on independent control electric current
The stage of liter and the transient process of voltage decline stage can increase the rise time control reverse current spike of capacitance voltage VC1, but
Gate resistor very little, can accelerating potential decline transient process, reduce turn-on consumption, broken under conventional driving circuit reverse current point
The contradiction at peak and turn-on consumption can inhibit gate voltage overshoot in the case where not influencing to open speed, by adding in compared with gate
Resistance inhibits gate voltage overshoot, but does not have an impact transient process, and do not interfere with silicon carbide MOSFET opens speed.
In addition, the open loop driving circuit that optimization silicon carbide MOSFET according to the above embodiment of the present invention opens waveform may be used also
With with following additional technical characteristic:
Further, in one embodiment of the invention, the driving voltage waveform generator includes:First capacitance
C1;Inductance L1With first resistor R1, the inductance L1With first resistor R1It is parallel with one another and with the first capacitance C1It is connected, with
To the first capacitance C1Charging.
Further, in one embodiment of the invention, the change gate-drive resistance control circuit includes:First
Pole driving resistance Rgon1With the second gate-drive resistance Rgon2, the second gate-drive resistance Rgon2Resistance value be more than described the
One gate-drive resistance Rgon1Resistance value;Metal-oxide-semiconductor MOSon, in the electric current ascent stage and the voltage decline stage, institute
It states metal-oxide-semiconductor MOSon and is in opening state, gate electrode resistance is the first gate-drive resistance Rgon1, and led in the stabilization
Logical stage, the metal-oxide-semiconductor MOSon are off state, and gate electrode resistance is the first gate-drive resistance Rgon1With second
Pole driving resistance Rgon2The sum of.
Further, in one embodiment of the invention, driving voltage VCC passes through the inductance L in parallel1With it is described
First resistor R1To the first capacitance C1Charging, the first capacitance C1There are one rise time, totem outputs for both end voltage
Voltage tightly follows the first capacitance C1Voltage.
Further, in one embodiment of the invention, the inductance L is adjusted1, the first resistor R1With described
One capacitance C1Value, to realize that the driving voltage VCC rises change rate.
Further, in one embodiment of the invention, in electric current ascent stage, gate source voltage Vgs tightly follows
One capacitance voltage VC1 according to the relationship of gate source voltage Vgs change rates described in drain current change rate direct ratio, controls the first capacitance
Voltage VC1 rise time, and then control gate source voltage change ratio, electric current to be controlled to rise change rate and reverse current spike.
Further, in one embodiment of the invention, depression of order section under voltage, the first capacitance voltage VC1 from
Miller voltage continues to increase toward driving voltage VCC, in the first gate-drive resistance Rgon1It is upper to generate larger gate current
It charges to miller capacitance, accelerating potential declines process, reduces turn-on consumption.
Further, in one embodiment of the invention, stablizing conducting phase, with first capacitance voltage
The increase of VC1, the gate source voltage of the metal-oxide-semiconductor MOSon reduce, and when the gate source voltage is less than threshold voltage, MOSon is closed
It is disconnected, the gate electrode resistance RgonFor the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
Further, in one embodiment of the invention, stablizing conducting phase, the gate pole damping resistance RgonCompared with
Greatly, damping factor is larger, and gate voltage overshoot is smaller.
Further, in one embodiment of the invention, in the gate pole damping resistance RgonWhen sufficiently large, the resistance
Buddhist nun's factor is more than 1, gate voltage overshoot complete inhibition.
The additional aspect of the present invention and advantage will be set forth in part in the description, and will partly become from the following description
It obtains significantly or is recognized by the practice of the present invention.
Description of the drawings
Above-mentioned and/or additional aspect and advantage of the invention will become from the following description of the accompanying drawings of embodiments
Significantly and it is readily appreciated that, wherein:
Fig. 1 is the open loop drive circuit schematic diagram for silicon carbide MOSFET of the relevant technologies;
Fig. 2 is silicon carbide MOSFET conventional driving circuit schematic diagram;
Fig. 3 is the comparison signal that transient process is opened under the open loop driving circuit driving of conventional driving circuit and the relevant technologies
Figure;
Fig. 4 is the knot for the open loop driving circuit that waveform is opened according to the optimization silicon carbide MOSFET of one embodiment of the invention
Structure schematic diagram;
Fig. 5 is the signal of the typical waveform of gate voltage and electric current under the driving circuit according to one embodiment of the invention
Figure.
Fig. 6 is the signal in t0-t3 moment gate current circulation paths according to the driving circuit of one embodiment of the invention
Figure;
Fig. 7 is the schematic diagram in t0-t3 moment equivalent circuits according to the driving circuit of one embodiment of the invention;
Fig. 8 is the signal in t3-t4 moment gate current circulation paths according to the driving circuit of one embodiment of the invention
Figure;
Fig. 9 is the schematic diagram in t3-t4 moment equivalent circuits according to the driving circuit of one embodiment of the invention.
Specific embodiment
The embodiment of the present invention is described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning to end
Same or similar label represents same or similar element or the element with same or like function.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to for explaining the present invention, and is not considered as limiting the invention.
Before introducing optimization silicon carbide MOSFET and opening the open loop driving circuit of waveform, traditional carbon is introduced first
SiClx MOSFET driving circuits.
Silicon carbide MOSFET has the characteristics that high blocking voltage, high junction temperature, high switching speed, is expected to substitution Si IGBT.Such as
Shown in Fig. 2, silicon carbide MOSFET conventional driving circuit can only be by controlling gate electrode resistance RgonWaveform is opened in control.In bridge arm knot
Under structure, using conventional driving circuit, there are following two pairs of contradictions for opening process:
1) turn-on consumption and reverse current spike.Work as RgonWhen smaller, turn-on consumption is small, but reverse current spike is big, influences
The relatively low single tube silicon carbide MOSFET of the reliability of power device, particularly current class;Work as RgonWhen larger, reverse current point
Peak becomes smaller, and but can significantly increase turn-on consumption, reduces system effectiveness and power density;
2) speed and gate voltage overshoot are opened.Work as RgonWhen smaller, gate pole loop damping is smaller, and gate voltage overshoot is tight
Weight, usually more than 25V, even more than 30V may puncture gate oxide, make power device permanent failure;Work as RgonWhen larger,
Gate pole loop damping becomes larger, and gate voltage overshoot reduces, and can but slow down and open speed.
And as shown in figure 3, the comparison of transient process is opened under conventional driving circuit and the driving of open loop driving circuit.Tradition
Under driving circuit, the waveform of opening of silicon carbide MOSFET is typically suboptimization.Closed-loop driving circuit can be by detecting gate pole
The modes such as voltage, drain current change rate, Miller platform control the transient state of opening of silicon carbide MOSFET, and waveform is opened in optimization.But
Its shortcoming is mainly reflected in the following aspects:
1) additional detection circuit and feedback circuit are needed, increases the complexity and cost of driving circuit;
2) silicon carbide MOSFET service time is usually in tens nanoseconds, to the bandwidth requirement of detection circuit and feedback circuit very
Height, and detection circuit is easily disturbed, and may influence the Actual Control Effect of Strong of driving.
Above-mentioned reason is based on, the embodiment of the present invention proposes a kind of open loop for optimizing silicon carbide MOSFET and opening waveform
Driving circuit.
The optimization silicon carbide MOSFET for describing to propose according to embodiments of the present invention with reference to the accompanying drawings opens the open loop of waveform
Driving circuit.
Fig. 4 is that the structure of open loop driving circuit that the optimization silicon carbide MOSFET of one embodiment of the invention opens waveform is shown
It is intended to.
As shown in figure 4, the open loop driving circuit 10 that the optimization silicon carbide MOSFET opens waveform includes:Driving voltage waveform
Generator 100 and change gate-drive resistance control circuit.
Wherein, driving voltage waveform generator 100 is used to generate the driving voltage waveform of a default rising edge.Become gate pole
Driving resistance control circuit 200 is used in the size of different phase control gate-drive resistance for opening transient process, wherein,
Electric current ascent stage, gate source voltage change rate and driving voltage the rising change rate of silicon carbide MOSFET are consistent, to pass through control
Driving voltage rises change rate control electric current and rises change rate and reverse current;Depression of order section under voltage increases gate current, with
Accelerating potential declines process, and reduces turn-on consumption;Stablize conducting phase, increase gate pole damping resistance, not influence out
It closes under speed, inhibits gate voltage overshoot.The driving circuit 10 of this hair embodiment opens driving available for silicon carbide MOSFET
Circuit is designed, simple in structure, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibits reverse current
Spike and gate voltage overshoot.
It is understood that driving voltage waveform generator 100 and change gate-drive resistance control circuit 200 combine, it can
With in the case where reducing turn-on consumption, while inhibit reverse current spike and gate voltage overshoot.
Further, in one embodiment of the invention, driving voltage waveform generator includes:First capacitance C1, electricity
Feel L1With first resistor R1。
Wherein, the first capacitance C1;Inductance L1With first resistor R1, inductance L1With first resistor R1It is parallel with one another and with first
Capacitance C1It is connected, with to the first capacitance C1Charging.
Specifically, driving voltage waveform generator 100 is made of a rlc circuit, wherein inductance L1With first resistor R1
Parallel connection, while to the first capacitance C1Charging, effect are to generate the driving voltage waveform of a specific rising edge.
The parameter of driving voltage waveform generator 100 calculates:
1)C1Calculating
For decoupling capacitance C1Voltage and silicon carbide MOSFET gate source voltage, capacitance C1Need sufficiently large, and C1It need to meet
Condition:
Wherein, βbufferIt is the current gain of totem.
2)R1Calculating
Capacitance C1It is determined under conditions of formula 1 is met.In order to meet under all load currents, electric current rises change rate
It can effectively be controlled with reverse current, capacitance C1The change rate of voltage should be as far as possible in the range of capacitance voltage be from VEE to VCC
It is consistent, then capacitance C1Electric current should be consistent in the voltage range.Capacitance C1Electric currentThe condition that should meet:
The electric current is to C1Charging, C1The condition that voltage change ratio should meet formula is:
If C1Voltage target change rateIt is known that can R be calculated by formula 21The condition that need to meet is:
Due to R1The chip current fan-out capability of front end is limited, then resistance R1It is limited by the condition, R1Formula need to be met
Outside 3, it is also necessary to which the restrictive condition of satisfaction is:
3)L1Calculating
Make capacitance C1Electric current is consistent, L1The incrementss of branch current should be approximately equal to R1The reduction amount of branch current, because
This L1、R1And C1The condition of satisfaction is:
Wherein, T is L1C1Harmonic period, T meet condition be:
L can be obtained according to formula 4 and 51The condition that need to meet is:
Further, in one embodiment of the invention, driving voltage VCC passes through inductance L in parallel1And first resistor
R1To the first capacitance C1Charging, the first capacitance C1There are one both end voltages the rise time, and totem output voltage tightly to follow first
Capacitance C1Voltage.
Further, in one embodiment of the invention, adjustment inductance L1, first resistor R1With the first capacitance C1Value,
To realize that driving voltage VCC rises change rate.
Further, in one embodiment of the invention, become gate-drive resistance control circuit 200 to include:First
Pole driving resistance Rgon1, the second gate-drive resistance Rgon2With metal-oxide-semiconductor MOSon.
Wherein, the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2, the second gate-drive resistance Rgon2's
Resistance value is more than the first gate-drive resistance Rgon1Resistance value.Metal-oxide-semiconductor MOSon, in electric current ascent stage and voltage decline stage,
Metal-oxide-semiconductor MOSon is in opening state, and gate electrode resistance is the first gate-drive resistance Rgon1, and stablizing conducting phase, MOS
Pipe MOSon is off state, and gate electrode resistance is the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
It is understood that become gate-drive resistance control circuit 200 by NMOS MOSon, two gate electrode resistances
Rgon1、Rgon2It forms, effect is to open transient process in difference, controls the size of gate resistor.
In addition, as shown in figure 4, the parameter for becoming gate-drive resistance control circuit 200 calculates:
1)Rgon1Calculating
The requirement R of the driving of the embodiment of the present inventiongon1A smaller value, can according in practical situations to Rgon1's
Value is finely adjusted, generally desirable 0 Ω to 3 Ω.
2)Rgon2Calculating
The requirement R of the driving of the embodiment of the present inventiongon2It is a higher value, it can be according to practical situations to Rgon2Value
It is adjusted, can generally be more than 10 Ω.
3) calculating of Vref
In order to which the driving for making the embodiment of the present invention is applied in full-load current, maximum load current I is consideredloadmax
Situation.According to the turn-on characteristics of silicon carbide MOSFET, it is known that in maximum load current situation, Miller voltage VmillermaxIt is full
Foot condition be:
Wherein, gfsIt is the mutual conductance of silicon carbide MOSFET, VthIt is the threshold voltage of silicon carbide MOSFET;
Depression of order section under voltage at this time, gate current Ig(t)It is full respectively with the miller capacitance charge Q gd of silicon carbide MOSFET
The condition of sufficient formula 6 and formula 7 is:
It can be calculated according to formula 6 and formula 7, the time T of voltage decline stagefallThe condition that should meet is:
In order to ensure that MOSon is turned off in the t3-t4 stages, the condition that Vref needs meet is:
Wherein, VMOSonthIt is the threshold voltage of MOSon.
Specifically, as shown in Figures 4 and 5, capacitance voltage VC1 keeps change rate consistent in the range of VEE to VCC, can protect
For card in total current loading range, control capacitance voltage VC1 can effectively control electric current to rise change rate and reverse current spike,
Transient state of opening under the present invention is driven according to the circulation path of gate current is divided into two stage controls, at the t0-t3 moment,
MOSon is in opening state, and the first gate-drive resistance is Rgon1, at the t3-t4 moment, MOSon is off state, gate pole electricity
It hinders for Rgon1And Rgon2The sum of.Rgon1It is a smaller value, is the gate electrode resistance at t0-t3 moment;Rgon2It is one relatively large
Value;Rgon1And Rgon2The sum of be the t3-t4 stages gate electrode resistance.
As shown in fig. 6, the driving circuit of the embodiment of the present invention is illustrated in t0-t3 moment gate current circulation paths, Fig. 7
Be the present invention driving circuit in t0-t3 moment equivalent circuits.Capacitance voltage VC1 passes through first resistor Rgon1It charges to gate pole,
First resistor Rgon1It is the input capacitance C of a smaller value and silicon carbide MOSFETissThe timeconstantτ of the circuit of compositioniss
Very small, the rise time of capacitance voltage VC1 is far longer than τiss。
t0-t3:Drive signal is converted to open-minded by turning off, and driving voltage is converted to VCC by VEE, and driving voltage VCC passes through
L in parallel1And R1Give capacitance C1Charging, totem output voltage follow capacitance C closely1Voltage VC1.MOSon source voltages are totem
The difference of output voltage VC1 and MOSon conduction voltage drops, are approximately equal to totem output voltage VC1, then MOSon gate source voltages are
The difference of Vref and VC1.At this stage, VC1 rises to VCC by VEE, is a smaller value, and MOSon gate source voltages are more than it
Threshold voltage, in the conduction state, it is R to ensure the stage gate electrode resistancegon1.Capacitance voltage VC1 passes through resistance Rgon1To silicon carbide
The gate pole charging of MOSFET, and Rgon1It is the input capacitance C of a smaller value and silicon carbide MOSFETissThe circuit of composition when
Between constant, τissVery small, the rise time that can meet capacitance voltage VC1 is far longer than τiss。
Further, in one embodiment of the invention, in electric current ascent stage, gate source voltage Vgs tightly follows
One capacitance voltage VC1 according to the relationship of drain current change rate direct ratio gate source voltage Vgs change rates, controls the first capacitance voltage
VC1 rise time, and then control gate source voltage change ratio, electric current to be controlled to rise change rate and reverse current spike.
It is understood that at electric current ascent stage (t1-t2), gate source voltage VgsCapacitance voltage VC1 is tightly followed, according to
Drain current change rate direct ratio gate source voltage VgsThe relationship of change rate controls the capacitance voltage VC1 rise time, then can control grid source
Voltage change ratio rises change rate and reverse current spike so as to control electric current.
Specifically, at electric current ascent stage (t1-t2), gate source voltage VgsCapacitance voltage VC1 is tightly followed, according to drain electrode
Current changing rate and gate source voltage VgsThe positively related relationship of change rate controls L1、R1And C1The value control capacitance voltage VC1 of three
Change rate, then silicon carbide MOSFET gate source voltage change rate is can control, so as to which its drain current be controlled to rise change rate and anti-
To current spike
Further, in one embodiment of the invention, depression of order section under voltage, the first capacitance voltage VC1 is from Miller
Voltage continues to increase toward driving voltage VCC, in the first gate-drive resistance Rgon1The larger gate current of upper generation gives Miller electricity
Capacity charge, accelerating potential decline process, reduce turn-on consumption.
It is understood that depression of order section (t2-t3), the first capacitance voltage VC1 continue from Miller voltage toward VCC under voltage
Increase, in smaller resistance Rgon1The larger gate current of upper generation gives miller capacitance to charge, and accelerating potential declines process, reduces
Turn-on consumption.And depression of order section (t2-t3), gate current are climbed to higher value Iv from smaller value Ic under voltage, accelerate electricity
Drops process reduces turn-on consumption.The value of Vref is adjusted, at the time of MOSon shutdowns can be adjusted.
Further, in one embodiment of the invention, stablizing conducting phase, with the first capacitance voltage VC1's
Increasing, the gate source voltage of metal-oxide-semiconductor MOSon reduces, when gate source voltage is less than threshold voltage, MOSon shutdowns, gate electrode resistance Rgon
For the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
In one embodiment of the invention, stablizing conducting phase, gate pole damping resistance RgonIt is larger, damping factor compared with
Greatly, gate voltage overshoot is smaller.
In one embodiment of the invention, in gate pole damping resistance RgonWhen sufficiently large, damping factor is more than 1, gate pole electricity
Press overshoot complete inhibition.
T3-t4 stage gate current circulation paths and equivalent circuit difference as shown in Figure 8 and Figure 9, are stablizing conducting phase
(t3-t4), with the increase of VC1, MOSon gate source voltages reduce, when its gate source voltage is less than threshold voltage, MOSon shutdowns,
Gate electrode resistance RgonEqual to Rgon1And Rgon2The sum of.Gate voltage overshoot typically occurs in the t3-t4 stages, at this time gate pole damping resistance
RgonLarger, damping factor is larger, and gate voltage overshoot is smaller.Work as RgonWhen sufficiently large, damping factor can be more than 1, gate voltage
Overshoot can be totally constrained.
Specifically, t3-t4:The stage, capacitance voltage VC1 continued to increase, and MOSon gate source voltages are the difference of Vref and VC1
Value, and with the increase of VC1, MOSon gate source voltages will reduce, when MOSon gate source voltages are less than its threshold voltage, MOSon
Shutdown, gate electrode resistance is by Rgon1Become Rgon, wherein RgonIt is Rgon1With Rgon2The sum of, Rgon2A higher value, then gate electrode resistance
RgonIt is a higher value.Gate voltage overshoot typically occurs in the t3-t4 stages, stage gate pole damping resistance RgonIt is larger, resistance
Buddhist nun's factor is larger, and gate voltage overshoot is smaller.Work as RgonWhen sufficiently large, damping factor can be more than 1, and gate voltage overshoot can be complete
It is complete to inhibit.
Optimization silicon carbide MOSFET according to embodiments of the present invention opens the open loop driving circuit of waveform, can independent control electricity
Ascent stage and the transient process of voltage decline stage are flowed, the rise time control reverse current point of capacitance voltage VC1 can be increased
Peak, but gate resistor very little, can accelerating potential decline transient process, reduce turn-on consumption, broken under conventional driving circuit reversely
The contradiction of current spike and turn-on consumption can inhibit gate voltage overshoot in the case where not influencing to open speed, pass through addition
Larger gate resistor inhibits gate voltage overshoot, but does not have an impact transient process, and do not interfere with silicon carbide MOSFET opens speed
Degree.
In the description of the present invention, it is to be understood that term " " center ", " longitudinal direction ", " transverse direction ", " length ", " width ",
" thickness ", " on ", " under ", "front", "rear", "left", "right", " vertical ", " level ", " top ", " bottom " " interior ", " outer ", " up time
The orientation or position relationship of the instructions such as needle ", " counterclockwise ", " axial direction ", " radial direction ", " circumferential direction " be based on orientation shown in the drawings or
Position relationship is for only for ease of the description present invention and simplifies description rather than instruction or imply that signified device or element must
There must be specific orientation, with specific azimuth configuration and operation, therefore be not considered as limiting the invention.
In addition, term " first ", " second " are only used for description purpose, and it is not intended that instruction or hint relative importance
Or the implicit quantity for indicating indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.In the description of the present invention, " multiple " are meant that at least two, such as two, three
It is a etc., unless otherwise specifically defined.
In the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " fixation " etc.
Term should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected or integral;Can be that machinery connects
It connects or is electrically connected;It can be directly connected, can also be indirectly connected by intermediary, can be in two elements
The connection in portion or the interaction relationship of two elements, unless otherwise restricted clearly.For those of ordinary skill in the art
For, the concrete meaning of above-mentioned term in the present invention can be understood as the case may be.
In the present invention unless specifically defined or limited otherwise, fisrt feature can be with "above" or "below" second feature
It is that the first and second features are in direct contact or the first and second features pass through intermediary mediate contact.Moreover, fisrt feature exists
Second feature " on ", " top " and " above " but fisrt feature right over second feature or oblique upper or be merely representative of
Fisrt feature level height is higher than second feature.Fisrt feature second feature " under ", " lower section " and " below " can be
One feature is immediately below second feature or obliquely downward or is merely representative of fisrt feature level height less than second feature.
In the description of this specification, reference term " one embodiment ", " example ", " is specifically shown " some embodiments "
The description of example " or " some examples " etc. means specific features, structure, material or the spy for combining the embodiment or example description
Point is contained at least one embodiment of the present invention or example.In the present specification, schematic expression of the above terms are not
It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office
It is combined in an appropriate manner in one or more embodiments or example.In addition, without conflicting with each other, the skill of this field
Art personnel can tie the different embodiments or examples described in this specification and the feature of different embodiments or examples
It closes and combines.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example
Property, it is impossible to limitation of the present invention is interpreted as, those of ordinary skill in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, changes, replacing and modification.
Claims (10)
1. a kind of open loop driving circuit for optimizing silicon carbide MOSFET and opening waveform, which is characterized in that including:
Driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge;
Become gate-drive resistance control circuit, in the big of the different phase control gate-drive resistance for opening transient process
It is small, wherein,
In electric current ascent stage, gate source voltage change rate and driving voltage the rising change rate of silicon carbide MOSFET are consistent, with logical
It crosses and the driving voltage is controlled to rise change rate control electric current rising change rate and reverse current;Depression of order section under voltage increases
Gate current declines process, and reduce turn-on consumption with accelerating potential;Stablize conducting phase, increase gate pole damping resistance, with
In the case where not influencing switching speed, inhibit gate voltage overshoot.
2. optimization silicon carbide MOSFET according to claim 1 opens the open loop driving circuit of waveform, which is characterized in that institute
Driving voltage waveform generator is stated to include:
First capacitance C1;
Inductance L1With first resistor R1, the inductance L1With first resistor R1It is parallel with one another and with the first capacitance C1It is connected,
With to the first capacitance C1Charging.
3. optimization silicon carbide MOSFET according to claim 1 opens the open loop driving circuit of waveform, which is characterized in that institute
Change gate-drive resistance control circuit is stated to include:
First gate-drive resistance Rgon1With the second gate-drive resistance Rgon2, the second gate-drive resistance Rgon2Resistance value
More than the first gate-drive resistance Rgon1Resistance value;
Metal-oxide-semiconductor MOSon, in the electric current ascent stage and the voltage decline stage, the metal-oxide-semiconductor MOSon is in open-minded
State, gate electrode resistance are the first gate-drive resistance Rgon1, and in the stable conducting phase, the metal-oxide-semiconductor MOSon
State is off, gate electrode resistance is the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
4. optimization silicon carbide MOSFET according to claim 2 opens the open loop driving circuit of waveform, which is characterized in that drives
Dynamic voltage VCC passes through the inductance L in parallel1With the first resistor R1To the first capacitance C1Charging, first capacitance
C1There are one both end voltages the rise time, and totem output voltage tightly to follow the first capacitance C1Voltage.
5. optimization silicon carbide MOSFET according to claim 4 opens the open loop driving circuit of waveform, which is characterized in that adjusts
The whole inductance L1, the first resistor R1With the first capacitance C1Value, to realize that the driving voltage VCC rises variation
Rate.
6. optimization silicon carbide MOSFET according to claim 3 opens the open loop driving circuit of waveform, which is characterized in that
Electric current ascent stage, gate source voltage Vgs tightly follow the first capacitance voltage VC1, according to grid described in drain current change rate direct ratio
The relationship of source voltage Vgs change rates controls the first capacitance voltage VC1 rise time, and then control gate source voltage change ratio, with control
Electric current processed rises change rate and reverse current spike.
7. optimization silicon carbide MOSFET according to claim 6 opens the open loop driving circuit of waveform, which is characterized in that
The voltage decline stage, the first capacitance voltage VC1 continues to increase toward driving voltage VCC from Miller voltage, at described first
Pole driving resistance Rgon1The larger gate current of upper generation gives miller capacitance to charge, and accelerating potential declines process, and damage is opened in reduction
Consumption.
8. optimization silicon carbide MOSFET according to claim 3 opens the open loop driving circuit of waveform, which is characterized in that
Stablize conducting phase, with the increase of the first capacitance voltage VC1, the gate source voltage of the metal-oxide-semiconductor MOSon reduces, and works as institute
When stating gate source voltage less than threshold voltage, MOSon shutdowns, the gate electrode resistance RgonFor the first gate-drive resistance Rgon1
With the second gate-drive resistance Rgon2The sum of.
9. optimization silicon carbide MOSFET according to claim 8 opens the open loop driving circuit of waveform, which is characterized in that
Stablize conducting phase, the gate pole damping resistance RgonLarger, damping factor is larger, and gate voltage overshoot is smaller.
10. optimization silicon carbide MOSFET according to claim 9 opens the open loop driving circuit of waveform, which is characterized in that
In the gate pole damping resistance RgonWhen sufficiently large, the damping factor is more than 1, gate voltage overshoot complete inhibition.
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