CN208272946U - Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform - Google Patents
Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform Download PDFInfo
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- CN208272946U CN208272946U CN201820297655.3U CN201820297655U CN208272946U CN 208272946 U CN208272946 U CN 208272946U CN 201820297655 U CN201820297655 U CN 201820297655U CN 208272946 U CN208272946 U CN 208272946U
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 49
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 49
- 238000005457 optimization Methods 0.000 title claims abstract description 22
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- 239000000463 material Substances 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 2
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- 229910003978 SiClx Inorganic materials 0.000 description 1
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- 229910052799 carbon Inorganic materials 0.000 description 1
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Abstract
The utility model discloses the open loop driving circuits that a kind of optimization silicon carbide MOSFET opens waveform, comprising: driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge；Become gate-drive resistance control circuit, for the size in the different phase control gate-drive resistance for opening transient process, wherein, in electric current ascent stage, the gate source voltage change rate of silicon carbide MOSFET is consistent with driving voltage rising change rate, controls electric current rising change rate and reverse current to rise change rate by control driving voltage；Depression of order section under voltage increases gate current, declines process with acceleration voltage, and reduce turn-on consumption；Stablizing conducting phase, increasing gate pole damping resistance, to inhibit gate voltage overshoot in the case where not influencing switching speed.The driving circuit structure is simple, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibiting reverse current spike and gate voltage overshoot.
Description
Technical field
The utility model relates to power electronic circuit technical field, in particular to a kind of optimization silicon carbide MOSFET opens wave
The open loop driving circuit of shape.
Background technique
Silicon carbide MOSFET is a kind of novel electric semiconductor, still have from extensive industrialization at present with a certain distance from.By
Fast in silicon carbide device switching speed, gate voltage has more serious gate pole concussion and overshoot, may puncture Gate oxide
Layer causes device permanent failure, and biggish current changing rate can bring more serious electromagnetic interference and biggish open reversed electricity
Stream.Although the producers such as CREE provide driving, which can only change opening for silicon carbide MOSFET by changing gate resistor
Transient process is closed, it can only balanced compromise gate voltage hyperharmonic switching loss, switching speed and switching loss, it is difficult to realize carbonization
The optimization of silicon MOSFET drives.Closed-loop driving circuit is usually used in silicon IGBT (Insulated Gate Bipolar
Transistor, insulated gate bipolar transistor) optimization driving, need additional detection circuit and feed circuit, but due to
Silicon carbide MOSFET switching speed is fast, and the bandwidth requirement and anti-interference ability requirement to detection circuit and feed circuit are very high, real
Existing complexity, it is difficult to be used for engineer application.
Open loop driving circuit does not need detection circuit and what feed circuit can optimize silicon carbide MOSFET opens waveform.Figure
1 is a kind of open loop driving circuit for silicon carbide MOSFET, uses larger resistance R in electric current ascent stagegon, control electric current
Rise change rate and reverse current spike, by delay circuit control switch pipe Qbst, making it, depression of order section is open-minded under voltage, and
Additional gate current is injected by resistance Rbst, acceleration voltage declines change rate, reduces turn-on consumption.Working principle is as follows:
T0-t2:Qbst is in section state of closing, and driving voltage VCC passes through gate electrode resistance RgonElectricity is inputted to silicon carbide MOSFET
Hold Ciss(CgsAnd CgdThe sum of) charging, control resistance RgonControllable current rises change rate and reverse current；
T2-t3: control delay time keeps Qbst open-minded at this stage, and driving voltage VCC passes through gate electrode resistance RgonAnd Rbst
It charges to gate pole.Resistance Rbst branch can generate additional gate current Igbst, and acceleration voltage declines process, and damage is opened in reduction
Consumption.
The driving circuit of the relevant technologies optimizes turn-on consumption while can control reverse current, but lacks there are following
Point:
1) delay time is fixed, and can only have preferable effect of optimization under specific loading condition；
2) gate voltage overshoot is serious, and gate voltage overshoot usually existed in the t3-t4 stage, the stage gate pole damping resistance
It is RgonWith the equivalent resistance of Rbst parallel connection, damping is smaller, and gate voltage spike can be bigger.
In conclusion being divided into close-loop driven and open loop driving two when the relevant technologies optimization silicon carbide MOSFET opens waveform
Major class.The disadvantages of there are circuit complexity for close-loop driven, expensive, and detection circuit is vulnerable to interference.Although open loop driving circuit electricity
Road is simple, is easier to the advantages that realizing, but current open loop driving is difficult to realize in the case where optimizing turn-on consumption, is inhibited simultaneously
Reverse current spike and gate voltage overshoot.
Utility model content
The utility model is intended to solve at least some of the technical problems in related technologies.
For this purpose, the purpose of this utility model is that proposing that a kind of optimization silicon carbide MOSFET opens the open loop driving electricity of waveform
Road, the driving circuit structure is simple, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibiting reversed
Current spike and gate voltage overshoot.
In order to achieve the above objectives, the utility model proposes the open loop drivings that a kind of optimization silicon carbide MOSFET opens waveform
Circuit, comprising: driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge；Become gate-drive
Resistance control circuit, for the size in the different phase control gate-drive resistance for opening transient process, wherein on electric current
The gate source voltage change rate in the stage of liter, silicon carbide MOSFET is consistent with driving voltage rising change rate, by controlling the drive
Dynamic voltage rises change rate control electric current and rises change rate and reverse current；Depression of order section under voltage increases gate current, to add
Fast voltage declines process, and reduces turn-on consumption；Stablize conducting phase, increases gate pole damping resistance, not influence to switch
Under speed, inhibit gate voltage overshoot.
This practical optimization silicon carbide MOSFET opens the open loop driving circuit of waveform, can independent control electric current ascent stage
With the transient process of voltage decline stage, the rise time control reverse current spike of capacitance voltage VC1, but gate resistor can be increased
Very little, can acceleration voltage decline transient process, reduce turn-on consumption, broken under conventional driving circuit reverse current spike and opened
The contradiction of logical loss, can inhibit gate voltage overshoot in the case where not influencing to open speed, by the way that larger gate resistor, suppression is added
Gate voltage overshoot processed, but the transient process that do not have an impact, will not influence silicon carbide MOSFET opens speed.
Further, the driving voltage waveform generator includes: first capacitor C1；Inductance L1With first resistor R1, described
Inductance L1With first resistor R1It is parallel with one another and with the first capacitor C1It is connected, to the first capacitor C1Charging.
Further, the change gate-drive resistance control circuit includes: the first gate-drive resistance Rgon1With second
Pole drives resistance Rgon2, the second gate-drive resistance Rgon2Resistance value be greater than the first gate-drive resistance Rgon1Resistance
Value；Metal-oxide-semiconductor MOSon, in the electric current ascent stage and the voltage decline stage, the metal-oxide-semiconductor MOSon is in and opens shape
State, gate electrode resistance are the first gate-drive resistance Rgon1, and at the stable conducting phase, the metal-oxide-semiconductor MOSon
In off state, gate electrode resistance is the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
Further, driving voltage VCC passes through the inductance L in parallel1With the first resistor R1To the first capacitor
C1Charging, the first capacitor C1Both end voltage has a rise time, and totem output voltage tightly follows the first capacitor
C1Voltage.
Further, the inductance L is adjusted1, the first resistor R1With the first capacitor C1Value, with realize described in
Driving voltage VCC rises change rate.
Further, in electric current ascent stage, gate source voltage Vgs tightly follows first capacitor voltage VC1, according to drain electrode electricity
The relationship of gate source voltage Vgs change rate described in rheology rate direct ratio controls the first capacitor voltage VC1 rise time, and then controls
Gate source voltage change rate rises change rate and reverse current spike to control electric current.
Further, depression of order section, the first capacitor voltage VC1 continue from Miller voltage toward driving voltage under voltage
VCC increases, in the first gate-drive resistance Rgon1The upper biggish gate current of generation gives miller capacitance to charge, acceleration voltage
Decline process reduces turn-on consumption.
Further, stablizing conducting phase, with the increase of the first capacitor voltage VC1, the metal-oxide-semiconductor MOSon
Gate source voltage reduce, when the gate source voltage be less than threshold voltage when, MOSon shutdown, the gate electrode resistance RgonIt is described
One gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
Further, stablizing conducting phase, the gate pole damping resistance RgonLarger, damping factor is larger, gate voltage
Overshoot is smaller.
Further, in the gate pole damping resistance RgonWhen sufficiently large, the damping factor is greater than 1, gate voltage overshoot
Complete inhibition.
The additional aspect of the utility model and advantage will be set forth in part in the description, partially will be from following description
In become obvious, or recognized by the practice of the utility model.
Detailed description of the invention
The utility model is above-mentioned and/or additional aspect and advantage from the following description of the accompanying drawings of embodiments will
Become obvious and be readily appreciated that, in which:
Fig. 1 is the open loop drive circuit schematic diagram for silicon carbide MOSFET of the relevant technologies；
Fig. 2 is silicon carbide MOSFET conventional driving circuit schematic diagram；
Fig. 3 illustrates to open the comparison of transient process under conventional driving circuit and the driving of the open loop driving circuit of the relevant technologies
Figure；
Fig. 4 is the open loop driving circuit that waveform is opened according to the optimization silicon carbide MOSFET of the utility model one embodiment
Structural schematic diagram；
Fig. 5 is to be shown according to the typical waveform of gate voltage and electric current under the driving circuit of the utility model one embodiment
It is intended to.
Fig. 6 is the driving circuit according to the utility model one embodiment in t0-t3 moment gate current circulation path
Schematic diagram；
Fig. 7 is the schematic diagram according to the driving circuit of the utility model one embodiment in t0-t3 moment equivalent circuit；
Fig. 8 is the driving circuit according to the utility model one embodiment in t3-t4 moment gate current circulation path
Schematic diagram；
Fig. 9 is the schematic diagram according to the driving circuit of the utility model one embodiment in t3-t4 moment equivalent circuit.
Specific embodiment
The embodiments of the present invention are described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning
Same or similar element or element with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, it is intended to for explaining the utility model, and should not be understood as to the utility model
Limitation.
Before introducing optimization silicon carbide MOSFET and opening the open loop driving circuit of waveform, traditional carbon is introduced first
SiClx MOSFET driving circuit.
Silicon carbide MOSFET has the characteristics that high blocking voltage, high junction temperature, high switching speed, is expected to replace Si IGBT.Such as
Shown in Fig. 2, silicon carbide MOSFET conventional driving circuit can only be by controlling gate electrode resistance RgonWaveform is opened in control.In bridge arm knot
Under structure, using conventional driving circuit, there are following two pairs of contradictions for opening process:
1) turn-on consumption and reverse current spike.Work as RgonWhen smaller, turn-on consumption is small, but reverse current spike is big, influences
The lower single tube silicon carbide MOSFET of the reliability of power device, especially current class；Work as RgonWhen larger, reverse current point
Peak becomes smaller, and can but obviously increase turn-on consumption, reduces system effectiveness and power density；
2) speed and gate voltage overshoot are opened.Work as RgonWhen smaller, gate pole loop damping is smaller, and gate voltage overshoot is tight
Weight, usually more than 25V, even more than 30V may puncture gate oxide, make power device permanent failure；Work as RgonWhen larger,
Gate pole loop damping becomes larger, and gate voltage overshoot reduces, and can but slow down and open speed.
And as shown in figure 3, opening the comparison of transient process under conventional driving circuit and the driving of open loop driving circuit.Tradition
Under driving circuit, the waveform of opening of silicon carbide MOSFET is usually suboptimization.Closed-loop driving circuit can be by detecting gate pole
The modes such as voltage, drain current change rate, Miller platform control the transient state of opening of silicon carbide MOSFET, and waveform is opened in optimization.But
Its disadvantage is mainly reflected in the following aspects:
1) additional detection circuit and feed circuit are needed, the complexity and cost of driving circuit are increased；
2) silicon carbide MOSFET service time is usually in tens nanoseconds, very to the bandwidth requirement of detection circuit and feed circuit
Height, and detection circuit may influence the Actual Control Effect of Strong of driving vulnerable to interference.
It is based on above-mentioned reason, the utility model embodiment proposes a kind of optimization silicon carbide MOSFET and opens waveform
Open loop driving circuit.
It describes to open waveform according to the optimization silicon carbide MOSFET that the utility model embodiment proposes with reference to the accompanying drawings
Open loop driving circuit.
Fig. 4 is the knot that the optimization silicon carbide MOSFET of the utility model one embodiment opens the open loop driving circuit of waveform
Structure schematic diagram.
As shown in figure 4, the open loop driving circuit 10 that the optimization silicon carbide MOSFET opens waveform includes: driving voltage waveform
Generator 100 and change gate-drive resistance control circuit.
Wherein, driving voltage waveform generator 100 is used to generate the driving voltage waveform of a default rising edge.Become gate pole
Driving resistance control circuit 200 is used for the size in the different phase control gate-drive resistance for opening transient process, wherein
The gate source voltage change rate of electric current ascent stage, silicon carbide MOSFET is consistent with driving voltage rising change rate, to pass through control
Driving voltage rises change rate control electric current and rises change rate and reverse current；Depression of order section under voltage increases gate current, with
Acceleration voltage declines process, and reduces turn-on consumption；Stablize conducting phase, increases gate pole damping resistance, not influence out
It closes under speed, inhibits gate voltage overshoot.What the driving circuit 10 of this hair embodiment can be used for silicon carbide MOSFET opens driving
Circuit design, structure is simple, is easier to realize, cost is relatively low, can be in the case where reducing turn-on consumption, while inhibiting reverse current
Spike and gate voltage overshoot.
It is understood that driving voltage waveform generator 100 and change gate-drive resistance control circuit 200 combine, it can
With in the case where reducing turn-on consumption, while inhibiting reverse current spike and gate voltage overshoot.
Further, in one embodiment of the utility model, driving voltage waveform generator includes: first capacitor
C1, inductance L1With first resistor R1。
Wherein, first capacitor C1；Inductance L1With first resistor R1, inductance L1With first resistor R1It is parallel with one another and with first
Capacitor C1It is connected, to first capacitor C1Charging.
Specifically, driving voltage waveform generator 100 is made of a rlc circuit, wherein inductance L1With first resistor R1
Parallel connection, while giving first capacitor C1Charging, effect are the driving voltage waveforms for generating a specific rising edge.
The parameter of driving voltage waveform generator 100 calculates:
1)C1Calculating
For decoupling capacitance C1Voltage and silicon carbide MOSFET gate source voltage, capacitor C1Need sufficiently large, and C1It need to meet
Condition:
Wherein, βbufferIt is the current gain of totem.
2)R1Calculating
Capacitor C1It is determined under conditions of meeting formula 1.In order to meet under all load currents, electric current rises change rate
It can effectively be controlled with reverse current, capacitor C1The change rate of voltage should be as far as possible in the range of capacitance voltage be from VEE to VCC
It is consistent, then capacitor C1Electric current should be consistent in the voltage range.Capacitor C1Electric currentThe condition that should meet:
The electric current is to C1Charging, C1Voltage change ratio should meet the condition of formula are as follows:
If C1Voltage target change rateIt is known that R can be calculated by formula 21The condition that need to meet are as follows:
Due to R1The chip current fan-out capability of front end is limited, then resistance R1It is limited by the condition, R1Formula need to be met
Outside 3, it is also necessary to the restrictive condition of satisfaction are as follows:
3)L1Calculating
Make capacitor C1Electric current is consistent, L1The incrementss of branch current should be approximately equal to R1The reduction amount of branch current, because
This L1、R1And C1The condition of satisfaction are as follows:
Wherein, T is L1C1Harmonic period, T meet condition are as follows:
L can be obtained according to formula 4 and 51The condition that need to meet are as follows:
Further, in one embodiment of the utility model, driving voltage VCC passes through inductance L in parallel1With first
Resistance R1Give first capacitor C1Charging, first capacitor C1Both end voltage has a rise time, and totem output voltage tightly follows
First capacitor C1Voltage.
Further, in one embodiment of the utility model, inductance L is adjusted1, first resistor R1With first capacitor C1
Value, with realize driving voltage VCC rise change rate.
Further, in one embodiment of the utility model, becoming gate-drive resistance control circuit 200 includes: the
One gate-drive resistance Rgon1, the second gate-drive resistance Rgon2With metal-oxide-semiconductor MOSon.
Wherein, the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2, the second gate-drive resistance Rgon2's
Resistance value is greater than the first gate-drive resistance Rgon1Resistance value.Metal-oxide-semiconductor MOSon, in electric current ascent stage and voltage decline stage,
Metal-oxide-semiconductor MOSon is in opening state, and gate electrode resistance is the first gate-drive resistance Rgon1, and stablizing conducting phase, MOS
Pipe MOSon is in an off state, and gate electrode resistance is the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
It is understood that becoming gate-drive resistance control circuit 200 by NMOS MOSon, two gate electrode resistances
Rgon1、Rgon2It constitutes, effect is to open transient process in difference, controls the size of gate resistor.
In addition, as shown in figure 4, the parameter for becoming gate-drive resistance control circuit 200 calculates:
1)Rgon1Calculating
The requirement R of the driving of the utility model embodimentgon1It is a smaller value, it can be according to right in practical situations
Rgon1Value be finely adjusted, generally desirable 0 Ω to 3 Ω.
2)Rgon2Calculating
The requirement R of the driving of the utility model embodimentgon2It is a larger value, it can be according to practical situations to Rgon2
Value be adjusted, can generally be greater than 10 Ω.
3) calculating of Vref
In order to apply the driving of the utility model embodiment in full-load current, maximum load current is considered
IloadmaxThe case where.According to the turn-on characteristics of silicon carbide MOSFET, it is known that in maximum load current situation, Miller voltage
VmillermaxThe condition of satisfaction are as follows:
Wherein, gfsIt is the mutual conductance of silicon carbide MOSFET, VthIt is the threshold voltage of silicon carbide MOSFET；
Depression of order section under voltage at this time, gate current Ig(t)It is full respectively with the miller capacitance charge Q gd of silicon carbide MOSFET
The condition of sufficient formula 6 and formula 7 are as follows:
It can be calculated according to formula 6 and formula 7, the time T of voltage decline stagefallThe condition that should meet are as follows:
In order to guarantee that MOSon is turned off in the t3-t4 stage, Vref needs the condition met are as follows:
Wherein, VMOSonthIt is the threshold voltage of MOSon.
Specifically, as shown in Figures 4 and 5, capacitance voltage VC1 keeps change rate consistent in the range of VEE to VCC, can protect
In total current loading range, control capacitance voltage VC1 can effectively control electric current and rise change rate and reverse current spike card,
The transient state of opening under the utility model driving is divided into two stage controls according to the circulation path of gate current, in t0-t3
It carves, MOSon is in opening state, and the first gate-drive resistance is Rgon1, at the t3-t4 moment, MOSon is in an off state, door
Electrode resistance is Rgon1And Rgon2The sum of.Rgon1It is a lesser value, is the gate electrode resistance at t0-t3 moment；Rgon2It is one opposite
Biggish value；Rgon1And Rgon2The sum of be the t3-t4 stage gate electrode resistance.
As shown in fig. 6, illustrating the driving circuit of the utility model embodiment in t0-t3 moment gate current logical circulation road
Diameter, Fig. 7 are the driving circuits of the utility model in t0-t3 moment equivalent circuit.Capacitance voltage VC1 passes through first resistor Rgon1It gives
Gate pole charging, first resistor Rgon1It is the input capacitance C of a lesser value and silicon carbide MOSFETissThe circuit of composition when
Between constant, τissVery small, the rise time of capacitance voltage VC1 is far longer than τiss。
T0-t3: driving signal is converted to open-minded by turning off, and driving voltage is converted to VCC by VEE, and driving voltage VCC passes through
L in parallel1And R1Give capacitor C1Charging, totem output voltage follow capacitor C closely1Voltage VC1.MOSon source voltage is totem
The difference of output voltage VC1 and MOSon conduction voltage drop are approximately equal to totem output voltage VC1, then MOSon gate source voltage is
The difference of Vref and VC1.At this stage, VC1 rises to VCC by VEE, is a lesser value, and MOSon gate source voltage is greater than it
Threshold voltage, it is in the conductive state, guarantee that the stage gate electrode resistance is Rgon1.Capacitance voltage VC1 passes through resistance Rgon1To silicon carbide
The gate pole of MOSFET charges, and Rgon1It is the input capacitance C of a smaller value and silicon carbide MOSFETissThe circuit of composition when
Between constant, τissVery small, the rise time that can meet capacitance voltage VC1 is far longer than τiss。
Further, in one embodiment of the utility model, in electric current ascent stage, gate source voltage Vgs tightly with
First capacitor is controlled according to the relationship of drain current change rate direct ratio gate source voltage Vgs change rate with first capacitor voltage VC1
Voltage VC1 rise time, and then control gate source voltage change ratio rise change rate and reverse current spike to control electric current.
It is understood that at electric current ascent stage (t1-t2), gate source voltage VgsCapacitance voltage VC1 is tightly followed, according to
Drain current change rate direct ratio gate source voltage VgsThe relationship of change rate controls the capacitance voltage VC1 rise time, then can control grid source
Voltage change ratio, so that controlling electric current rises change rate and reverse current spike.
Specifically, at electric current ascent stage (t1-t2), gate source voltage VgsCapacitance voltage VC1 is tightly followed, according to drain electrode
Current changing rate and gate source voltage VgsThe positively related relationship of change rate controls L1、R1And C1The value of three controls capacitance voltage VC1
Change rate, then can control silicon carbide MOSFET gate source voltage change rate, so that controlling its drain current rises change rate and anti-
To current spike
Further, in one embodiment of the utility model, depression of order section under voltage, first capacitor voltage VC1 from
Miller voltage continues to increase toward driving voltage VCC, in the first gate-drive resistance Rgon1It is upper to generate biggish gate current to rice
Capacitor charging is strangled, acceleration voltage declines process, reduces turn-on consumption.
It is understood that depression of order section (t2-t3), first capacitor voltage VC1 continue from Miller voltage toward VCC under voltage
Increase, in lesser resistance Rgon1The upper biggish gate current of generation gives miller capacitance to charge, and acceleration voltage declines process, reduces
Turn-on consumption.And depression of order section (t2-t3), gate current are climbed to the larger value Iv from smaller value Ic under voltage, accelerate electricity
Drops process reduces turn-on consumption.The value of Vref is adjusted, at the time of adjustable MOSon is turned off.
Further, in one embodiment of the utility model, stablizing conducting phase, with first capacitor voltage
The gate source voltage of the increase of VC1, metal-oxide-semiconductor MOSon reduces, when gate source voltage is less than threshold voltage, MOSon shutdown, and gate pole electricity
Hinder RgonFor the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
In one embodiment of the utility model, stablizing conducting phase, gate pole damping resistance RgonIt is larger, damping because
Son is larger, and gate voltage overshoot is smaller.
In one embodiment of the utility model, in gate pole damping resistance RgonWhen sufficiently large, damping factor is greater than 1, door
Pole tension overshoot complete inhibition.
T3-t4 stage gate current circulation path and equivalent circuit difference are as shown in Figure 8 and Figure 9, are stablizing conducting phase
(t3-t4), with the increase of VC1, MOSon gate source voltage reduces, when its gate source voltage is less than threshold voltage, MOSon shutdown,
Gate electrode resistance RgonEqual to Rgon1And Rgon2The sum of.Gate voltage overshoot typically occurs in the t3-t4 stage, at this time gate pole damping resistance
RgonLarger, damping factor is larger, and gate voltage overshoot is smaller.Work as RgonWhen sufficiently large, damping factor can be greater than 1, gate voltage
Overshoot can be totally constrained.
Specifically, t3-t4: the stage, capacitance voltage VC1 was continued growing, and MOSon gate source voltage is the difference of Vref and VC1
Value, and with the increase of VC1, MOSon gate source voltage will reduce, when MOSon gate source voltage is lower than its threshold voltage, MOSon
Shutdown, gate electrode resistance is by Rgon1Become Rgon, wherein RgonIt is Rgon1With Rgon2The sum of, Rgon2It is a larger value, then gate electrode resistance
RgonIt is a larger value.Gate voltage overshoot typically occurs in the t3-t4 stage, stage gate pole damping resistance RgonIt is larger, resistance
Buddhist nun's factor is larger, and gate voltage overshoot is smaller.Work as RgonWhen sufficiently large, damping factor can be greater than 1, and gate voltage overshoot can be complete
It is complete to inhibit.
The open loop driving circuit that waveform is opened according to the optimization silicon carbide MOSFET of the utility model embodiment, can independently control
The transient process of electric current ascent stage and voltage decline stage processed can increase the reversed electricity of rise time control of capacitance voltage VC1
Flow spike, but gate resistor very little, can acceleration voltage decline transient process, reduce turn-on consumption, broken under conventional driving circuit
The contradiction of reverse current spike and turn-on consumption can inhibit gate voltage overshoot in the case where not influencing to open speed, pass through
Larger gate resistor is added, inhibits gate voltage overshoot, but the transient process that do not have an impact, will not influence opening for silicon carbide MOSFET
Logical speed.
In the description of the present invention, it should be understood that term " center ", " longitudinal direction ", " transverse direction ", " length ", " width
Degree ", " thickness ", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom" "inner", "outside", " suitable
The orientation or positional relationship of the instructions such as hour hands ", " counterclockwise ", " axial direction ", " radial direction ", " circumferential direction " is orientation based on the figure
Or positional relationship, be merely for convenience of describing the present invention and simplifying the description, rather than the device of indication or suggestion meaning or
Element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as the limit to the utility model
System.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance
Or implicitly indicate the quantity of indicated technical characteristic.Define " first " as a result, the feature of " second " can be expressed or
Implicitly include at least one this feature.The meaning of " plurality " is at least two, such as two in the description of the present invention,
It is a, three etc., unless otherwise specifically defined.
In the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " Gu
It is fixed " etc. terms shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；It can be
Mechanical connection, is also possible to be electrically connected；It can be directly connected, two can also be can be indirectly connected through an intermediary
The interaction relationship of connection or two elements inside element, unless otherwise restricted clearly.For the common skill of this field
For art personnel, the concrete meaning of above-mentioned term in the present invention can be understood as the case may be.
In the present invention unless specifically defined or limited otherwise, fisrt feature is in the second feature " on " or " down "
It can be that the first and second features directly contact or the first and second features are by intermediary mediate contact.Moreover, first is special
Sign can be fisrt feature above the second feature " above ", " above " and " above " and be directly above or diagonally above the second feature, or only
Indicate that first feature horizontal height is higher than second feature.Fisrt feature under the second feature " below ", " below " and " below " can be with
It is that fisrt feature is directly under or diagonally below the second feature, or is merely representative of first feature horizontal height less than second feature.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is contained at least one embodiment or example of the utility model.In the present specification, to the schematic table of above-mentioned term
It states and is necessarily directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be with
It can be combined in any suitable manner in any one or more of the embodiments or examples.In addition, without conflicting with each other, this field
Technical staff can by the feature of different embodiments or examples described in this specification and different embodiments or examples into
Row combination and combination.
Although the embodiments of the present invention have been shown and described above, it is to be understood that above-described embodiment is
Illustratively, it should not be understood as limiting the present invention, those skilled in the art are in the scope of the utility model
Inside it can make changes, modifications, alterations, and variations to the above described embodiments.
Claims (3)
1. the open loop driving circuit that a kind of optimization silicon carbide MOSFET opens waveform characterized by comprising
Driving voltage waveform generator, for generating the driving voltage waveform of a default rising edge；
Become gate-drive resistance control circuit, in the big of the different phase control gate-drive resistance for opening transient process
It is small, wherein
It is consistent with driving voltage rising change rate in the gate source voltage change rate of electric current ascent stage, silicon carbide MOSFET, with logical
It crosses and controls the driving voltage rising change rate control electric current rising change rate and reverse current；Depression of order section under voltage increases
Gate current declines process with acceleration voltage, and reduces turn-on consumption；Stablize conducting phase, increases gate pole damping resistance, with
In the case where not influencing switching speed, inhibit gate voltage overshoot.
2. the open loop driving circuit that optimization silicon carbide MOSFET according to claim 1 opens waveform, which is characterized in that institute
Stating driving voltage waveform generator includes:
First capacitor C1；
Inductance L1With first resistor R1, the inductance L1With first resistor R1It is parallel with one another and with the first capacitor C1It is connected,
To the first capacitor C1Charging.
3. the open loop driving circuit that optimization silicon carbide MOSFET according to claim 1 opens waveform, which is characterized in that institute
Stating change gate-drive resistance control circuit includes:
First gate-drive resistance Rgon1With the second gate-drive resistance Rgon2, the second gate-drive resistance Rgon2Resistance value
Greater than the first gate-drive resistance Rgon1Resistance value；
Metal-oxide-semiconductor MOSon, in the electric current ascent stage and the voltage decline stage, the metal-oxide-semiconductor MOSon is in open-minded
State, gate electrode resistance are the first gate-drive resistance Rgon1, and in the stable conducting phase, the metal-oxide-semiconductor MOSon
In an off state, gate electrode resistance is the first gate-drive resistance Rgon1With the second gate-drive resistance Rgon2The sum of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820297655.3U CN208272946U (en) | 2018-03-02 | 2018-03-02 | Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820297655.3U CN208272946U (en) | 2018-03-02 | 2018-03-02 | Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform |
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| CN208272946U true CN208272946U (en) | 2018-12-21 |
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|---|---|---|---|
| CN201820297655.3U Withdrawn - After Issue CN208272946U (en) | 2018-03-02 | 2018-03-02 | Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108270424A (en) * | 2018-03-02 | 2018-07-10 | 清华大学 | Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform |
| CN113810035A (en) * | 2021-09-07 | 2021-12-17 | 深圳市福瑞电气有限公司 | Control method and circuit for parallel connection of silicon carbide MOSFET (metal oxide semiconductor field effect transistor) multiple tubes |
-
2018
- 2018-03-02 CN CN201820297655.3U patent/CN208272946U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108270424A (en) * | 2018-03-02 | 2018-07-10 | 清华大学 | Optimization silicon carbide MOSFET opens the open loop driving circuit of waveform |
| CN108270424B (en) * | 2018-03-02 | 2024-05-07 | 清华大学 | Open-loop driving circuit for optimizing silicon carbide MOSFET (Metal-oxide-semiconductor field Effect transistor) on waveform |
| CN113810035A (en) * | 2021-09-07 | 2021-12-17 | 深圳市福瑞电气有限公司 | Control method and circuit for parallel connection of silicon carbide MOSFET (metal oxide semiconductor field effect transistor) multiple tubes |
| CN113810035B (en) * | 2021-09-07 | 2024-06-11 | 深圳市福瑞电气有限公司 | Control method and circuit for parallel connection of silicon carbide MOSFET (Metal-oxide-semiconductor field Effect transistor) multiple tubes |
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