CN110212740B - Drive circuit for inhibiting gate crosstalk and oscillation of SiC MOSFET (Metal-oxide-semiconductor field Effect transistor) - Google Patents
Drive circuit for inhibiting gate crosstalk and oscillation of SiC MOSFET (Metal-oxide-semiconductor field Effect transistor) Download PDFInfo
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- H—ELECTRICITY
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- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
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- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
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Abstract
The invention provides a driving circuit for inhibiting gate crosstalk and oscillation of a SiC MOSFET (metal oxide semiconductor field effect transistor), and belongs to the technical field of driving circuits of power electronic switching devices. The technical scheme is as follows: a drive circuit for inhibiting gate crosstalk and oscillation of a SiC MOSFET (metal oxide semiconductor field effect transistor) comprises a push-pull circuit and a capacitance auxiliary circuit, wherein the push-pull circuit and the capacitance auxiliary circuit are connected to a main circuit to form a complete working circuit; the main circuit consists of an upper SiC MOSFET switching tube and a lower SiC MOSFET switching tube which are connected on the same bridge arm. The invention has the beneficial effects that: the invention can effectively reduce the crosstalk voltage generated by the upper and lower SiC MOSFET switch tubes of the same bridge arm on the premise of not slowing down the on-off speed of the two SiC MOSFET switch tubes, and effectively reduce the oscillation of the driving output voltage of the two SiC MOSFET switch tubes in the switching process.
Description
Technical Field
The invention relates to the technical field of power electronic switching device driving circuits, in particular to a driving circuit for inhibiting gate crosstalk and oscillation of a SiC MOSFET.
Background
The SiC MOSFET has the advantages of high switching speed, low on-resistance, high temperature resistance, good heat dissipation and the like, and is suitable for occasions with high power density, high switching frequency, high efficiency and severe environment. However, a large dv/dt is generated between the drain and the source due to a large increase in switching speed, and crosstalk is easily generated in driving of other switching devices of the bridge arm, and the device driving itself oscillates. Because the switching threshold of the SiC MOSFET is low and the maximum negative voltage of the grid electrode is small, false switching or grid source negative voltage breakdown can be caused when the crosstalk is serious, and grid source positive voltage breakdown in the switching process can be caused when the driving oscillation is serious, so that the application of the SiC MOSFET is severely restricted.
In order to suppress the influence of crosstalk and drive oscillation, a method generally used is: and increasing the resistance value of the driving resistor or increasing the capacitance value of the parallel capacitor between the grid source and the grid source. This scheme can suppress the influence of crosstalk well, but results in a reduction in switching speed, inevitably increases switching loss in the case of hard switching, and also reduces the operating switching frequency of the switching device, thereby failing to fully exploit the advantages of the silicon carbide device. Therefore, various driving transformation design schemes are proposed at home and abroad, and the driving transformation design schemes mainly fall into two categories. One class of schemes uses a variable gate drive voltage and uses two push-pull circuits to achieve four levels of drive voltage variation. The variable gate driving voltage can preset corresponding voltage levels according to the polarity of crosstalk in each state of the switch, so that crosstalk is suppressed. The variable gate driving voltage circuit has a complex structure, needs to provide an additional isolation control signal, has no capability of inhibiting driving oscillation in the switching process, and simultaneously needs to prejudge the crosstalk polarity, and particularly has difficulty in prejudging the crosstalk polarity of different working states of a three-phase circuit; the other scheme is a variable gate drive voltage of a variable gate source capacitance scheme, and an active device is adopted to connect a capacitor with a larger capacitance value in parallel with a gate source electrode of the SiC MOSFET when the SiC MOSFET is possibly influenced by crosstalk, so that the purpose of inhibiting the crosstalk is achieved. The variable gate drive voltage can only be applied to the stage after the SiC MOSFET is turned off and before the SiC MOSFET is turned on next time, and the drive oscillation in the switching process is not inhibited.
Disclosure of Invention
The invention aims to provide a driving circuit for inhibiting gate crosstalk and oscillation of a SiC MOSFET (metal oxide semiconductor field effect transistor). A capacitor and a driving resistor which are connected in parallel with a gate source are controllable through two groups of triodes, so that the driving oscillation and crosstalk in the switching-on and switching-off processes of a SiC MOSFET are inhibited under the conditions that the switching-on and switching-off speeds of the SiC MOSFET are not slowed down and additional control signals are not needed.
The invention is realized by the following measures: a drive circuit for inhibiting gate crosstalk and oscillation of SiC MOSFET (metal oxide semiconductor field effect transistor), which comprises a push-pull circuit and a capacitance auxiliary circuit, wherein the push-pull circuit and the capacitance auxiliary circuit are connected to a main circuit to form a complete working circuit;
two control signal output ends of the controller are respectively connected with two optical coupling chip input ends, the output ends of the two optical coupling chips are respectively connected with the two push-pull circuits and the control signal input ends of the two capacitance auxiliary circuits, the two output ends of the two push-pull circuits are respectively connected with the grid electrodes of two SiC MOSFET switching tubes on the same bridge arm of the main circuit, and the input ends of the two push-pull circuits are respectively connected with +20V output pins and-5V output pins of two isolation power chips;
the signal output ends of the two optocoupler chips are respectively connected with the bases of two groups of triodes in the capacitor auxiliary circuit, and the collectors of the two groups of triodes in the capacitor auxiliary circuit are respectively connected with the sources of two SiC MOSFET switching tubes on the same bridge arm of the main circuit through two groups of auxiliary capacitors;
emitting electrodes of the two groups of triodes are respectively connected to grids of upper and lower SiC MOSFET switching tubes of the same bridge arm of the main circuit, two groups of diodes are respectively connected in anti-parallel between the emitting electrodes and the collecting electrodes of the two groups of triodes, and source electrodes of the upper and lower SiC MOSFETs of the same bridge arm are respectively connected with 0V output pins of two isolated power supply chips.
As a further optimization scheme of the drive circuit for inhibiting gate crosstalk and oscillation of the SiC MOSFET, two groups of triodes in the capacitance auxiliary circuit are two PNP triodes and two NPN triodes, and the capacitance auxiliary circuit is composed of two groups of triodes and four auxiliary capacitors; control signals output by the controller are input to the bases of the two NPN triodes and the two PNP triodes of the capacitance auxiliary circuit through the two optocoupler chips respectively; the collector electrodes of the two PNP triodes and the two NPN triodes are respectively connected with the source electrodes of the two SiC MOSFET switching tubes through the four auxiliary capacitors, and the emitting electrodes of the two triodes are connected with the grid electrodes of the two SiC MOSFET switching tubes.
As a further optimization scheme of the drive circuit for inhibiting gate crosstalk and oscillation of the SiC MOSFET, the push-pull circuit is composed of two power chips with three pins of +20V, 0V and-5V, two NOT gates and two groups of MOSFET devices, wherein the number of the MOSFET devices in each group is two; control signals at the output ends of the two optocoupler chips are respectively transmitted to the grids of the two groups of MOSFET devices through the two NOT gates; two pins of +20V and-5V of the two power chips are respectively connected to the source electrodes of the two groups of MOSFET devices, two output ends of the push-pull circuit are respectively connected to the grids of two SiC MOSFET switching tubes in the main circuit through driving resistors, and the source electrodes of the two SiC MOSFET switching tubes are respectively connected to the 0V pins of the two power chips.
As a further optimized scheme of the driving circuit for inhibiting gate crosstalk and oscillation of the SiC MOSFET, a control signal of the controller is sequentially transmitted to the gates of the two SiC MOSFET switching tubes on the same bridge arm of the main circuit through the input ends of the two optocoupler chips and the input ends g1 and g2 of the boost-boost circuit.
As a further optimization scheme of the drive circuit for inhibiting gate crosstalk and oscillation of the SiC MOSFET, control signals output by the two optocoupler chips are transmitted to the gates of the two groups of MOSFET devices through the two NOT gates, two pins of the turn-on voltage of the two groups of SiC MOSFET devices are 20V and 0V, and two pins of the turn-off voltage of the two groups of SiC MOSFET devices are 0V and-5V.
As a further optimization scheme of the drive circuit for inhibiting gate crosstalk and oscillation of the SiC MOSFET, the circuit turn-on voltage of two auxiliary capacitors connected with the gate and the source of two switching tubes of the SiC MOSFET in parallel is +20V, and the circuit turn-off voltage of the auxiliary capacitors and the circuit turn-off voltage of the other two auxiliary capacitors are-5V.
The invention has the beneficial effects that: the invention can accelerate the switching-on speed of the two SiC MOSFET switching tubes and simultaneously reduce the bridge arm crosstalk and the gate source voltage oscillation; the gate drive of the SiC MOSFET switch tube is that when the upper SiC MOSFET switch tube is switched on, the drain voltage of the upper SiC MOSFET switch tube has obvious high-frequency oscillation in the current change process, the oscillation frequency is consistent with the drain current of the upper SiC MOSFET switch tube of the invention and the gate-source voltage oscillation frequency of the upper and lower SiC MOSFET switch tubes in figure 17(a), the drain-source voltage change is greater than that of the traditional drive scheme, the switching-on speed is fast, due to the influence of parasitic parameters, the high-frequency oscillation occurs when the drain current of the upper SiC MOSFET switch tube is increased, because the current change speed is faster than that of the traditional drive scheme, the oscillation amplitude is greater than that of the drain current oscillation of the traditional drive scheme, but still in a safe range, due to the influence of reverse recovery current and parasitic capacitance of an anti-parallel diode, the overshoot of about 7A is caused, and the overshoot amplitude is less than that of the traditional drive scheme; the change speed of the drain current of the two SiC MOSFET switching tubes is obviously higher than that of the traditional driving scheme, the switching-on speed is high, the switching-on loss can be obtained by the product integral of the drain voltage and the drain current in the switching-on process, the switching-on speed improvement and the current overshoot reduction of the invention are adopted, and the switching-on loss is greatly reduced, so that the invention can effectively reduce the crosstalk voltage generated by the upper and lower SiC MOSFET switching tubes on the same bridge arm on the premise of not slowing down the switching-on and switching-off speeds of the two SiC MOSFET switching tubes, and effectively reduce the oscillation of the driving output voltage of the two SiC MOSFET switching tubes in the switching-on and switching-off process.
Drawings
FIG. 1 is a schematic diagram of the entire circuit of the present invention.
Fig. 2 is a schematic diagram of the initial state of the whole circuit before two SiC MOSFET switching tubes in the main circuit are turned on in the embodiment of the present invention.
FIG. 3 is a circuit operation diagram of the first and second stages of the whole circuit in the process of turning on two SiC MOSFET switching tubes in the embodiment of the invention.
Fig. 4 is a third stage circuit operation diagram of the whole circuit in the process of turning on two SiC MOSFET switching tubes in the embodiment of the present invention.
Fig. 5 is a schematic diagram of the fourth stage circuit operation when the whole circuit operates in the process of turning on two SiC MOSFET switching tubes in the embodiment of the present invention.
Fig. 6 is a schematic diagram of the first and second stages of circuit operation when the whole circuit operates in the process of turning on two SiC MOSFET switch tubes in the embodiment of the present invention.
FIG. 7 is a schematic diagram of the initial state of the whole circuit before two SiC MOSFET switching tubes on the bridge arm of the main circuit are turned on in the embodiment of the present invention
Fig. 8 is a schematic circuit operation diagram of the whole circuit in the fifth stage in the process of turning off the two SiC MOSFET switching tubes in the embodiment of the present invention.
Fig. 9 is a schematic circuit operation diagram of the whole circuit in the sixth stage in the process of turning off the two SiC MOSFET switching tubes in the embodiment of the present invention.
Fig. 10 is a circuit operation schematic diagram of the seventh stage of the whole circuit in the process of turning off the two SiC MOSFET switching tubes in the embodiment of the present invention.
Fig. 11 is a schematic circuit operation diagram of the whole circuit in the eighth stage in the process of turning off two SiC MOSFET switching tubes in the embodiment of the present invention.
FIG. 12 is a diagram of a model constructed by the present invention.
Fig. 13 is a simplified circuit model diagram obtained by omitting the parasitic inductance in fig. 12 and performing a step-down process in the embodiment of the present invention.
Fig. 14 is a schematic diagram illustrating a phase-by-phase turn-on/off process of the SiC MOSFET switching tube of the upper bridge arm when the bridge arm is in an inductive load, in which the SiC MOSFET switching tube of the lower bridge arm is always in an off state.
Fig. 15 is a schematic 3D relationship diagram of gate-source crosstalk voltage of the lower bridge arm SiC MOSFET switching tube, gate-source parallel total capacitance of the lower bridge arm SiC MOSFET switching tube, and driving resistance caused by state change of the upper bridge arm SiC MOSFET switching tube in the embodiment of the present invention.
Fig. 16 is a schematic diagram of a relationship between gate-source crosstalk voltage of a lower bridge arm SiC MOSFET switch tube and a lower bridge arm SiC MOSFET gate-source parallel total capacitance caused by a state change of an upper bridge arm SiC MOSFET switch tube in the embodiment of the present invention.
Fig. 17 is a comparison graph of gate-source voltage, drain-source voltage and current when two SiC MOSFET switching tubes are turned off and on in a continuous operating state of the conventional driving circuit and the driving circuit of the present invention.
Detailed Description
In order to clearly illustrate the technical features of the present solution, the present solution is explained below by way of specific embodiments.
Referring to fig. 1-17, the present invention is: a drive circuit for inhibiting gate crosstalk and oscillation of SiC MOSFET (metal oxide semiconductor field effect transistor) comprises a push-pull circuit and a capacitance auxiliary circuit, wherein the push-pull circuit and the capacitance auxiliary circuit are connected to a main circuit to form a complete working circuit;
two control signal output ends of the controller are respectively connected to the input ends of two optocoupler chips, the output ends of the two optocoupler chips are respectively connected with the two push-pull circuits and the control signal input ends of the two capacitor auxiliary circuits, the two output ends of the two push-pull circuits are respectively connected with the grid electrodes of two SiC MOSFET switching tubes on the same bridge arm of the main circuit, and the input ends of the two push-pull circuits are respectively connected with +20V output pins and-5V output pins of the two isolated power chips;
the signal output ends of the two optocoupler chips are respectively connected with the bases of two groups of triodes in the capacitor auxiliary circuit, and the collectors of the two groups of triodes in the capacitor auxiliary circuit are respectively connected with the sources of two SiC MOSFET switching tubes on the same bridge arm of the main circuit through two groups of auxiliary capacitors;
emitting electrodes of the two groups of triodes are respectively connected to grids of upper and lower SiC MOSFET switching tubes of the same bridge arm of the main circuit, two groups of diodes are respectively connected in anti-parallel between the emitting electrodes and the collecting electrodes of the two groups of triodes, and source electrodes of the upper and lower SiC MOSFETs of the same bridge arm are respectively connected with 0V output pins of two isolated power supply chips.
The capacitor auxiliary circuit comprises two groups of triodes, a capacitor and a capacitor, wherein the two groups of triodes in the capacitor auxiliary circuit are two PNP triodes and two NPN triodes, and the capacitor auxiliary circuit consists of two groups of triodes and four auxiliary capacitors; control signals output by the controller are input to the bases of the two NPN triodes and the two PNP triodes of the capacitance auxiliary circuit through the two optocoupler chips respectively; the collector electrodes of the two PNP triodes and the two NPN triodes are respectively connected with the source electrodes of the two SiC MOSFET switching tubes through the four auxiliary capacitors, and the emitting electrodes of the two triodes are connected with the grid electrodes of the two SiC MOSFET switching tubes.
The push-pull circuit comprises two power chips with +20V, 0V and-5V pins, two NOT gates and two groups of MOSFET devices, wherein the number of the MOSFET devices in each group is two; control signals at the output ends of the two optocoupler chips are respectively transmitted to the grids of the two groups of MOSFET devices through the two NOT gates; two pins of +20V and-5V of the two power chips are respectively connected to the source electrodes of the two groups of MOSFET devices, two output ends of the push-pull circuit are respectively connected to the grids of two SiC MOSFET switching tubes in the main circuit through driving resistors, and the source electrodes of the two SiC MOSFET switching tubes are respectively connected to the 0V pins of the two power chips.
Control signals of the controller are sequentially transmitted to the gates of the two SiC MOSFET switching tubes on the same bridge arm of the main circuit through the input ends of the two optocoupler chips and the input ends of the push-and-pull circuit, namely the input ends of the g1 and the input end of the g 2.
Control signals output by the two optocoupler chips are transmitted to the grids of the two groups of MOSFET devices through the two NOT gates, two pins of the switching-on voltage of the two groups of SiC MOSFET devices are 20V and 0V, and two pins of the switching-off voltage of the two groups of SiC MOSFET devices are 0V and-5V.
The circuit turn-on voltage of two auxiliary capacitors connected with the grid source electrodes of the two SiC MOSFET switching tubes in parallel is +20V, and the circuit turn-off voltage of the auxiliary capacitors and the circuit turn-off voltage of the other two auxiliary capacitors are-5V.
The specific content of the staged analysis on the switching-on and switching-off processes of two SiC MOSFET switching tubes connected in series on the same bridge arm of the main circuit is as follows:
wherein, two SiC MOSFET switch tubes mainly comprise an upper SiC MOSFET switch tube and a lower SiC MOSFET switch tube, and the whole process of the on-off of the two SiC MOSFET switch tubes is regarded as the lower SiC MOSFET switch tube (M) 1H ) The state of (1) is an off state, and a capacitor C is always connected in parallel between the grid and the source of the SiC MOSFET switch tube in the off state pL The driving resistance is R g The crosstalk is suppressed in a similar manner to the conventional passive crosstalk suppression; but due to C pL The value of (b) can be made larger, so the crosstalk suppression capability is better, and when analyzing the on and off processes of two SiC MOSFET switching tubes, referring to fig. 14, the active tube oscillation is analyzed with emphasis:
the four stages of switching on two SiC MOSFET switching tubes connected in series on the same bridge arm in the main circuit are specifically as follows:
initial stage of switching on (i.e. t) 0 Previously), see fig. 2, the upper SiC MOSFET switching tube remains in the off stable state, M 1H 、Q 1H In the off state, M 2H 、Q 2H For the on state, the gate source voltage v of the upper SiC MOSFET switch tube gsH And driving low level V 2H And when the voltage is-5V, the upper SiC MOSFET switch tube is completely closed, the inductive current flows from the diode of the lower SiC MOSFET switch tube, and C is in the current state nH 、C nL The voltage at both ends is-5V, C pH 、C pL The voltage across the terminals is 20V.
First and second stages (t) 0 -t 2 ) Referring to FIG. 3, the upper SiC MOSFET switch tube M 1 Gate pole driving secondary side input signal g 1 Goes high, M 1H Opening, M 2H Turn off, at the same time, due to the auxiliary tube Q 2H Common drive control signal g 1 Auxiliary pipe Q 1H On, Q 2H Turn-off, auxiliary capacitance C nH The drive connection with the gate is disconnected, the voltage at two ends is kept at-5V, and the auxiliary capacitor C pH Connected in parallel to both sides of the upper tube grid source to drive the power supply V 1H And an auxiliary capacitor C pH Storing energy to gate source capacitor C of SiC MOSFET switching tube gsH Charging, upper SiC MOSFET switch tube gate source voltage v gsH Elevation, v gsH After the voltage rises to the switching-on threshold voltage of 0V-2V, the upper SiC MOSFET switch tube is switched on and flows through the SiC MOSFET switch tube M 1 Current i of dH Linearly increasing until the maximum load current is reached, and still keeping the current from the lower SiC MOSFET switch tube II in the stageThe pole tube continues current, the voltage of the lower SiC MOSFET switch tube is 0V, and parasitic inductance L exists between the drain electrode and the source electrode of the lower SiC MOSFET switch tube dH And L sH Parasitic inductance L exists in the converter circuit PCB circuit para The drain-source voltage of the upper SiC MOSFET switch tube generates an amplitude value (L) d +L s +L para )di dH Voltage change of/dt.
Third stage (t) 2 -t 3 ) Referring to fig. 4, a SiC MOSFET switch tube M under the main circuit 2 Starting to bear back voltage, and an upper SiC MOSFET switch tube M 1 Drain-source voltage v dsH The voltage v of the drain and the source of the lower SiC MOSFET switch tube begins to fall dsL Begins to rise, and the process considers the Miller capacitance C gdL Voltage v across gdL Linearly increasing, the current i flowing through the Miller capacitor of the lower SiC MOSFET switch tube gdL Amplitude of C gdL dv gdL Dt so that a current continuously flows through V 2L 、C nL And C gsL The lower SiC MOSFET switch tube grid source auxiliary capacitor C nL Incorporation of i gdL Through C nL Shunting, so that a positive voltage peak caused by bridge arm crosstalk of a gate source voltage of a lower SiC MOSFET switching tube is inhibited; similarly, it has a size of C gdH dv gdH Current i of/dt gdH Continuously flows through the Mailer capacitor of the upper SiC MOSFET switch tube, and the current is driven by a driving power supply V 1H And an auxiliary capacitor C pH Providing the gate source of the upper SiC MOSFET switch tube to form a Miller platform, and the stage is up to the drain-source voltage v of the upper SiC MOSFET switch tube dsH The reduction to 0V ends.
Fourth stage (t) 3 -t 4 ) Referring to FIG. 5, the gate source voltage v of the upper SiC MOSFET switch tube gsH Continuously rising, and an auxiliary capacitor C of an upper SiC MOSFET switch tube pH The SiC MOSFET switch tube drops when the voltage on two sides continues to act as a capacitor C pH Two-side voltage equal to gate-source capacitance C gsH When the voltage on both sides is applied, the power supply V is driven 1H Capacitor C pH And C gsH Simultaneously supplying power, and the grid source voltage v of upper SiC MOSFET switch tube gsH Slowly rising to a given driving high level of 20V, and ending the opening process; due to the last stage, the upper SiC MOSFET switchThe SiC MOSFET switch tube is reduced to 0V under the drain-source voltage of the tube, the drain-source voltage of the lower SiC MOSFET switch tube is influenced by parasitic inductance and parasitic capacitance after reaching the bus voltage, the drain-source voltage of the upper and lower SiC MOSFET switch tubes oscillates and can respectively interfere with the gate-source voltage of the upper and lower SiC MOSFET switch tubes, and the capacitance G at the early stage of the stage is pH In a discharge state, via R gHin A gate-source capacitor C gsH Charging, considering the driving resistance as R gHin The gate-source capacitance is C gsH Late stage C pH And C gsH Driven by a common driving power supply V 1H Charging, considering the driving resistance as R gH +R gHin The gate-source capacitance is C pH +C gsH The gate-source voltage change rate of the upper SiC MOSFET switch tube is reduced, and C can be considered to be pH Directly connected in parallel on two sides of the gate source of the upper SiC MOSFET switch tube due to the auxiliary capacitor C nL ，C pH The disturbance of the drain-source voltage to the gate-source voltage is weakened.
The four stages of the invention for turning off two SiC MOSFET switching tubes connected in series on the same bridge arm in a main circuit are as follows:
off initial state (t) 4 -t 5 ) Referring to fig. 6, the upper SiC MOSFET switch transistor M 1 Enters a stable on state, M 1H 、Q 1H In an ON state, M 2H 、Q 2H In the off state, the gate source voltage v of the upper SiC MOSFET switch tube gsH Equal to drive high level V 1H Namely 20V, the upper SiC MOSFET switch tube is completely switched on, and the SiC MOSFET switch tube C is in the current state nH 、C nL The voltage is-5V, C pH 、C pL The voltage was 20V.
The fifth stage (t) 5 -t 6 ) Referring to FIG. 7, an upper SiC MOSFET switch tube M 1 Gate drive signal g 1 Goes to low level, M 2H Opening, M 1H Turn-off, since auxiliary line shares signal g 1 Auxiliary pipe Q 2H On, Q 1H Off, C pH The gate drive connection of the upper SiC MOSFET switch tube is disconnected, and the voltage at two ends is kept to be 20V, C nH Connected in parallel to both sides of the gate source of the upper SiC MOSFET switch tube, C gsH By R gHin To a driving power supply V 2H And an auxiliary capacitor C nH Discharge, auxiliary capacitance C nH The voltage at two ends rises, and the grid source voltage v of the upper SiC MOSFET switch tube gsH And the lower SiC MOSFET switch tube is dropped, and the running state of the main circuit is unchanged in the process.
The sixth stage (t) 6 -t 7 ) Referring to fig. 8, the upper SiC MOSFET switch transistor M 1 Drain-source voltage v dsH Starting to rise, the lower SiC MOSFET switch tube M 2 Drain-source voltage v dsL Starting to lower the gate-drain voltage v of the switch tube of the SiC MOSFET gdL When the lower SiC MOSFET switch tube is also dropped, the current i flowing through the Miller capacitor of the lower SiC MOSFET switch tube gdL Is C gdL dv gdL Dt, during which a current is continuously flowing out V 2L 、C nL And C gsL Due to the auxiliary capacitance C nL By the incorporation of a Miller current through C nL Shunting to inhibit negative voltage spike caused by bridge arm crosstalk of gate source voltage of a lower SiC MOSFET switching tube; similarly, it has a size of C gdH dv gdH Current i of/dt gdH Continuously flows through the Mailer capacitor of the upper SiC MOSFET switch tube, and the current is driven by a driving power supply V 2H And C nH Providing that the Maitreya platform is formed on the gate source of the upper SiC MOSFET switch tube until v dsH The bus voltage is reached and the process ends.
Seventh stage (t) 7 -t 8 ) See, FIG. 9, C gsH By R gHin To a driving power supply V 2H And an auxiliary capacitor C nH Discharge, auxiliary capacitance C nH The voltage at two ends rises, and the grid source voltage v of the upper SiC MOSFET switch tube gsH Continuing to drop the switch tube of the SiC MOSFET, and considering the driving resistance as R at the moment gHin The gate-source capacitance is C gsH When the auxiliary capacitor C is used nH Is equal to C gsH At a voltage of C nH And C gsH The voltage is simultaneously dropped by the SiC MOSFET switch tube, and the driving resistance is considered to be R gH +R gHin The gate-source capacitance is C nH +C gsH Thereby making C gsH The speed reduction of the SiC MOSFET switch tube is slowed down under the voltage of two ends until the grid source voltage is equal to the driving low voltageFlat V 2H At this stage, the SiC MOSFET switch tube M 2 The diode of (1) starts to conduct, M 1 And M 2 Starting to convert, the drain current i of the upper SiC MOSFET switch tube dH Reducing the current until the current of the upper SiC MOSFET switch tube is zero, wherein the load current flows continuously through the diode of the lower SiC MOSFET switch tube, and in the stage, because the drain-source voltage of the upper SiC MOSFET switch tube in the previous stage rises to the bus voltage, and the drain-source voltage of the lower SiC MOSFET switch tube falls to 0V, the lower SiC MOSFET switch tube is influenced by the parasitic inductance and the parasitic capacitance of a current conversion loop, the drain-source voltages of the upper and lower SiC MOSFET switch tubes oscillate and can respectively interfere with the gate-source voltages of the upper and lower SiC MOSFET switch tubes, and the early-stage capacitance C in the stage nH To C gsH Discharging, the later stage being driven by a driving power supply V 2H Discharging to make C gsH The voltage change rate on both sides is decreased from fast to slow, which is equivalent to C nH Connected in parallel at two ends of the gate source of the upper SiC MOSFET switch tube due to the auxiliary capacitor C nH 、C nL The disturbance of the drain-source voltage to the gate-source voltage is weakened, and the reason for weakening the disturbance is analyzed in detail later.
The eighth stage (t) 8 Thereafter), referring to fig. 9, the upper SiC MOSFET switch tube gate source voltage v gsH Continuing to lower the SiC MOSFET switch tube until v gsH reaches-5V and auxiliary capacitance C nH The voltage at the two ends also reaches a stable value of-5V, the turn-off process is finished, the whole turn-on and turn-off process is completed, and the SiC MOSFET switch tube C is in the current state nH 、C nL The voltage is-5V, C pH 、C pL The voltage was 20V.
According to the invention, the on-off period of the two SiC MOSFET switching tubes connected in series on the same bridge arm in the main circuit is finished, the upper SiC MOSFET switching tube is completely turned off, and the whole on-off process is completed.
The gate driving parameters of two SiC MOSFET switching tubes on the same bridge arm in the main circuit are designed as follows:
for the gate electrode driving model of the two SiC MOSFET switching tubes provided by the present invention, the two ends of the gate source of the upper SiC MOSFET switching tube are always connected in parallel with the auxiliary capacitor CpH or CnH, and the two ends of the gate source of the lower SiC MOSFET switching tube are always connected in parallel with the auxiliary capacitor CpL or CnL, and for the purpose of analyzing the selection and establishment model of the parameters of the passive device in the driving circuit provided by the present invention, see fig. 10:
according to the model shown in fig. 11, the model is obtained by kirchhoff's theorem:
in the formula:
simplifying formula 3.3 to obtain an equivalent circuit differential equation:
in the formula:
A 4 ＝L g L s C gs1 (C gs +C gd )
A 3 ＝C gs1 (C gs +C gd )(L g R g +L s R gin )
A 2 ＝L g C gs +L g C gd +L s C gs -L s C gs1 +R g C gs1 R gin (C gs +C gd )
A 1 ＝R g C gs1 +(R g +R gin )(C gs +C gd )
as can be seen from equation (2), the equivalent circuit mathematical model is a fourth-order differential equation, the direct analysis is too complex, and in order to obtain a reasonable value of the passive device, the model needs to be simplified for parameter calculation, so that parasitic inductance influence is ignored, order reduction is performed, and the simplified circuit model is as shown in fig. 11:
obtaining a parameter equation by a circuit model:
in the formula:
simplifying formula 3 to obtain a circuit equivalent differential equation:
in the formula:
B 2 ＝R g C gs1 R gin (C gs +C gd )
B 1 ＝R g C gs1 +(R g +R gin )(C gs +C gd )
table 1 parasitic parameters were calculated for SiC MOSFET crosstalk:
as can be seen from the parasitic parameters calculated by the SiC MOSFET crosstalk in Table 1, when the bus voltage is 600V, and the drop time of the SiC MOSFET switch tube is 30ns when the drain-source voltage rises, the dvds/dt value is 20V/ns; substituting the parameters in the table 1 into the formula (4) can obtain a 3D relation curve graph of voltage change delta vgs generated by a gate source and influenced by bridge arm crosstalk when the drain-source voltage change is finished, and a driving resistor Rg and a gate-source capacitor Cgs 1; as shown in fig. 15, it can be seen that, in the SiC MOSFET switching tube with the same drain-source voltage change rate, the voltage change amplitude of the gate-source caused by the bridge arm crosstalk increases with the increase of the driving resistor and decreases with the increase of the gate-source auxiliary capacitance, and from the 3D curve, when the driving resistor is 10 Ω, the bridge arm crosstalk is strongly suppressed with the change of the gate-source auxiliary capacitance, and the SiC MOSFET switching tube can operate in a safe range.
R is to be g In formula (4) substituted by 10 Ω, the gate-source voltage change Δ v due to the bridge arm crosstalk can be obtained gs Capacitor C connected in parallel with gate source gs1 A relationship curve, such as fig. 16; the grid source parallel capacitance C is taken as can be obtained by a curve chart gs1 When the power factor reaches 10nF, the gate-source voltage disturbance amplitude caused by bridge arm crosstalk is 2V, and the SiC MOSFET can safely operate; therefore, the auxiliary capacitor C pH 、C nH 、C pL 、C nL Values of 10nF and above are possible.
Auxiliary capacitance C pH 、C nH 、C pL 、C nL The values are taken not only in consideration of crosstalk suppression but also in consideration of switching speed and switching loss.
For simplifying the description, the SiC MOSFET switch tube is turned on as an example, and whether the auxiliary capacitor value is appropriate is analyzed; to lowerLow turn-on loss, and addition of auxiliary capacitor C pH Then, C pH Both-end voltage and gate-source parasitic capacitance C gsH The voltage is the same and occurs in the fourth stage of the turn-on, so that the grid-source voltage changes rapidly in the stage of the drain current and the drain-source voltage changes, the turn-on speed is ensured, and the auxiliary capacitor C in the oscillation stage pH The voltage and the grid-source voltage rise simultaneously, the grid-source voltage changes slowly, and the grid-source voltage oscillation is restrained; according to the combination experiment, when the grid source voltage reaches 12V, the fourth stage of switching on is already carried out; after adding the auxiliary capacitor, the auxiliary capacitor C pH Both-end voltage and gate-source parasitic capacitance C gsH When the voltage is the same, the grid-source voltage is approximately equal to 12V, so that the grid-source voltage oscillation can be inhibited while the turn-on speed is ensured; assuming the gate-source parasitic capacitance C in the turn-on process gs The charge is completely formed by C pH Providing charges, when the grid-source voltage rises from-5V to 12V, neglecting the influence of the Miller current and needing 50nC charges; to simplify the operation, consider the influence of the injected charge of the driving power source and the Miller current to cancel each other out when C pH The voltage at two ends is the same as the parasitic voltage of the grid source and is equal to 12V, and the voltage is determined by the following steps:
C pH (20V-12V)＝50nC (5)
the auxiliary capacitance C can be obtained from the equation (5) pH When the capacitance value is 6.2nF, the auxiliary capacitor C can be realized pH Both-end voltage and gate-source parasitic capacitance C gsH When the voltage is the same, the gate-source voltage is approximately equal to 12V; through the analysis, the total capacitance between the gate and the source can be 10nF to achieve a better suppression effect; see FIG. 16, using C pH And C out Parallel connection as equivalent grid source parallel capacitance C gs1 For the sake of simplifying the operation, the charge injected by the driving power source is cancelled out by the influence of the Mailer current, C gsH And C out All charges are provided by auxiliary capacitor C pH Provided when C is pH Both-end voltage and gate-source parasitic capacitance C gsH The voltage is the same and equal to 12V, as determined by conservation of charge:
obtained by formula (6), C pH Is 8.8nF, C out 1.2 nF; similarly, an auxiliary capacitor C is added nH Then, C nH Both-end voltage and gate-source parasitic capacitance C gsH The same voltage occurs in the seventh stage of turn-off, so that the grid-source voltage changes rapidly in the drain-source voltage and drain current change stage, the turn-off speed is ensured, and the auxiliary capacitor C in the oscillation stage nH The SiC MOSFET switch tube drops under the synchronization of the voltage and the grid source voltage, the grid source voltage changes slowly, and the grid source voltage oscillation is inhibited; according to the combination experiment, when the grid source voltage reaches 2V, the seventh stage is already entered; therefore, after adding the auxiliary capacitor, the auxiliary capacitor C nH Both-end voltage and gate-source parasitic capacitance C gsH When the voltages are the same, the gate-source voltage is approximately equal to 2V, so that the turn-off speed is ensured, and the gate-source voltage oscillation is inhibited; assuming the gate-source parasitic capacitance C during the turn-off process gsH A capacitor C connected in parallel with the gate source out Is completely composed of C nH Providing charges, when the gate-source voltage is reduced from 20V to 2V, neglecting the influence of the Miller current, and needing 70nC charges; the charge injected by the driving power supply is balanced with the influence of the Miller current when C nH When the voltage at two ends is the same as the grid source parasitic voltage, the voltage is determined by charge conservation:
C nH (-5V-2V)＝70nC+(20-2)·C out (7)
the invention verifies the effectiveness of the invention by the lower SiC MOSFET switch tube surface simulation, the simulation adopts LTspice software simulation, and adopts a device model to provide a C2M0040120D model for CREE company and a parasitic inductance L in the source electrode s Given value of the parameters of the obtained simulation model is 10n, and parasitic inductance L inside the grid g For 15n, the remaining simulation parameter settings are shown in table 2.
Table 2 shows the simulation parasitic parameters and the working conditions
In FIG. 17(a), v gsL Wave form and v dsH The curves are the voltage waveforms v of the gate source voltage of the upper and lower SiC MOSFET switching tubes of the traditional gate driving scheme gsh Curve and v gsL Curves are the grid source voltage waveforms of the upper and lower SiC MOSFET switching tubes respectively; when the SiC MOSFET switch tube on the traditional gate driving scheme is switched on, the gate-source voltage of the upper SiC MOSFET switch tube is influenced by the drain-source voltage change, a Miller platform is generated, and the gate source of the upper SiC MOSFET switch tube does not oscillate due to the slow switching-on speed; during the switching-on period of the upper SiC MOSFET switching tube, the gate source voltage of the lower SiC MOSFET switching tube is influenced by crosstalk and oscillates, the maximum amplitude of a gate source voltage spike reaches 3V, the minimum amplitude of the gate source voltage spike reaches-2.5V, and the gate source voltage spike is in a safe operation range.
When the SiC MOSFET switch tube on the driving gate pole driving scheme is switched on, the rising speed of the gate source voltage of the upper SiC MOSFET switch tube is fast from 0V to 12V, the rising speed of the voltage is slow from 12V to 20V, but at the position of a Miller platform, high-frequency oscillation is generated due to the rapid change of drain-source voltage, the amplitude of the high-frequency oscillation is within a safety range, and due to the influence of crosstalk, the gate source voltage of the SiC MOSFET switch tube under the driving scheme of the invention also oscillates, and as can be seen from a figure 17(a), the amplitude of the maximum positive peak of the gate source voltage of the lower SiC MOSFET switch tube is 2.8V, and the maximum negative peak of the gate source voltage oscillation is only 0.8V; by comparing the driving scheme of the invention with the traditional driving scheme, the driving scheme of the invention can accelerate the switching-on speed of the two SiC MOSFET switching tubes and simultaneously reduce the bridge arm crosstalk and the gate-source voltage oscillation.
FIG. 17(b) shows the drain-source voltage and drain current of the upper SiC MOSFET switch tube during continuous operation corresponding to the switching operation of FIG. 17 (a); in FIG. 17(b), v gsL Curve and v dsH The curves are respectively the drain-source voltage and drain current waveforms of the SiC MOSFET switch tube on the traditional SiC MOSFET gate electrode driving scheme, and the curve recommends v dsH And recommendation i D The curves are respectively the drain-source voltage and drain current waveforms of the SiC MOSFET switch tube in the driving scheme of the invention; when the traditional driving scheme is switched on, the drain-source voltage of the upper SiC MOSFET switch tube leaks in the current change processThe source voltage slightly oscillates, the oscillation frequency is consistent with the drain current of the traditional drive upper SiC MOSFET switching tube and the gate source voltage oscillation frequency of the upper and lower SiC MOSFET switching tubes in the graph 17(a), the obtained gate source voltage oscillation is influenced by the drain source voltage oscillation, high-frequency oscillation occurs when the drain current is increased due to the influence of parasitic parameters, and overshoot of about 16A is caused due to the influence of reverse recovery current and parasitic capacitance of an anti-parallel diode; according to the SiC MOSFET gate driving scheme, when an upper SiC MOSFET switch tube is switched on, the drain-source voltage of the upper SiC MOSFET switch tube has obvious high-frequency oscillation in the current change process, the oscillation frequency is consistent with the drain current of the upper SiC MOSFET switch tube driven by the invention and the gate-source voltage oscillation frequency of the upper SiC MOSFET switch tube and the lower SiC MOSFET switch tube in a graph 17(a), the drain-source voltage change is greater than that of the traditional driving scheme, the switching-on speed is increased, high-frequency oscillation occurs when the drain current of the upper SiC MOSFET switch tube is increased due to the influence of parasitic parameters, the oscillation amplitude is greater than that of the drain current oscillation of the traditional driving scheme but still in a safe range, the overshoot of about 7A is caused due to the influence of reverse recovery current of an anti-parallel diode and parasitic capacitance, and the overshoot amplitude is less than that of the traditional driving scheme; the change speed of the drain current is obviously higher than that of the traditional driving scheme, the turn-on speed is high, the turn-on loss can be obtained by the integral of the product of the drain-source voltage and the drain current in the turn-on process, and as can be seen visually from figure 17(b), by adopting the driving scheme of the invention, the turn-on loss is greatly reduced due to the increase of the turn-on speed and the reduction of the current overshoot.
The technical features of the present invention which are not described in the above embodiments may be implemented by or using the prior art, and are not described herein again, of course, the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, and variations, modifications, additions or substitutions which may be made by those skilled in the art within the spirit and scope of the present invention should also fall within the protection scope of the present invention.
Claims (1)
1. A drive circuit for inhibiting gate crosstalk and oscillation of SiC MOSFET (metal oxide semiconductor field effect transistor) is characterized by comprising two push-pull circuits and two capacitance auxiliary circuits, wherein the two push-pull circuits and the two capacitance auxiliary circuits are connected with a main circuit to form a complete working circuit;
two control signal output ends of the controller are respectively connected with two optical coupling chip input ends, the output ends of the two optical coupling chips are respectively connected with the two push-pull circuits and the control signal input ends of the two auxiliary capacitance circuits, and the two output ends of the two push-pull circuits are respectively connected with the grid electrodes of two SiC MOSFET switching tubes on the same bridge arm of the main circuit;
the output ends of the two optocoupler chips are respectively connected with the bases of two groups of triodes in the two capacitor auxiliary circuits, and the collectors of the two groups of triodes in the two capacitor auxiliary circuits are respectively connected with the sources of two SiC MOSFET switching tubes on the same bridge arm of the main circuit through two groups of auxiliary capacitors;
emitting electrodes of the two groups of triodes are respectively connected to grids of upper and lower SiC MOSFET switching tubes of the same bridge arm of the main circuit, two groups of diodes are respectively connected in anti-parallel between the emitting electrodes and the collecting electrodes of the two groups of triodes, and source electrodes of the upper and lower SiC MOSFET switching tubes of the same bridge arm are respectively connected with 0V output pins of two isolated power supply chips;
two groups of triodes in the two capacitor auxiliary circuits are two PNP triodes and two NPN triodes, and the capacitor auxiliary circuit consists of two groups of triodes and four auxiliary capacitors; two control signals output by the controller are input to the bases of the two NPN triodes and the two PNP triodes of the two capacitance auxiliary circuits through the two optocoupler chips respectively; the collector electrodes of the two PNP triodes and the collector electrodes of the two NPN triodes are respectively connected with the source electrodes of the two SiC MOSFET switching tubes through the four auxiliary capacitors;
the push-pull circuit comprises two isolation power supply chips with +20V, 0V and-5V pins, two NOT gates and two groups of MOSFET devices, wherein the number of the MOSFET devices in each group is two, and control signals output by the two isolation power supply chips are transmitted to the gates of the two groups of MOSFET devices through the two NOT gates respectively; two pins of +20V and-5V of the two isolation power supply chips are respectively connected to the source electrodes of the two groups of MOSFET devices, and two output ends of the two push-pull circuits are respectively connected to the grids of the two SiC MOSFET switching tubes in the main circuit through driving resistors;
two pins of the turn-on voltage of the two groups of MOSFET devices are 20V and 0V, and two pins of the turn-off voltage of the two groups of MOSFET devices are 0V and-5V;
the turn-on voltage of the two auxiliary capacitors connected with the grid source electrodes of the two SiC MOSFET switching tubes in parallel is +20V, and the turn-off voltage of the other two auxiliary capacitors is-5V;
control signals of the controller sequentially pass through two input ends of the optical coupling chip and two output ends of the optical coupling chip, the two optical coupling chips respectively output g1 control signals and g2 control signals according to the control signals of the controller, g1 control signals and g2 control signals are respectively input to the input ends of the push-pull circuits respectively corresponding to the two SiC MOSFET switching tubes, and the output ends of the two push-pull circuits are transmitted to the gates of the two SiC MOSFET switching tubes on the same bridge arm of the main circuit;
and simultaneously, the g1 control signal and the g2 control signal output by the two optocoupler chips are also respectively transmitted to the bases of two groups of triodes in the capacitor auxiliary circuits corresponding to the two SiC MOSFET switching tubes.
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| CN111614236A (en) * | 2020-06-15 | 2020-09-01 | 南京工程学院 | SiC MOSFET gate auxiliary circuit based on bridge circuit |
| CN113110681B (en) * | 2021-05-11 | 2022-04-12 | 华北电力大学 | Voltage clamping circuit |
| CN113937989B (en) * | 2021-11-16 | 2023-09-01 | 西安电子科技大学 | Driving circuit and method for inhibiting SiC MOSFET crosstalk and drain current overshoot |
| CN114640328B (en) * | 2022-02-15 | 2024-06-04 | 清华大学 | Temperature-resistant SiC MOSFET driving circuit capable of inhibiting on-current oscillation and control method thereof |
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| CN109743054B (en) * | 2018-12-05 | 2024-03-19 | 江苏国传电气有限公司 | SiC MOSFET class II short-circuit current suppression circuit and method |
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| WO2012165649A1 (en) * | 2011-06-01 | 2012-12-06 | Denso Corporation | Power mosfet driver circuit and element value determining method therefor |
| CN106100297A (en) * | 2016-08-02 | 2016-11-09 | 北京交通大学 | Drive circuit based on silicon carbide MOSFET |
| CN106385165A (en) * | 2016-11-08 | 2017-02-08 | 西安交通大学 | SiC MOSFET driving circuit with crosstalk suppression capability |
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