CN108258030A - Igbt半导体结构 - Google Patents

Igbt半导体结构 Download PDF

Info

Publication number
CN108258030A
CN108258030A CN201711458322.0A CN201711458322A CN108258030A CN 108258030 A CN108258030 A CN 108258030A CN 201711458322 A CN201711458322 A CN 201711458322A CN 108258030 A CN108258030 A CN 108258030A
Authority
CN
China
Prior art keywords
semiconductor structure
layer
region
igbt semiconductor
igbt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201711458322.0A
Other languages
English (en)
Inventor
V·杜德克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
35 Power Electronics GmbH
Original Assignee
35 Power Electronics GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 35 Power Electronics GmbH filed Critical 35 Power Electronics GmbH
Priority to CN202210275292.4A priority Critical patent/CN114664922A/zh
Publication of CN108258030A publication Critical patent/CN108258030A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/105—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with vertical doping variation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/207—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds further characterised by the doping material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

IGBT半导体结构(10)具有p+衬底(24)，n‑层(28)，至少一个在所述n‑层(28)邻接的p区域(32)和至少一个在所述p区域(32)处邻接的n+区域(34)，其分别包括GaAs化合物或由GaAs化合物构成，介电层(20)和三个连接接通部(14,16,18)，其中，所述p区域(32)与所述n‑层(28)形成第一pn结(36)，并且所述n+区域(34)与所述至少一个p区域(32)形成第二pn结(38)，所述介电层(20)覆盖所述第一pn结(36)和所述第二pn结(38)，所述第二连接接通部(16)形成在所述介电层(20)上的场板，并且在所述p+衬底(24)和所述n‑层(28)之间布置有经掺杂的中间层(26)，所述中间层具有1微米至50微米的层厚度(D3)和1012‑1017N/cm3的掺杂剂浓度，其中，所述中间层(26)至少与所述p+衬底(24)材料锁合地连接。

Description

IGBT半导体结构
技术领域
本发明涉及一种具有p+衬底、n-层、p区域、n+区域、介电层以及三个连接接通部的IGBT半导体结构。
背景技术
由Jesef Lutz等人的《Semiconductor Power Devices》，Springer 2011版，ISBN978-3-642-11124-2，第十章，第322、323和330页已知不同的实施方式中的IGBT。这种功率器件基于硅或者碳化硅制造。
由German Ashkinazi的《GaAs Power Devices》，ISBN 965-7094-19-4，第五章，第97页或第7.8章，第225页已知一种耐高电压的半导体二极管p+-n-n+以及一种基于GaAs的耐高电压的p-n-i-p晶体管。
在M.Xu等人的论文《New Insight into Fermi-Level Unpinning on GaAs:Impact of Different Surface Orientations》，Electron Device Meeting(IEDM)，IEEE，2009，第865-868页，以及G.K.Dalapati等人的论文《Impact of Buffer Layer on AtomicLayer Deposited TIAIO Alloy Dielectric Quality for Epitaxial-GaAs/Ge DeviceApplication》，IEEE Transactions on Electron Devices，第60卷，No.1，2013中描述在GaAs上例如借助于原子层沉积(ALD)过程的氧化层的沉积。
在所述背景下，本发明的任务在于，说明一种扩展现有技术的设备。
所述任务通过具有权利要求1的特征的IGBT半导体结构来解决。本发明的有利构型是从属权利要求的主题。
发明内容
根据本发明的主题，提出一种具有上侧和下侧的IGBT半导体结构。
所述IGBT半导体结构具有构造在IGBT半导体结构的下侧处的p+衬底和在所述p+衬底上支承的n-层。
所述n-层具有邻接的p区域和邻接所述p区域的至少一个n+区域。
所述IGBT半导体结构具有优选地由沉积的氧化物构成的介电层、与IGBT半导体结构的下侧导电连接的第一连接接通部、第二连接接通部以及第三连接接通部。
所述p+衬底具有5*1018-5*1020N/cm3的掺杂剂浓度和50-500微米的层厚度。
所述n-层具有1012-1017N/cm3的掺杂剂浓度和10-300微米的层厚度。
至少一个p区域具有1014-1018N/cm3的掺杂剂浓度并且至少一个n+区域具有至少1019N/cm3的掺杂剂浓度，其中，至少一个p区域与所述n-层形成第一pn结。
所述n+区域与所述p区域形成第二pn结。
所述p+衬底、n-层、p区域以及n+区域分别包括GaAs化合物或分别由GaAs化合物构成。
第一连接接通部，第二连接接通部和第三连接接通部分别包括金属或金属化合物，或者分别由金属或金属化合物构成，其中，第二连接接通部构造为介电层上的场板(Feldplatte)。
第三连接接通部与至少一个p区域和至少一个n+区域导电连接。
优选地，所述连接接通部分别布置在半导体结构的表面处。
所述介电层至少覆盖第一pn结和第二pn结，并且与n-层、p区域和n+区域材料锁合地连接。
在p+衬底与n-层之间附加地布置有，所述经掺杂的中间层具有1微米至50微米的层厚度和1012-1017N/cm3的掺杂剂浓度，其中，所述中间层至少与p+衬底材料锁合地连接。
需要说明的是，第二连接接通部表示为栅极。第一连接接通部典型地表示为集电极或阳极，而第三连接接通部表示为发射极或阴极。
可以理解，在所述连接接通部上形成层。所述连接接通部分别是能够导电的并且具有金属特性，并且包括或优选地由能够金属性导电的半导体层或金属层或由两者的组合构成。所述连接接通部形成至直接邻接的经掺杂的半导体层的低欧姆的电接通。
此外可以理解为：所述连接接通部优选地借助接合线与接通叉指(Kontaktfinger)、所谓的引脚(Pins)连接。
此外可以理解：所述中间层相比于邻接的层具有至少一个不同的掺杂剂浓度。
优点是：相比于硅，GaAs半导体结构的载流子具有更小的有效质量。相比于硅在所述pn结处也可以达到更高的温度，没有损坏所述器件。由此，以GaAs半导体结构可以取得比以可比较的硅半导体结构更高的开关频率和更小的损耗。
另一优点是：所述III-IV IGBT半导体结构可以比可比较的由碳化硅制造的半导体结构成本更有利。
根据本发明的III-V-IGBT半导体结构的另一优点是直至300℃的高的耐热性。换句话说，所述III-V半导体二极管也可以在较热的环境中使用。
在第一种实施方式中所述中间层构造为p型掺杂，并且根据替代的扩展方案包括锌和/或硅作为掺杂剂。所述中间层的掺杂剂浓度优选小于p+衬底的掺杂剂浓度。特别优选地，所述掺杂剂浓度在因数为2直至因数为五个数量级之间的范围内更小。
在另一种实施方式中，所述中间层构造为n型掺杂并且优选包括硅和/或锡作为掺杂剂。所述中间层的掺杂剂浓度优选小于n+衬底的掺杂剂浓度。特别优选地，所述掺杂剂浓度以直至因数100比n-层的掺杂剂浓度更小。
根据另一种实施方式，所述IGBT半导体结构具有n型掺杂的缓冲层，其中，所述缓冲层布置在中间层与n-层之间，具有1012-1016N/cm3的掺杂剂浓度以及1微米至50微米的层厚度，并且包括GaAs化合物或由GaAs化合物构成。
在另一种实施方式中，IGBT半导体结构形成沟槽型IGBT半导体结构，其中，介电层垂直于IGBT半导体结构的上侧延伸。
所述p+衬底优选地包括锌。所述n-层和/或n+区域优选地包括硅和/或铬和/或钯和/或锡，其中，所述IGBT半导体结构特别优选单片地构造。
根据另一实施方式，所述IGBT半导体结构的总高度最高是150-500微米，和/或IGBT半导体结构的棱边长或直径是在1毫米至15毫米之间。
在另一实施方式中，所述p区域和/或n区域在IGBT半导体结构的上侧处圆形地构造或者恰好以分别布置在所述结构的端面处的半圆构造。
根据一种扩展方案，所述电介质层包括沉积的氧化物并且具有10纳米至1微米的层厚度。
在另一实施方式中，堆叠状的层结构具有在n-层与p+衬底之间形成的半导体接合。
应说明，表述“半导体接合”与表述“晶圆接合”同义地使用。
在另一实施方式中，由p+衬底构成的层结构形成第一部分堆叠，并且由n+层、n-层和必要时缓冲层构成的层结构形成第二部分堆叠。
在一种扩展方案中，堆叠状的层结构包括在p+衬底与n-层之间布置的中间层。在此，第一部分堆叠包括中间层。半导体接合布置在中间层与n-层之间或中间层与缓冲层之间。
在一种扩展方案中，第一部分堆叠和第二部分堆叠分别单片地构造。
在应用扩展方案中，形成第一部分堆叠，在其中，从p+衬底出发借助外延法在制造中间层。优选地，构造为p-层的中间层具有小于1013N/cm3的掺杂——也就是说，中间层是固有掺杂的——或者1013N/cm3至1015N/cm3之间的掺杂。在一种实施方式中，将p+衬底在接合前或后通过磨削过程削薄到200微米至500微米之间的厚度。
在另一实施方式中，形成第二堆叠，在其中，从n-层出发，使n-衬底与第二堆叠——也就是说，与n+层——通过晶圆接合过程连接。在一种实施方式中，n+层构造为n+衬底。
在另一过程步骤中，将n-衬底削薄到期望的厚度。
在一种扩展方案中，在削薄n-衬底或n-层后借助外延产生缓冲层。
优选地，n-衬底或n-层的厚度处于50微米至250微米之间的范围中。优选地，n-衬底的掺杂处于1013N/cm3至1015N/cm3之间的范围中。晶圆接合的优点是，n-层的厚度能够容易地制造。由此，在外延时省去长的沉积过程。借助晶圆接合也能够降低堆叠错误的数量。
在一种替代的实施方式中，n-衬底具有大于1010N/cm3且小于1013N/cm3的掺杂。其中，掺杂极端小，n-衬底也能够理解为固有层。
在一种扩展方案中，借助半导体接合过程步骤使n-衬底或缓冲层的表面直接连接到第一堆叠上。紧接着，将n-衬底的背侧削薄到n-层的期望厚度。在削薄n-衬底或n-层后借助外延法或高掺杂注入产生具有1018N/cm3至5*1015N/cm3之间的范围中的掺杂的n+层。
可理解的，n-衬底的削薄优选借助CMP步骤、也就是说借助化学机械研磨进行。
附图说明
接下来参照附图进一步阐述本发明。在此，同类的部分以同样的标志来标记。所显示的实施方式是强烈示意性的，也就是说，间距以及横向和纵向的延伸不是按比例的并且——只要未另外说明——互相也不具有能推导的几何关系。在此示出：
图1：IGBT的根据本发明的第一实施方式的示意性视图；
图2：IGBT的根据本发明的第一实施方式的示意性俯视图；
图3：IGBT的根据本发明的第二实施方式的示意性视图；
图4：IGBT的根据本发明的第三实施方式的示意性视图；
图5：IGBT的根据本发明的第三实施方式的示意性俯视图；
图6：IGBT的根据本发明的第四实施方式的示意性视图；
具体实施方式
图1的附图示出具有三个连接接通部14、16、18以及一个介电层20的IGBT半导体结构10的第一种实施方式的截面图。IGBT半导体10——以下也表示为半导体结构10——以上侧12和下侧22堆叠形地构造，并且具有在所显示的实施例中的所谓的非穿透型(non-punch-through)设计和总高度H1。
第一连接接通部14构造为金属层，其中，所述金属层材料锁合地与半导体结构10的下侧22连接。
IGBT半导体结构的最下层形成p+衬底24。因此，所述p+衬底形成半导体结构10的下侧22并且具有层厚度D1。在所述p+衬底上以所提及的顺序存在薄的弱n型掺杂的或弱p型掺杂的具有厚度D3的中间层26以及具有层厚度D2的n-层28。
在所显示的实施例中，n-层28形成半导体结构10的上侧12的至少一部分。半导体结构10的上侧12的另一部分由p区域32形成，其中，p区域32从IGBT半导体结构10的上侧12延伸伸入到n-层中，直至深度T1。
半导体结构10的上侧12的另一部分由n+区域34形成，其中，所述n+区域从半导体结构10的上侧12延伸伸入到p区域中，直至深度T2，并且T2小于T1。
因此，在半导体结构10的上侧12处邻接地构造有p区域与n-层之间的第一pn结36以及n+区域与p区域之间的第二pn结38，其中，介电层20至少覆盖第一pn结36和第二pn结38，并且以半导体结构10的上侧12——尤其以n+区域、p区域和n-层——材料锁合地连接，并且具有层厚度D5。
第二连接接通部16在介电层20的背向半导体结构10的表面上构造为场板。
第三连接接通部18同样构造为金属层，其中，所述金属层材料锁合地与半导体层10的上侧12的由p区域和n+区域构成的部分连接。
所述n+区域34，p区域32和n-层28与介电层16和三个连接接通部14、16、18一起形成MOS晶体管、即双极型构件，而p衬底24、中间层26和n-层28表现为pin二极管。
在图2的附图中显示在IGBT半导体结构10的上侧12上的俯视图。不仅p区域32而且n+区域34圆形地构造。IGBT半导体结构10具有矩形的上侧12，所述上侧12具有第一棱边长K1和第二棱边长K2。
在图3的附图中显示IGBT半导体结构10的另一实施方式。以下仅阐述相对于图1的附图的区别。所述半导体结构10构造为所谓的穿透型(punch-through)IGBT，其中，在中间层26与n层28之间布置有弱n型掺杂或弱p型掺杂的具有层厚D4的缓冲层40。
在图4的附图中显示IGBT半导体结构10的另一实施方式。以下仅阐述相对于图1和3的附图的区别。所述半导体结构10构造为所谓的沟槽型IGBT。
所述p区域32和n+区域34分别构造为在n-层或p区域32上的层，其中，半导体结构10具有从上侧12通过层状的n区域和层状的p区域直至伸入到n-层中的沟道(Grabe)42、即所谓的沟槽。
第一pn结36和第二pn结38垂直于沟道42的侧面44延伸。侧面44以及沟道的底部46以介电层20覆盖。构造为场板的第二连接接通部16相应地在介电层20上延伸。第三连接接通部18布置在半导体结构10的与沟道42的侧面44相对置的侧面50处，并且与层状的n+区域34以及与层状的p区域32导电连接。
在一种替代的实施方式中，在图6中显示第三连接接通部18布置在侧面12处。换句话说，第二pn结38相应于在图1中显示的实施方式也构造在所述表面处。
在图5中显示在根据图4的沟槽型IGBT上的示意性俯视图。沟道42具有长形的、圆形的形状，并且IGBT半导体结构10具有直径A1。
在图6的附图中显示IGBT半导体结构10的另一实施方式。以下仅阐述相对于图4的附图的区别。同样形成沟槽型IGBT的半导体结构10具有中间层26与n-层28之间的缓冲层40。

Claims (16)

1.一种IGBT半导体结构(10)，其具有上侧(12)和下侧(22)，所述IGBT半导体结构具有：
-构造在所述IGBT半导体结构(10)的下侧(22)处的p+衬底(24)，该p+衬底具有5*1018-5*1020N/cm3的掺杂剂浓度、50-500微米的层厚度(D1)并且包括GaAs化合物或由GaAs化合物构成，
-n-层(28)，其具有1012-1017N/cm3的掺杂剂浓度、10-300微米的层厚度(D2)并且包括GaAs化合物或由GaAs化合物构成，
-邻接所述n-层(28)的至少一个p区域(32)，所述p区域具有1014-1018N/cm3的掺杂剂浓度并且包括GaAs化合物或由GaAs化合物构成，
-邻接所述p区域(32)的至少一个n+区域(34)，所述n+区域具有至少1019N/cm3的掺杂剂浓度并且包括GaAs化合物或由GaAs化合物构成，
-介电层(20)，
-与所述IGBT半导体结构(10)的下侧(22)导电连接的第一连接接通部(14)，所述第一连接接通部包括金属或金属化合物，或者由金属或金属化合物构成，
-第二连接接通部(16)和第三连接接通部(18)，所述第二连接接通部和第三连接接通部分别包括金属或金属化合物，或者由金属或金属化合物构成，
其中，
-所述至少一个p区域(32)与所述n-层(28)形成第一pn结(36)，
-所述至少一个n+区域(34)与所述至少一个p区域(32)形成第二pn结(38)，
-所述介电层(20)至少覆盖所述第一pn结(36)和所述第二pn结(38)，并且与所述n-层(28)、所述p区域(32)以及所述n+区域(34)材料锁合地连接，
-所述第二连接接通部(16)在所述介电层(20)上构造为场板，并且
-所述第三连接接通部(18)与所述至少一个p区域(32)以及至少一个n+区域(34)导电连接，
其特征在于，
在所述p+衬底(24)与所述n-层(28)之间布置有经掺杂的中间层(26)，所述经掺杂的中间层具有1微米至50微米的层厚度(D3)以及1012-1017N/cm3的掺杂剂浓度，其中，所述中间层(26)至少与所述p+衬底(24)材料锁合地连接。
2.根据权利要求1所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)构造为p型掺杂。
3.根据权利要求2所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)的掺杂剂浓度构造为小于所述p+衬底(24)的掺杂剂浓度，或者所述中间层(26)的掺杂剂浓度是所述p+衬底的掺杂剂浓度的1/10000至1/2。
4.根据权利要求2或3所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)包括锌和/或硅。
5.根据权利要求1所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)构造为n型掺杂。
6.根据权利要求5所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)包括硅和/或锡。
7.根据权利要求5或6所述的IGBT半导体结构(10)，其特征在于，所述中间层(26)的掺杂剂浓度小于所述n-区域(28)的掺杂剂浓度且至少是所述n-区域(28)的掺杂剂浓度的1/100。
8.根据权利要求1至7中任一项所述的IGBT半导体结构(10)，其特征在于，所述IGBT半导体结构(10)具有n型掺杂的缓冲层(40)，其中，所述缓冲层(40)布置在所述中间层(26)与所述n-层(28)之间，所述IGBT半导体结构(10)具有1012-1017N/cm3的掺杂剂浓度以及1微米至50微米的层厚度(D4)，并且包括GaAs化合物或由GaAs化合物构成。
9.根据权利要求1至8中任一项所述的IGBT半导体结构(10)，其特征在于，所述IGBT半导体结构(10)构造为沟槽型IGBT半导体结构(10)，其中，所述介电层(20)垂直于所述IGBT半导体结构(10)的上侧(12)延伸。
10.根据权利要求1至9中任一项所述的IGBT半导体结构(10)，其特征在于，所述p+衬底(24)包括锌。
11.根据权利要求1至10中任一项所述的IGBT半导体结构(10)，其特征在于，所述n-层(28)和/或所述n+区域(34)包括硅和/或铬和/或钯和/或锡。
12.根据权利要求1至11中任一项所述的IGBT半导体结构(10)，其特征在于，所述IGBT半导体结构(10)单片地构造。
13.根据权利要求1至12中任一项所述的IGBT半导体结构(10)，其特征在于，所述IGBT半导体结构(10)的总高度(H1)最高是150-500微米。
14.根据权利要求1至13中任一项所述的IGBT半导体结构(10)，其特征在于，所述p区域(32)和/或所述n+区域(34)在所述IGBT半导体结构(10)的上侧(12)处椭圆形地或圆形地构造。
15.根据权利要求1至14中任一项所述的IGBT半导体结构(10)，其特征在于，所述IGBT半导体结构(10)具有1毫米至15毫米的棱边长(K1，K2)或直径(A1)。
16.根据权利要求1至15中任一项所述的IGBT半导体结构(10)，其特征在于，所述介电层(20)包括沉积的氧化物，并且具有10纳米至1微米的层厚度(D5)。
CN201711458322.0A 2016-12-28 2017-12-28 Igbt半导体结构 Pending CN108258030A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210275292.4A CN114664922A (zh) 2016-12-28 2017-12-28 Igbt半导体结构

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016015475.6 2016-12-28
DE102016015475.6A DE102016015475B3 (de) 2016-12-28 2016-12-28 IGBT Halbleiterstruktur

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN202210275292.4A Division CN114664922A (zh) 2016-12-28 2017-12-28 Igbt半导体结构

Publications (1)

Publication Number Publication Date
CN108258030A true CN108258030A (zh) 2018-07-06

Family

ID=60676752

Family Applications (2)

Application Number Title Priority Date Filing Date
CN202210275292.4A Pending CN114664922A (zh) 2016-12-28 2017-12-28 Igbt半导体结构
CN201711458322.0A Pending CN108258030A (zh) 2016-12-28 2017-12-28 Igbt半导体结构

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN202210275292.4A Pending CN114664922A (zh) 2016-12-28 2017-12-28 Igbt半导体结构

Country Status (5)

Country Link
US (1) US11171226B2 (zh)
EP (1) EP3343636B1 (zh)
JP (2) JP6926366B2 (zh)
CN (2) CN114664922A (zh)
DE (1) DE102016015475B3 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111435700A (zh) * 2019-01-14 2020-07-21 Tdk-迈克纳斯有限责任公司 半导体传感器结构
CN111435701A (zh) * 2019-01-14 2020-07-21 Tdk-迈克纳斯有限责任公司 构件半导体结构

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7046894B2 (ja) * 2019-11-27 2022-04-04 株式会社北電子 遊技機

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0603737A2 (en) * 1992-12-22 1994-06-29 Hughes Aircraft Company Hybrid bipolar/field-effect power transistor in group III-V material system
EP0631326A2 (en) * 1993-05-12 1994-12-28 Zaidan Hojin Handotai Kenkyu Shinkokai Semiconductor memory device and method of manufacturing same
JPH0837294A (ja) * 1994-07-25 1996-02-06 Hitachi Ltd 半導体装置及びそれを用いたインバータ装置
CN1159657A (zh) * 1995-12-19 1997-09-17 东芝株式会社 半导体器件
JP2001077357A (ja) * 1999-08-31 2001-03-23 Toshiba Corp 半導体装置
JP2005286042A (ja) * 2004-03-29 2005-10-13 Toyota Motor Corp 絶縁ゲート型半導体装置およびその製造方法
JP2009016482A (ja) * 2007-07-03 2009-01-22 Renesas Technology Corp 半導体装置およびその製造方法
US20090206420A1 (en) * 2008-02-18 2009-08-20 Infineon Technologies Ag Semiconductor device and method
US20110278599A1 (en) * 2009-02-24 2011-11-17 Mitsubishi Electric Corporation Silicon carbide semiconductor device
CN102870217A (zh) * 2010-04-06 2013-01-09 三菱电机株式会社 功率用半导体装置及其制造方法
US20140004696A1 (en) * 2012-06-28 2014-01-02 Sumitomo Electric Industries, Ltd. Method for manufacturing semiconductor device
CN103890920A (zh) * 2011-11-15 2014-06-25 富士电机株式会社 半导体装置以及半导体装置的制造方法
CN104241126A (zh) * 2014-09-17 2014-12-24 中航（重庆）微电子有限公司 沟槽型igbt及制备方法
CN104867925A (zh) * 2014-02-20 2015-08-26 英飞凌科技股份有限公司 半导体器件及有与背面电极直接邻接区的rc-igbt
CN106098553A (zh) * 2015-04-30 2016-11-09 英飞凌科技股份有限公司 通过外延生长制造半导体装置

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1247293B (it) * 1990-05-09 1994-12-12 Int Rectifier Corp Dispositivo transistore di potenza presentante una regione ultra-profonda, a maggior concentrazione
JP3361920B2 (ja) * 1995-08-23 2003-01-07 株式会社東芝 半導体装置
JP4075218B2 (ja) * 1999-06-16 2008-04-16 トヨタ自動車株式会社 ヘテロ接合型半導体装置
JP2001176884A (ja) * 1999-12-17 2001-06-29 Nec Corp 電界効果トランジスタ及びその製造方法
US7485920B2 (en) * 2000-06-14 2009-02-03 International Rectifier Corporation Process to create buried heavy metal at selected depth
DE10120656C2 (de) * 2001-04-27 2003-07-10 Infineon Technologies Ag Halbleiterbauelement mit erhöhter Avalanche-Festigkeit
US7652326B2 (en) * 2003-05-20 2010-01-26 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
DE102004039209B4 (de) * 2004-08-12 2009-04-23 Infineon Technologies Austria Ag Verfahren zur Herstellung einer n-dotierten Feldstoppzone in einem Halbleiterkörper und Halbleiterbauelement mit einer Feldstoppzone
US7902542B2 (en) * 2006-06-14 2011-03-08 3M Innovative Properties Company Adapted LED device with re-emitting semiconductor construction
US20080157117A1 (en) * 2006-12-28 2008-07-03 Mcnutt Ty R Insulated gate bipolar transistor with enhanced conductivity modulation
US8022474B2 (en) * 2008-09-30 2011-09-20 Infineon Technologies Austria Ag Semiconductor device
US8779510B2 (en) * 2010-06-01 2014-07-15 Alpha And Omega Semiconductor Incorporated Semiconductor power devices manufactured with self-aligned processes and more reliable electrical contacts
WO2012006261A2 (en) * 2010-07-06 2012-01-12 Maxpower Semiconductor Inc. Power semiconductor devices, structures, and related methods
US8614478B2 (en) * 2010-07-26 2013-12-24 Infineon Technologies Austria Ag Method for protecting a semiconductor device against degradation, a semiconductor device protected against hot charge carriers and a manufacturing method therefor
IT1402879B1 (it) * 2010-11-19 2013-09-27 St Microelectronics Srl Dispositivo igbt con regioni di emettitore sepolte
US8354733B2 (en) * 2011-03-04 2013-01-15 International Rectifier Corporation IGBT power semiconductor package having a conductive clip
US20150255547A1 (en) * 2012-03-29 2015-09-10 Agency For Science, Technology And Research III-Nitride High Electron Mobility Transistor Structures and Methods for Fabrication of Same
EP2682593A3 (en) * 2012-07-03 2018-09-12 Fuji Electric Co., Ltd. Ignition device with single chip for internal combustion engine
US9263271B2 (en) * 2012-10-25 2016-02-16 Infineon Technologies Ag Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing a semiconductor device
US9166005B2 (en) * 2013-03-01 2015-10-20 Infineon Technologies Austria Ag Semiconductor device with charge compensation structure
US9425153B2 (en) * 2013-04-04 2016-08-23 Monolith Semiconductor Inc. Semiconductor devices comprising getter layers and methods of making and using the same
US20140306284A1 (en) * 2013-04-12 2014-10-16 Infineon Technologies Austria Ag Semiconductor Device and Method for Producing the Same
US20150014706A1 (en) * 2013-07-15 2015-01-15 Laurence P. Sadwick Vertical Hetero Wide Bandgap Transistor
US9570570B2 (en) * 2013-07-17 2017-02-14 Cree, Inc. Enhanced gate dielectric for a field effect device with a trenched gate
JP6119564B2 (ja) * 2013-11-08 2017-04-26 住友電気工業株式会社 炭化珪素半導体装置の製造方法
US9337270B2 (en) * 2013-12-19 2016-05-10 Infineon Technologies Ag Semiconductor device
US9184248B2 (en) * 2014-02-04 2015-11-10 Maxpower Semiconductor Inc. Vertical power MOSFET having planar channel and its method of fabrication
DE102014113375A1 (de) * 2014-09-17 2016-03-17 Infineon Technologies Austria Ag Halbleitervorrichtung mit feldeffektstruktur
DE102014223315B4 (de) * 2014-11-14 2019-07-11 Infineon Technologies Ag Halbleiter-Metall-Übergang
US9443973B2 (en) * 2014-11-26 2016-09-13 Infineon Technologies Austria Ag Semiconductor device with charge compensation region underneath gate trench
DE102015106979B4 (de) * 2015-05-05 2023-01-12 Infineon Technologies Austria Ag Halbleiterwafer und Verfahren zum Herstellen von Halbleitervorrichtungen in einem Halbleiterwafer
DE102015114177A1 (de) * 2015-08-26 2017-03-02 Infineon Technologies Ag Halbleitervorrichtung, Siliziumwafer und Verfahren zum Herstellen eines Siliziumwafers

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0603737A2 (en) * 1992-12-22 1994-06-29 Hughes Aircraft Company Hybrid bipolar/field-effect power transistor in group III-V material system
EP0631326A2 (en) * 1993-05-12 1994-12-28 Zaidan Hojin Handotai Kenkyu Shinkokai Semiconductor memory device and method of manufacturing same
JPH0837294A (ja) * 1994-07-25 1996-02-06 Hitachi Ltd 半導体装置及びそれを用いたインバータ装置
CN1159657A (zh) * 1995-12-19 1997-09-17 东芝株式会社 半导体器件
JP2001077357A (ja) * 1999-08-31 2001-03-23 Toshiba Corp 半導体装置
JP2005286042A (ja) * 2004-03-29 2005-10-13 Toyota Motor Corp 絶縁ゲート型半導体装置およびその製造方法
JP2009016482A (ja) * 2007-07-03 2009-01-22 Renesas Technology Corp 半導体装置およびその製造方法
US20090206420A1 (en) * 2008-02-18 2009-08-20 Infineon Technologies Ag Semiconductor device and method
US20110278599A1 (en) * 2009-02-24 2011-11-17 Mitsubishi Electric Corporation Silicon carbide semiconductor device
CN102870217A (zh) * 2010-04-06 2013-01-09 三菱电机株式会社 功率用半导体装置及其制造方法
CN103890920A (zh) * 2011-11-15 2014-06-25 富士电机株式会社 半导体装置以及半导体装置的制造方法
US20140004696A1 (en) * 2012-06-28 2014-01-02 Sumitomo Electric Industries, Ltd. Method for manufacturing semiconductor device
CN104867925A (zh) * 2014-02-20 2015-08-26 英飞凌科技股份有限公司 半导体器件及有与背面电极直接邻接区的rc-igbt
CN104241126A (zh) * 2014-09-17 2014-12-24 中航（重庆）微电子有限公司 沟槽型igbt及制备方法
CN106098553A (zh) * 2015-04-30 2016-11-09 英飞凌科技股份有限公司 通过外延生长制造半导体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111435700A (zh) * 2019-01-14 2020-07-21 Tdk-迈克纳斯有限责任公司 半导体传感器结构
CN111435701A (zh) * 2019-01-14 2020-07-21 Tdk-迈克纳斯有限责任公司 构件半导体结构

Also Published As

Publication number Publication date
EP3343636B1 (de) 2020-07-08
JP6926366B2 (ja) 2021-08-25
JP2018110231A (ja) 2018-07-12
CN114664922A (zh) 2022-06-24
EP3343636A1 (de) 2018-07-04
US20180182874A1 (en) 2018-06-28
JP2021005740A (ja) 2021-01-14
DE102016015475B3 (de) 2018-01-11
US11171226B2 (en) 2021-11-09
JP7283768B2 (ja) 2023-05-30

Similar Documents

Publication Publication Date Title
US10340394B2 (en) III-V semiconductor diode
US20180138043A1 (en) Iii-v semiconductor diode
US20180277687A1 (en) Iii-v semiconductor diode
JP2018082174A (ja) Ｉｉｉ−ｖ族半導体ダイオード
US8884378B2 (en) Semiconductor device and a method for manufacturing a semiconductor device
JP7283768B2 (ja) Ｉｇｂｔ半導体構造
US10847626B2 (en) Stacked III-V semiconductor component
US9876011B2 (en) Semiconductor device
JP2020077894A (ja) スタック型のｉｉｉ−ｖ族半導体ダイオード
US10784381B2 (en) Stacked III-V semiconductor component
US6972469B2 (en) Lateral PIN diode and method for processing same
CN108074987B (zh) 堆叠状的肖特基二极管
US11699722B2 (en) Stacked, high-blocking InGaAs semiconductor power diode
US11715766B2 (en) Stacked high barrier III-V power semiconductor diode
CN117727798A (zh) 双向非对称瞬态电压抑制器器件
US11990553B2 (en) Merged PiN Schottky (MPS) diode and method of manufacturing the same
US20240321871A1 (en) Semiconductor device
CN117525113A (zh) 半导体装置和制造半导体装置的方法
CN112201690A (zh) Mosfet晶体管

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20180706

RJ01 Rejection of invention patent application after publication