CN108198793B - Near-junction micro-flow embedded type high-efficiency heat dissipation gallium nitride transistor and manufacturing method thereof - Google Patents
Near-junction micro-flow embedded type high-efficiency heat dissipation gallium nitride transistor and manufacturing method thereof Download PDFInfo
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- CN108198793B CN108198793B CN201711413052.1A CN201711413052A CN108198793B CN 108198793 B CN108198793 B CN 108198793B CN 201711413052 A CN201711413052 A CN 201711413052A CN 108198793 B CN108198793 B CN 108198793B
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Abstract
The invention relates to a near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor and a manufacturing method thereof. The invention introduces the fluid heat dissipation technology into the chip, realizes the high-efficiency heat dissipation capability of the near junction area, and solves the problem of heat accumulation in the active area of the high-power gallium nitride device; compared with the traditional gallium nitride device, the power density of the device can be improved by more than 2 times, the maximum output power of the device is greatly improved, and higher reliability is maintained.
Description
Technical Field
The invention belongs to the technical field of semiconductor device heat management development, and particularly relates to a near-junction micro-flow embedded high-efficiency heat dissipation gallium nitride transistor and a manufacturing method thereof.
Technical Field
The third generation semiconductor power device represented by gallium nitride has shown excellent high-power application characteristics, and a gallium nitride chip in practical application is based on a SiC substrate, the power density of the power device reaches one fifth of the theoretical value, and the advantage of the high-power characteristics of the gallium nitride is far from being exerted. This is mainly because the high-power microwave device can generate a large amount of heat accumulation while outputting high power, and is especially more serious for the microwave power device with output power reaching hundreds of watts or even kilowatts, which causes the sharp rise of the junction temperature of the device, resulting in the serious decline of the performance and reliability of the device.
At present, gallium nitride-based power devices are mainly epitaxially grown on substrate materials such as silicon carbide and sapphire, and the substrate materials have low thermal conductivity, and the performance of the gallium nitride devices is severely limited by the problem of heat dissipation, so that the thermal management development of the gallium nitride semiconductor devices is developed to solve the technical bottleneck of high-power application of the gallium nitride semiconductor devices. Especially, aiming at the special condition requirements of the existing equipment system on ultra-high power and high integration devices, the existing passive heat dissipation technology cannot solve the problem of heat accumulation in the active area of the system chip due to the physical characteristics of the existing passive heat dissipation technology.
From the macroscopic scale, the active heat dissipation capability of liquid is usually more than 10 times of the passive heat dissipation capability of solid, so the exploration of effective integration of the active heat dissipation technology of liquid cooling and the near junction area of the chip is a hot research direction for solving the special requirements of ultra-high power, and how to overcome the defects in the prior art, and the realization of the microfluidic heat dissipation technology inside the gallium nitride device chip becomes one of the key problems to be solved urgently in the field of heat management development of the high-power devices at present.
Disclosure of Invention
The invention aims to provide a near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor and a manufacturing method thereof, which solve the problem of heat accumulation of an active area of a gallium nitride high-power device chip, carry out chip-level heat management technology development and improve the heat dissipation capacity of a near-junction area of the chip.
The technical scheme for realizing the purpose of the invention is as follows: a near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor sequentially comprises an active region functional layer, a barrier layer, a buffer layer and a substrate layer from top to bottom, wherein the active region functional layer is composed of a gate, a source and a drain, a micro-fluid channel is arranged in the substrate layer, and the micro-fluid channel is arranged at a near-junction region below the active region.
The microfluidic channel is 5-30 microns away from the buffer layer and 5-15 microns away from the back of the substrate, the center of the microfluidic channel corresponds to the grid of the active region functional layer in the vertical direction, the left width and the right width of the microfluidic channel are determined according to the grid distance, and one third to two thirds of the grid distance is taken.
The width of the microfluidic channel is 10um-100 um.
The near junction region is an area covered below the active region and has a size smaller than 100 micrometers.
The gallium nitride device substrate is made of Si, sapphire or SiC materials.
A method for manufacturing a near-junction micro-flow embedded high-efficiency heat dissipation gallium nitride transistor comprises the preparation of the gallium nitride transistor and the preparation of a near-junction micro-fluid channel, wherein the preparation of the micro-fluid channel comprises the following steps:
1) coating a protective layer on the front surface of the finished gallium nitride transistor, protecting the functional region, and bonding the front surface of the transistor and the temporary slide glass by adopting a bonding technology;
2) grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 80-200 microns;
3) photoetching an etched pattern of a microfluidic channel on a substrate of a gallium nitride transistor, wherein the pattern on the substrate is positioned in a near junction region right below an active region of the transistor, and etching the near junction microfluidic channel on the substrate by using a plasma etcher until the distance from the substrate to the gallium nitride layer is 5-30 microns, so as to complete the etching of the near junction microfluidic channel;
4) coating a protective layer on one surface of a new substrate sheet, protecting the substrate surface, and bonding the front surface of the transistor and the temporary slide by adopting a bonding technology;
5) grinding and thinning the new substrate sheet by using a sheet grinding machine, wherein the thickness of the residual substrate after thinning is 5-15 microns;
6) spin-coating a layer of BCB on the thinned surface of the new substrate after thinning, and bonding the substrate of the gallium nitride transistor embedded in the microfluidic channel and the thinned surface of the new substrate at the temperature of 200-250 ℃ relatively to complete the sealing of the near-junction area microfluidic channel;
7) and removing the two groups of temporary bonding slides to realize the preparation of the near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor.
The protective layer in step 1 and step 4 is oxide, nitride or BCB.
Compared with the prior art, the invention has the following remarkable advantages: (1) according to the invention, by utilizing a plasma etching technology, an embedded micro-channel is formed in a near-junction area of a substrate at the lower end of a gallium nitride active area, and a bonding technology is adopted to seal the micro-channel to form a micro-channel, so that the development of a gallium nitride transistor chip-level fluid heat management technology is realized, and the high-efficiency heat dissipation performance of the near-junction area of the gallium nitride transistor is improved; (2) the invention introduces the fluid heat dissipation technology into the chip, realizes the high-efficiency heat dissipation capability of the near junction area, and solves the problem of heat accumulation in the active area of the high-power gallium nitride device; compared with the traditional gallium nitride device, the power density of the device can be improved by more than 2 times, the maximum output power of the device is greatly improved, and higher reliability is maintained.
Drawings
Fig. 1 is a schematic view of a near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor structure according to the present invention.
Fig. 2(a) -2 (h) are schematic diagrams of a preparation process of a near-junction microfluidic channel according to the present invention, wherein fig. 2(a) is a schematic diagram of a conventional gallium nitride transistor, fig. 2(b) is a schematic diagram of temporary bonding of a transistor functional region, fig. 2(c) is a schematic diagram of thinning a transistor substrate, fig. 2(d) is a schematic diagram of etching a microchannel, fig. 2(e) is a schematic diagram of temporary bonding of a sealing structure, fig. 2(f) is a schematic diagram of thinning a sealing structure, fig. 2(g) is a schematic diagram of bonding sealing of a microchannel, and fig. 2(h) is a schematic diagram of removing a temporary bonding slide.
Detailed Description
The following describes in detail a specific embodiment of the present invention with reference to the drawings and examples.
Referring to fig. 1, the high-efficiency heat-dissipation gallium nitride transistor with a near-junction micro-flow embedded structure provided by the invention comprises an active region functional layer, a barrier layer 4, a buffer layer 5, a substrate 6 and a micro-flow channel 7 from top to bottom, wherein the active region functional layer is composed of a gate 1, a source 2 and a drain 3, and the gallium nitride device substrate 6 is any one of Si, sapphire and SiC materials; the substrate layer is internally provided with a micro-fluid channel 7, the micro-fluid channel 7 is arranged below the gate 1 of the active region functional layer and close to the position of a heat source 8, the area is a near junction area, and the high-efficiency heat dissipation capacity of the gallium nitride transistor can be effectively realized through the heat exchange of micro-fluid.
Referring to fig. 2, the method for manufacturing a near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor provided by the invention comprises the following specific steps:
1) conventional fabrication of gallium nitride transistors: completing the growth of the gate, source and drain functional regions to obtain a gallium nitride transistor, as shown in fig. 2 (a);
2) designing and preparing a near junction area embedded micro-channel;
① designing micro flow channel, wherein the size and distribution of the micro flow channel in the near junction region are designed according to the size of the active region of the finished GaN transistor, the width of the micro flow channel is 10um-100um, and the distribution is consistent with the size of the active region;
② temporary bonding of the functional region of the transistor, namely coating a protective layer on the front surface of the finished GaN transistor to protect the functional region, wherein the protective layer can be oxide, nitride or BCB, and bonding the front surface of the transistor and the temporary carrier by using a bonding technology, as shown in FIG. 2 (b);
③ thinning the substrate of the transistor, namely grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 80-200 microns, as shown in figure 2 (c);
④ etching micro channel by photoetching a designed micro channel pattern on the substrate of the GaN transistor, wherein the pattern on the substrate is located in the near junction region right below the active region of the transistor, and etching the substrate with a plasma etcher until the distance from the substrate to the GaN layer is 5-30 μm to complete the etching of the near junction micro channel, as shown in FIG. 2 (d);
⑤ temporary bonding of sealing structure comprises coating a protective layer on one side of a new substrate to protect the substrate, wherein the protective layer can be oxide, nitride or BCB, and bonding the front surface of the transistor with a temporary carrier by bonding technique, as shown in FIG. 2 (e);
⑥ thinning the sealing structure by grinding the new substrate sheet with a grinding machine to thin the new substrate sheet, wherein the thickness of the residual substrate after thinning is 5-15 μm, as shown in FIG. 2 (f);
⑦ bonding and sealing the micro-channel, i.e. spin-coating a layer of temporary bonding material on the thinned surface of the new substrate, and bonding the substrate of the GaN transistor embedded in the micro-channel and the thinned surface of the new substrate at the temperature of 200-250 ℃ to complete the sealing of the micro-channel at the near-junction region, as shown in FIG. 2 (g);
⑧ removing the temporary bonding slide, removing the upper and lower groups of temporary bonding layers, and realizing the preparation of the near-junction micro-flow embedded high-efficiency heat dissipation gallium nitride transistor, as shown in fig. 2 (h).
Examples
A manufacturing method of a near-junction micro-flow embedded high-efficiency heat dissipation gallium nitride transistor specifically comprises the following steps:
1) finishing the conventional front process of the gallium nitride transistor to obtain the gallium nitride transistor, wherein the substrate is made of SiC material, the gate-gate spacing of the active region is 30um, and the active region is of a 10-gate structure;
2) preparing a near junction area embedded micro-channel;
① the size of the near junction micro-fluid channel is 20um according to the size of the active area of the finished GaN transistor, the center of the micro-fluid channel is consistent with the center of the heat source, the distribution of the micro-fluid channel is 10 groups according to the size of the active area, and the heat dissipation capability and reliability capability of the micro-fluid channel are fully satisfied.
② coating a silicon oxide dielectric protective layer on the front surface of the completed GaN transistor to protect the functional region, and bonding the front surface of the transistor and the temporary slide by bonding technique;
③ putting the GaN transistor containing the temporary slide into a sheet grinder, grinding and thinning the SiC substrate until the thickness is 80 microns;
④ photoetching a designed micro-fluid channel pattern on the SiC substrate of the GaN transistor, wherein the pattern on the substrate is located in the near-junction region right below the active region of the transistor, and performing near-junction micro-fluid channel etching on the SiC substrate by using a plasma etcher until the distance from the SiC substrate to the GaN layer is 10 microns;
⑤ coating a silicon oxide medium protective layer on one surface of a new SiC substrate, protecting the substrate surface, and bonding the front surface of the transistor and the temporary slide by bonding technology;
⑥ putting the SiC substrate slice containing the temporary slide glass into a slice grinding machine, grinding and thinning the SiC substrate slice to a thickness of 10 microns;
⑦ spin-coating a layer of BCB on the thinned surface of the SiC substrate containing the temporary slide after thinning, bonding the substrate of the gallium nitride transistor embedded in the micro-channel and the thinned surface of the SiC substrate containing the temporary slide at the temperature of 200-250 ℃ relatively, and sealing the near-junction micro-channel;
⑧ the temporary bonding slide is removed to realize the preparation of the near-junction micro-flow embedded high-efficiency heat-dissipation gallium nitride transistor.
The above embodiments and examples are specific supports for the technical ideas of the design and manufacturing method of the near-junction micro-fluidic embedded high-efficiency heat dissipation gallium nitride transistor provided by the present invention, and the protection scope of the present invention cannot be limited thereby.
Claims (3)
1. A manufacturing method of a near-junction micro-flow embedded heat dissipation gallium nitride transistor comprises an active region functional layer, a barrier layer (4), a buffer layer (5) and a substrate layer (6) from top to bottom, wherein the active region functional layer is composed of a gate (1), a source (2) and a drain (3), a micro-fluid channel (7) is arranged in the substrate layer (6), the micro-fluid channel (7) is arranged at a near-junction region below an active region, the near-junction region is a region covered below the active region, and the size of the near-junction region is smaller than 100 micrometers; the microfluidic channel is 5-30 microns away from the buffer layer (5) and 5-15 microns away from the back of the substrate, the center of the microfluidic channel corresponds to the grid (1) of the active region functional layer in the vertical direction, the left width and the right width of the microfluidic channel are determined according to the grid-to-grid distance, and one third to two thirds of the grid-to-grid distance is selected; the width of the microfluidic channel is 10um-100um, and the manufacturing method is characterized by comprising the steps of preparing a gallium nitride transistor and preparing a near junction microfluidic channel, wherein the preparation of the microfluidic channel comprises the following steps:
1) coating a protective layer on the front surface of the finished gallium nitride transistor, protecting the functional region, and bonding the front surface of the transistor and the temporary slide glass by adopting a bonding technology;
2) grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 80-200 microns;
3) photoetching an etched pattern of a microfluidic channel on a substrate of a gallium nitride transistor, wherein the pattern on the substrate is positioned in a near junction region right below an active region of the transistor, and etching the near junction microfluidic channel on the substrate by using a plasma etcher until the distance from the substrate to the gallium nitride layer is 5-30 microns, so as to complete the etching of the near junction microfluidic channel;
4) coating a protective layer on one surface of a new substrate sheet, protecting the substrate surface, and bonding the front surface of the transistor and the temporary slide by adopting a bonding technology;
5) grinding and thinning the new substrate sheet by using a sheet grinding machine, wherein the thickness of the residual substrate after thinning is 5-15 microns;
6) spin-coating a layer of BCB on the thinned surface of the new substrate after thinning, and bonding the substrate of the gallium nitride transistor embedded in the microfluidic channel and the thinned surface of the new substrate at the temperature of 200-250 ℃ relatively to complete the sealing of the near-junction area microfluidic channel;
7) and removing the two groups of temporary bonding slides to finish the preparation of the near-junction micro-flow embedded heat dissipation gallium nitride transistor.
2. The method as claimed in claim 1, wherein the passivation layer in step 1 is an oxide, a nitride or BCB.
3. The method as claimed in claim 1, wherein the passivation layer in step 4 is an oxide, a nitride or BCB.
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| CN109935558A (en) * | 2019-02-20 | 2019-06-25 | 厦门市三安集成电路有限公司 | The heat dissipating method and radiator structure of heterojunction bipolar transistor |
| CN109742026B (en) * | 2019-02-25 | 2024-03-29 | 哈尔滨工业大学 | Method for preparing diamond-assisted heat dissipation silicon carbide substrate GaN-HEMTs by direct growth method |
| CN110379782A (en) * | 2019-06-23 | 2019-10-25 | 中国电子科技集团公司第五十五研究所 | Diamond heat dissipation gallium nitride transistor and preparation method are embedded in based on the piece for etching and orienting extension |
| TWI701991B (en) | 2019-07-08 | 2020-08-11 | 欣興電子股份有限公司 | Circuit board structure |
| CN111952261B (en) * | 2020-07-09 | 2023-01-17 | 中国科学院微电子研究所 | Electronic chip and electronic device |
| CN113035808B (en) * | 2020-11-06 | 2022-09-09 | 中国电子科技集团公司第五十五研究所 | On-chip micro-flow driving device applied to gallium nitride transistor and preparation method |
| CN113437031A (en) * | 2021-06-17 | 2021-09-24 | 西北工业大学 | Embedded micro-channel heat dissipation device based on liquid metal |
| CN113594111A (en) * | 2021-07-08 | 2021-11-02 | 哈工大机器人(中山)无人装备与人工智能研究院 | Gallium nitride power device with in-chip array micro-flow column heat dissipation structure and manufacturing method |
| CN114336266A (en) * | 2021-12-30 | 2022-04-12 | 中国科学院长春光学精密机械与物理研究所 | High-efficiency heat-dissipation semiconductor laser and manufacturing method thereof |
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