CN108172556B - On-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding and manufacturing method thereof - Google Patents
On-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding and manufacturing method thereof Download PDFInfo
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- CN108172556B CN108172556B CN201711413503.1A CN201711413503A CN108172556B CN 108172556 B CN108172556 B CN 108172556B CN 201711413503 A CN201711413503 A CN 201711413503A CN 108172556 B CN108172556 B CN 108172556B
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Abstract
The invention discloses an on-chip microflow heat dissipation gallium nitride transistor based on atomic bonding and a manufacturing method thereof. The invention introduces the fluid heat dissipation technology into the chip by adopting the atomic bonding technology, the atomic bonding adopts the oxide or nitride medium, the thickness of the bonding layer is dozens of nanometers, the thermal resistance of the bonding sealing layer is effectively reduced, the high-efficiency heat dissipation capability in the chip is realized, and the heat accumulation in the active region of the high-power gallium nitride device is solved. Compared with the traditional gallium nitride device, the power density of the device can be improved by more than 2 times, the maximum output power of the device is greatly improved, and higher reliability is maintained.
Description
Technical Field
The invention belongs to the technical field of thermal management development of power devices, and particularly relates to an on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding and a manufacturing method thereof.
Technical Field
The third generation semiconductor power devices represented by gallium nitride have shown excellent high-power application characteristics, most of the gallium nitride power chips in practical application are SiC substrates, the power density of the power devices reaches one fifth of the theoretical value, and the high-power characteristic advantages of the gallium nitride are far from being exerted. This is mainly because the high-power microwave device can generate a large amount of heat accumulation while outputting high power, and is especially more serious for the microwave power device with output power reaching hundreds of watts or even kilowatts, which causes the sharp rise of the junction temperature of the device, resulting in the serious decline of the performance and reliability of the device.
At present, gallium nitride-based power devices are mainly epitaxially grown on substrate materials such as silicon carbide and sapphire, the substrate materials have low thermal conductivity, the performance of the gallium nitride devices is severely limited due to the problem of heat dissipation, partial research is based on diamond substrates, but the technology is still in the research and development stage, and therefore the thermal management development of the gallium nitride semiconductor devices is carried out to solve the technical bottleneck of high-power application of the gallium nitride semiconductor devices. Especially, aiming at the special condition requirements of the existing equipment system on ultra-high power and high integration devices, the existing passive heat dissipation technology cannot solve the problem of heat accumulation in the active area of the system chip due to the physical characteristics of the existing passive heat dissipation technology. From the macroscopic scale, the active heat dissipation capability of liquid is usually more than 10 times of the passive heat dissipation capability of solid, so the exploration of effective integration of the active heat dissipation technology of liquid cooling and the near junction area of the chip is a hot research direction for solving the special requirements of ultra-high power, and how to overcome the defects in the prior art, and the realization of the microfluidic heat dissipation technology inside the gallium nitride device chip becomes one of the key problems to be solved urgently in the field of heat management development of the high-power devices at present.
Disclosure of Invention
The invention aims to provide an on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding and a manufacturing method thereof.
The technical scheme for realizing the purpose of the invention is as follows: an on-chip microflow heat dissipation gallium nitride transistor based on atomic bonding sequentially comprises an active region functional layer, a barrier layer, a buffer layer and a substrate from top to bottom, wherein a microfluid channel is arranged in the substrate, is arranged below the active region functional layer and is formed through an atomic bonding process, and microfluid is arranged in the microfluid channel.
The microfluidic channel is 10-20 microns from the buffer layer and 10-20 microns from the back of the substrate.
The substrate is any one of Si, sapphire, SiC and diamond materials.
All source region functional layers are composed of a gate, a source and a drain.
A manufacturing method of an on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding comprises the steps of preparing the gallium nitride transistor and preparing a micro-fluid channel, wherein the micro-fluid channel comprises the following steps:
1) coating a protective layer on the front surface of the finished gallium nitride transistor, protecting the functional region, and bonding the front surface of the transistor and the temporary slide glass by adopting a bonding technology;
2) grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 10-20 microns;
3) coating a protective layer on one surface of the new substrate sheet to protect the substrate surface; bonding the new substrate and the temporary slide by adopting a bonding technology;
4) grinding and thinning the new substrate sheet by using a sheet grinding machine, wherein the thickness of the residual substrate after thinning is 80-200 microns;
5) photoetching a designed micro-channel etching graph at a corresponding position on the thinned new substrate according to the position and the size of an active region of the gallium nitride transistor, and etching the substrate with a plasma etching machine at a near-junction area until the etching is stopped at a distance of 10-20 microns from a back layer of the substrate, thereby completing the etching of the substrate micro-channel;
6) respectively sputtering a layer of nano-scale oxide or nitride on the surface of the substrate thinning surface of the gallium nitride transistor and the surface of the thinning surface of the new substrate embedded with the micro-channel, wherein the thickness of the nano-scale oxide or nitride is less than 50 um; then, the substrate thinning surface of the gallium nitride transistor is oppositely bonded with the thinning surface of the new substrate embedded with the micro-channel, and meanwhile, the positions of the micro-channel and the active region are ensured to be in one-to-one correspondence, so that the sealing of the micro-channel in the chip is completed;
7) and removing the two groups of temporary bonding slides to finish the preparation of the on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding.
And 6, bonding the substrate thinning surface of the gallium nitride transistor and the thinning surface of the new substrate embedded with the micro-channel relatively under the conditions of 200 ℃ and 2000Mpa pressure.
Compared with the prior art, the invention has the following remarkable advantages: (1) the invention utilizes the plasma etching technology and introduces the micro-channel into the substrate at the lower end of the active area of the gallium nitride transistor through the atomic bonding technology, thereby achieving the high-efficiency heat dissipation capability; the micro flow channel is formed by bonding and sealing oxide or nitride nano interfaces in the chip, so that the development of a gallium nitride transistor chip-level fluid thermal management technology is realized, and the efficient heat dissipation characteristic in the chip of the gallium nitride transistor is improved.
Drawings
Fig. 1 is a schematic diagram of an on-chip micro-fluidic heat dissipation gan transistor structure based on atomic bonding according to the present invention.
Fig. 2(a) is a schematic diagram of conventional preparation of a gallium nitride transistor, fig. 2(b) is a schematic diagram of thinning of a transistor substrate, fig. 2(c) is a schematic diagram of bonding of a substrate sheet with a micro-channel structure, fig. 2(d) is a schematic diagram of thinning of a substrate sheet with a micro-channel structure, fig. 2(e) is a schematic diagram of etching of a micro-channel, fig. 2(f) is a schematic diagram of bonding and sealing of a micro-channel, and fig. 2(g) is a schematic diagram of removing a temporary bonding carrier.
Detailed Description
The following describes in detail a specific embodiment of the present invention with reference to the drawings and examples.
Referring to fig. 1, an on-chip microflow heat dissipation gan transistor based on atomic bonding includes, from top to bottom, an active region functional layer 1, a barrier layer 2, a buffer layer 3, a substrate 4 and a microchannel 5 thereof. The substrate 4 is any one of Si, sapphire, SiC and diamond materials; the substrate is internally provided with a micro-fluid channel 5, the micro-fluid channel 5 is formed below the active region functional layer 1 and close to the position of the heat source region 6 through an atomic bonding process, and the high-efficiency heat dissipation capability of the gallium nitride transistor can be effectively realized through the heat exchange of micro-fluid.
Referring to fig. 2, a method for manufacturing an on-chip micro-fluidic heat dissipation gallium nitride transistor based on atomic bonding includes the following steps:
1) conventional fabrication of gallium nitride transistors: finishing the growth of the functional regions of the gate, the source and the drain to obtain a gallium nitride transistor, as shown in figure 2 (a);
2) preparing micro-channels in the chip based on atomic bonding;
① temporary bonding of transistor functional region, coating a protective layer on the front surface of the completed GaN transistor to protect the functional region, and bonding the front surface of the transistor and the temporary carrier by bonding technique;
② thinning the substrate of the transistor, namely grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 10-20 microns, as shown in figure 2 (b);
③ bonding the substrate with microchannel structure, coating a protective layer on one side of the new substrate to protect the substrate, and bonding the new substrate and the temporary slide by bonding technique, as shown in FIG. 2 (c);
④ thinning the substrate sheet with micro-channel structure, grinding the new substrate sheet with a grinding machine to thin, and keeping the residual substrate thickness at 80-200 μm as shown in FIG. 2 (d);
⑤ etching micro-channel by photoetching a designed micro-channel etching pattern at the corresponding position on the thinned new substrate according to the position and size of the active region of the GaN transistor, and etching the substrate with a plasma etcher to near-junction micro-channel until the distance from the substrate back layer is 10-20 μm, thereby completing etching the substrate micro-channel, as shown in fig. 2 (e);
⑥ bonding and sealing the micro-channel, namely sputtering a layer of nano-scale oxide or nitride on the surface of the substrate thinning surface of the gallium nitride transistor and the surface of the thinning surface of the new substrate embedded with the micro-channel respectively, wherein the thickness is less than 50um, then bonding the substrate thinning surface of the gallium nitride transistor and the thinning surface of the new substrate embedded with the micro-channel relatively under the conditions of specific temperature and pressure, and simultaneously ensuring the positions of the micro-channel and the active region to be in one-to-one correspondence to complete the sealing of the micro-channel in the chip, as shown in figure 2 (f);
⑦ removing temporary bonding slides 2 groups of temporary bonding slides were removed to realize the fabrication of microfluidic heat-sinking gan transistors in-chip based on atomic bonding, as shown in fig. 2 (g).
Examples
A design and manufacturing method of a near-junction micro-flow embedded high-efficiency heat dissipation gallium nitride transistor specifically comprises the following steps:
1) finishing the conventional front process of the gallium nitride transistor to obtain the gallium nitride transistor, wherein the substrate is made of SiC material, the size of an active region is 60 × 125um, and the gallium nitride transistor is of a two-gate structure;
2) preparing micro-channels in the chip based on atomic bonding;
① coating a silicon oxide dielectric protective layer on the front surface of the completed GaN transistor to protect the functional region, and bonding the front surface of the transistor and the temporary slide by bonding technique;
② putting the GaN transistor containing the temporary slide into a sheet grinder, grinding and thinning the SiC substrate until the thickness is 15 microns;
③ coating a silicon oxide medium protective layer on one side of a new SiC substrate, protecting the substrate surface, and bonding the new substrate and the temporary slide by bonding technology;
④ putting the SiC substrate slice containing the temporary slide glass into a slice grinding machine, grinding and thinning the SiC substrate slice to the thickness of 100 microns;
⑤ photoetching a designed micro-channel etching pattern at the corresponding position on the thinned new substrate according to the position and size of the active area of the gallium nitride transistor, designing two groups of micro-channels corresponding to the active area grid structure, etching the substrate with a plasma etcher at the near junction area until the etching is stopped at a distance of 20 microns from the back layer of the substrate, wherein the size of the whole micro-channel area is 60 x 125um and corresponds to the size of the active area, and completing the etching of the substrate micro-channel;
⑥ sputtering a layer of nanometer aluminum nitride on the surface of the substrate thinning surface of the gallium nitride transistor and the thinning surface of the new substrate embedded with the micro-channel, wherein the thickness is 20um, then bonding the substrate thinning surface of the gallium nitride transistor and the thinning surface of the new substrate embedded with the micro-channel at 200 ℃ and 2000Mpa, and simultaneously ensuring the positions of the micro-channel and the active region to be in one-to-one correspondence to complete the sealing of the micro-channel in the chip;
⑦ the temporary bonding slides are then removed to enable fabrication of atomic bonding based on-chip microfluidic heat-sinking gan transistors.
The above embodiments and examples are specific supports for the technical idea of the method for manufacturing an on-chip micro-fluidic heat dissipation gallium nitride transistor based on atomic bonding, and the protection scope of the present invention is not limited thereby, and any equivalent changes or equivalent modifications made on the basis of the technical scheme according to the technical idea of the present invention still belong to the protection scope of the technical scheme of the present invention.
Claims (2)
1. A manufacturing method of an on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding comprises an active region functional layer (1), a barrier layer (2), a buffer layer (3) and a substrate (4) from top to bottom in sequence, wherein a micro-fluid channel (5) is arranged in the substrate (4), the micro-fluid channel (5) is arranged below the active region functional layer and is formed through an atomic bonding process, and micro-fluid is arranged in the micro-fluid channel (5); the micro-fluid channel (5) is 10-20 microns away from the buffer layer (3) and 10-20 microns away from the back surface of the substrate, the manufacturing method is characterized by comprising the steps of preparing a gallium nitride transistor and preparing the micro-fluid channel, and the preparation of the micro-fluid channel comprises the following steps:
1) coating a protective layer on the front surface of the finished gallium nitride transistor, protecting the functional region, and bonding the front surface of the transistor and the temporary slide glass by adopting a bonding technology;
2) grinding and thinning the substrate of the gallium nitride transistor by using a grinding machine, wherein the thickness of the residual substrate after thinning is 10-20 microns;
3) coating a protective layer on one surface of the new substrate sheet to protect the substrate surface; bonding the new substrate and the temporary slide by adopting a bonding technology;
4) grinding and thinning the new substrate sheet by using a sheet grinding machine, wherein the thickness of the residual substrate after thinning is 80-200 microns;
5) photoetching a designed micro-channel etching graph at a corresponding position on the thinned new substrate according to the position and the size of an active region of the gallium nitride transistor, and etching the substrate with a plasma etching machine at a near-junction area until the etching is stopped at a distance of 10-20 microns from a back layer of the substrate, thereby completing the etching of the substrate micro-channel;
6) respectively sputtering a layer of nano-scale oxide or nitride on the surface of the substrate thinning surface of the gallium nitride transistor and the surface of the thinning surface of the new substrate embedded with the micro-channel, wherein the thickness of the nano-scale oxide or nitride is less than 50 um; then, the substrate thinning surface of the gallium nitride transistor is oppositely bonded with the thinning surface of the new substrate embedded with the micro-channel, and meanwhile, the positions of the micro-channel and the active region are ensured to be in one-to-one correspondence, so that the sealing of the micro-channel in the chip is completed;
7) and removing the two groups of temporary bonding slides to finish the preparation of the on-chip micro-flow heat dissipation gallium nitride transistor based on atomic bonding.
2. The method for manufacturing an on-chip microflow heat-dissipation gallium nitride transistor based on atomic bonding as claimed in claim 1, wherein in step 6, the substrate thinning surface of the gallium nitride transistor and the thinning surface of the new substrate embedded with the micro flow channel are bonded at a temperature of 200 ℃ and a pressure of 2000 Mpa.
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| CN110379782A (en) * | 2019-06-23 | 2019-10-25 | 中国电子科技集团公司第五十五研究所 | Diamond heat dissipation gallium nitride transistor and preparation method are embedded in based on the piece for etching and orienting extension |
| CN110957289A (en) * | 2019-12-17 | 2020-04-03 | 母凤文 | Multilayer composite substrate structure and preparation method thereof |
| CN111446221B (en) * | 2020-05-08 | 2022-03-08 | 西安交通大学 | Low-flow-resistance chip embedded array micro-jet radiator and manufacturing method thereof |
| CN111952261B (en) * | 2020-07-09 | 2023-01-17 | 中国科学院微电子研究所 | Electronic chip and electronic device |
| CN113035808B (en) * | 2020-11-06 | 2022-09-09 | 中国电子科技集团公司第五十五研究所 | On-chip micro-flow driving device applied to gallium nitride transistor and preparation method |
| CN113594111A (en) * | 2021-07-08 | 2021-11-02 | 哈工大机器人(中山)无人装备与人工智能研究院 | Gallium nitride power device with in-chip array micro-flow column heat dissipation structure and manufacturing method |
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| CN204834604U (en) * | 2015-09-02 | 2015-12-02 | 成都嘉石科技有限公司 | Semiconductor device of high heat dissipating ability |
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