CN107919419A - Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents
Gallium nitride-based light emitting diode epitaxial wafer and manufacturing method thereof Download PDFInfo
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- CN107919419A CN107919419A CN201710915907.4A CN201710915907A CN107919419A CN 107919419 A CN107919419 A CN 107919419A CN 201710915907 A CN201710915907 A CN 201710915907A CN 107919419 A CN107919419 A CN 107919419A
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 41
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims description 20
- 230000004888 barrier function Effects 0.000 claims description 16
- 238000000605 extraction Methods 0.000 abstract description 9
- 239000004065 semiconductor Substances 0.000 abstract description 8
- 238000002310 reflectometry Methods 0.000 abstract description 5
- 230000009467 reduction Effects 0.000 abstract description 4
- 238000002834 transmittance Methods 0.000 abstract 1
- 229910021478 group 5 element Inorganic materials 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 229910052738 indium Inorganic materials 0.000 description 4
- 239000011777 magnesium Substances 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- NCGICGYLBXGBGN-UHFFFAOYSA-N 3-morpholin-4-yl-1-oxa-3-azonia-2-azanidacyclopent-3-en-5-imine;hydrochloride Chemical compound Cl.[N-]1OC(=N)C=[N+]1N1CCOCC1 NCGICGYLBXGBGN-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Led Devices (AREA)
Abstract
The invention discloses a gallium nitride-based light emitting diode epitaxial wafer and a manufacturing method thereof, belonging to the technical field of semiconductors. The high-temperature-resistant high-power-consumption-factor-ratio-based multi-quantum-well-based high-temperature-resistant high-power-consumption-ratio high-voltage-ratio high-power-consumption-ratioxAnd x is more than 0 and less than 1, and the concentration of Si in the reflecting layer is gradually reduced from the side close to the low-temperature buffer layer to the side far away from the low-temperature buffer layer. SixThe refractive index of the N reflecting layer is gradually reduced along with the gradual reduction of the concentration of SixRefractive index of N reflective layerThe incidence direction of the light is gradually increased, the reflectivity is gradually increased, so that part of photons which run downwards and are generated by the multiple quantum well active layer are reflected, and the light reflected from the substrate enters the SixAnd when the reflective layer is N, the transmittance of the reflective layer is gradually increased, and the front light extraction of L ED is increased.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of gallium nitride based LED epitaxial slice and its manufacture
Method.
Background technology
LED (Light Emitting Diode, light emitting diode) is a kind of semiconductor electronic component that can be luminous.Its core
The chip that center portion point is made of P-type semiconductor and N-type semiconductor, there is a transition between P-type semiconductor and N-type semiconductor
Layer, is known as PN junction.In the PN junction of some semi-conducting materials, minority carrier and the majority carrier compound tense of injection can be more
Remaining energy discharges in the form of light, so that electric energy is converted directly into luminous energy.
Existing LED includes substrate and sets epitaxial layer on substrate, and epitaxial layer includes stacking gradually on substrate low
Warm cushion, high temperature buffer layer, N-type layer, active layer, electronic barrier layer and P-type layer.Wherein in N-type layer in electronics and P-type layer
Hole is in active layer recombination luminescence.
In the implementation of the present invention, inventor has found that the prior art has at least the following problems：
When visible ray is from a Medium Propagation to another medium, light can be refracted, and refraction angle is by following Si Nie
The ear law of refraction determines：n1sinθ1=n2sinθ2, wherein n1It is the refractive index of medium 1, n2It is the refractive index of medium 2, more than facing
Boundary angle θ=sin-1(n1/n2) the light of angle incidence cannot enter medium 2, but return to medium 1, this reflection is commonly referred to as
Total internal reflection, in this way, since the refractive index of GaN and the refractive index of air are very big, probably due to total internal reflection causes having
The light produced in active layer is understood some and is limited in LED chip, it is impossible to is coupled out, therefore can suppress LED chip
Light extraction.
The content of the invention
In order to solve the problems, such as that LED chip light extraction efficiency is low in the prior art, an embodiment of the present invention provides one kind to nitrogenize
Gallium based LED epitaxial slice and its manufacture method.The technical solution is as follows：
On the one hand, the present invention provides a kind of gallium nitride based LED epitaxial slice, two pole of gallium nitride base light emitting
Pipe epitaxial wafer includes substrate and stacks gradually low temperature buffer layer over the substrate, reflecting layer, high temperature buffer layer, N-type
Layer, shallow well layer, multiple quantum well active layer, low temperature P-type layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer,
The reflecting layer is SixN layers, 0 ＜ x ＜ 1, the concentration of Si is from close to the low temperature buffer layer in the reflecting layer
Side starts to the side away from the low temperature buffer layer gradually to reduce.
Alternatively, as 0 ＜ x ＜ 0.3, the thickness in the reflecting layer is 40-50nm.
Alternatively, as 0.3≤x≤0.5, the thickness in the reflecting layer is 20-40nm.
Alternatively, as 0.5 ＜ x ＜ 1, the thickness in the reflecting layer is 0-20nm.
On the other hand, the present invention provides a kind of manufacture method of gallium nitride based LED epitaxial slice, the manufacture
Method includes：
One substrate is provided；
Low temperature growth buffer layer, reflecting layer, high temperature buffer layer, N-type layer, shallow well layer, multiple quantum wells have successively on substrate
Active layer, low temperature P-type layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer, it is characterised in that the reflecting layer is SixN
Layer, 0 ＜ x ＜ 1, the concentration of Si is delayed since close to the side of the low temperature buffer layer to away from the low temperature in the reflecting layer
Rushing the side of layer gradually reduces
Alternatively, the growth pressure in the reflecting layer is 100-500torr, and growth temperature is 700-1100 DEG C.
Alternatively, the growth rotating speed in the reflecting layer is 50-300r/min.
Alternatively, as 0 ＜ x ＜ 0.3, the thickness in the reflecting layer is 40-50nm..
Alternatively, as 0.3≤x≤0.5, the thickness in the reflecting layer is 20-40nm.
Alternatively, as 0.5 ＜ x ＜ 1, the thickness in the reflecting layer is 0-20nm.
The beneficial effect that technical solution provided in an embodiment of the present invention is brought is：
By growing one layer of Si on the buffer layerxN reflecting layer, 0 ＜ x ＜ 1, SixThe concentration of Si is from close to low in N reflecting layer
The side of warm cushion starts to the side away from low temperature buffer layer gradually to reduce, due to SixThe refractive index in N reflecting layer is with Si
The reduction of doping and be gradually reduced, therefore SixTo close to low temperature buffer since the side away from low temperature buffer layer in N reflecting layer
The side of layer, refractive index gradually increases, and reflectivity gradually increases, so that running downwards of producing of multiple quantum well active layer
Partial photonic is reflected back, and adds the positive light extraction of LED, further, the downward fortune produced from multiple quantum well active layer
Capable most of photon is to that can be reflected back after substrate, due to delaying since close to the side of low temperature buffer layer to away from low temperature
Rush the side of layer, SixThe transmitance in N reflecting layer gradually increases, therefore, can be from Si by the partial photonic of substrate reflectionxN reflecting layer
Through further increasing the positive light extraction of LED.
Brief description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of structure diagram of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is a kind of flow of the preparation method of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention
Figure.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of gallium nitride based LED epitaxial slice, Fig. 1 is that the embodiment of the present invention provides
A kind of gallium nitride based LED epitaxial slice structure diagram, as shown in Figure 1, the gallium nitride based light emitting diode includes
Substrate 1 and stack gradually low temperature buffer layer 2 on substrate 1, reflecting layer 3, high temperature buffer layer 4, N-type layer 5, shallow well layer 6,
Multiple quantum well active layer 7, low temperature P-type layer 8, P-type electron barrier layer 9, high temperature P-type layer 10, p-type contact layer 11.
Wherein, reflecting layer 3 is SixN layers, 0 ＜ x ＜ 1, the concentration of Si is from close to the side of low temperature buffer layer 2 in reflecting layer 3
Start to the side away from low temperature buffer layer 2 gradually to reduce.
In the present embodiment by growing one layer of Si on the buffer layerxN reflecting layer, 0 ＜ x ＜ 1, SixSi in N reflecting layer
Concentration is gradually reduced since close to the side of low temperature buffer layer to the side away from low temperature buffer layer, due to SixN reflecting layer
Refractive index is gradually reduced with the reduction that Si is adulterated, therefore SixIn N reflecting layer since away from low temperature buffer layer side to
Close to the side of low temperature buffer layer, refractive index gradually increases, and reflectivity gradually increases, so that multiple quantum well active layer produces
The partial photonic run downwards be reflected back, the positive light extraction of LED is added, further, from multiple quantum well active layer
The most of photon run downwards produced is to that can be reflected back after substrate, due to since close to the side of low temperature buffer layer
To the side away from low temperature buffer layer, SixThe transmitance in N reflecting layer gradually increases, therefore, by the partial photonic meeting of substrate reflection
From SixN reflecting layer pass through, and further increase the positive light extraction of LED.
Further, when the concentration of the Si in reflecting layer 3 is higher, the reflectivity in reflecting layer 3 is higher, the thickness in reflecting layer 3
Spend smaller, can make it that the reflecting effect in reflecting layer 3 is more preferable.
Alternatively, as 0 ＜ x ＜ 0.3, the thickness in reflecting layer 3 is 40-50nm.
Alternatively, as 0.3≤x≤0.5, the thickness in reflecting layer 3 is 20-40nm.
Preferably, as 0.3≤x≤0.4, the thickness in reflecting layer is 25-26nm, and the positive light-out effect of LED is most at this time
It is good.
Alternatively, as 0.5 ＜ x ＜ 1, the thickness in reflecting layer 3 is 0-20nm.
In the present embodiment, substrate 1 can be Sapphire Substrate, and low temperature buffer layer 2 and high temperature buffer layer 4 can be not mix
Miscellaneous GaN layer, N-type layer 5 can be to mix N layers of the Ga of Si, and shallow well layer 6 can be the In of alternating growthxGa1-xN(0<x<0.1) gesture
Well layer and GaN barrier layers, multiple quantum well active layer 7 can be the In of alternating growthyGa1-yN(0.2<x<0.5) potential well layer and GaN
Barrier layer, low temperature P-type layer 8 can be that GaN layer, P-type electron barrier layer 9 can be that AlGaN layer, high temperature P-type layer 10 can be GaN
Layer, p-type contact layer 11 can be the PlnGaN layers of doping Mg/ln.
Embodiment two
An embodiment of the present invention provides a kind of manufacture method of gallium nitride based LED epitaxial slice, suitable for embodiment
A kind of one gallium nitride based LED epitaxial slice provided, Fig. 2 is a kind of gallium nitride base light emitting provided in an embodiment of the present invention
The flow chart of the preparation method of diode epitaxial slice, as shown in Fig. 2, the manufacture method includes：
Step 201, pre-process substrate.
Alternatively, substrate is sapphire, thickness 630-650um.
In the present embodiment, using Veeco K465i or C4MOCVD (Metal Organic Chemical Vapor
Deposition, metallo-organic compound chemical gaseous phase deposition) equipment realizes the growing method of LED.Using high-purity H2(hydrogen)
Or high-purity N2(nitrogen) or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As N sources, trimethyl gallium (TMGa)
And triethyl-gallium (TEGa) is used as gallium source, trimethyl indium (TMIn) is used as indium source, and silane (SiH4) is used as N type dopant, front three
Base aluminium (TMAl) is used as silicon source, two luxuriant magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is 100-600torr.
Specifically, which includes：
In a hydrogen atmosphere, high-temperature process substrate 5-20min.Wherein, reaction chamber temperature is 1000-1200 DEG C, reative cell
Pressure is controlled in 200-500torr, and nitrogen treatment is carried out to substrate.
Step 202, on substrate low temperature growth buffer layer.
Specifically, after the completion of Sapphire Substrate high-temperature process, reaction chamber temperature is dropped to 500-650 DEG C, growing low temperature
Cushion.
In the present embodiment, low temperature buffer layer is the GaN layer to undope, thickness 2-8um.Then raise the temperature to
1000-1100 DEG C, anneal 3-10min, and chamber pressure is controlled in 50-200torr, growth course, group-v element and three races
The molar ratio of element is 50-300, and growth rotating speed is 200-600r/min.
Step 203, grow reflecting layer on low temperature buffer layer.
Specifically, after low temperature buffer layer is grown, reaction chamber temperature is adjusted to 700-1100 DEG C, growth reflection
Layer.
In the present embodiment, reflecting layer SixN layers, 0 ＜ x ＜ 0.3, thickness 40-50nm, the concentration of Si in reflecting layer
Gradually reduced to the side away from low temperature buffer layer since close to the side of low temperature buffer layer.When growing reflecting layer, reative cell
Pressure is controlled in 100-500torr, growth course, and growth rotating speed is 50-300r/min.
In the present embodiment by growing one layer of Si on the buffer layerxN reflecting layer, 0 ＜ x ＜ 1, SixSi in N reflecting layer
Concentration is gradually reduced since close to the side of low temperature buffer layer to the side away from low temperature buffer layer, due to SixN reflecting layer
Refractive index is gradually reduced with the reduction that Si is adulterated, therefore SixIn N reflecting layer since away from low temperature buffer layer side to
Close to the side of low temperature buffer layer, refractive index gradually increases, and reflectivity gradually increases, so that multiple quantum well active layer produces
The partial photonic run downwards be reflected back, the positive light extraction of LED is added, further, from multiple quantum well active layer
The most of photon run downwards produced is to that can be reflected back after substrate, due to since close to the side of low temperature buffer layer
To the side away from low temperature buffer layer, SixThe transmitance in N reflecting layer gradually increases, therefore, by the partial photonic meeting of substrate reflection
From SixN reflecting layer pass through, and further increase the positive light extraction of LED.
Step 204, grow high temperature buffer layer on reflecting layer.
In the present embodiment, high temperature buffer layer is the GaN layer to undope, thickness 1-2um.When growing high temperature buffer layer,
Reaction chamber temperature is 1000-1200 DEG C, and chamber pressure is controlled in 100-500torr, growth course, group-v element and three races
The molar ratio of element is 200-3000.
Step 205, grow N-type layer on high temperature buffer layer.
In the present embodiment, N-type layer is to mix the GaN layer of Si, thickness 1.5-3.5um.When growing N-type layer, room temperature is reacted
Spend for 950-1150 DEG C, chamber pressure is controlled in 100-400torr, growth course, and group-v element and group iii elements are rubbed
Your ratio is 400-5000.
Step 206, grow shallow well layer in N-type layer.
In the present embodiment, it is successively overlapping by In to include 5-20 for shallow well layerxGa1-xN(0<x<0.1) potential well layer and GaN
The quantum well structure that barrier layer is grown successively, wherein, InxGa1-xThe growth temperature of N potential well layers is 750-850 DEG C, growth
Pressure is 100-500Torr, thickness 1-4nm, and in growth course, the molar ratio of group-v element and group iii elements is 500-
10000.The growth temperature of GaN barrier layers is 850-950 DEG C, growth pressure 100-500Torr, thickness 10-30nm, growth
During, the molar ratio of group-v element and group iii elements is 500-10000.
Step 207, grow multiple quantum well active layer on shallow well layer.
Multiple quantum well active layer can include the In of 6-15 alternating growthyGa1-yN(0.2<x<0.5) potential well layer and GaN
Barrier layer.Wherein, InyGa1-yThe growth temperature of N potential well layers is 700-850 DEG C, growth pressure 100-500Torr, and thickness is
2-5nm, in growth course, the molar ratio of group-v element and group iii elements is 2000-20000, and the growth temperature of GaN barrier layers is
850-950 DEG C, growth pressure 100-500Torr, thickness 5-15nm, in growth course, group-v element and group iii elements
Molar ratio is 2000-20000.
Step 208, the growing low temperature P-type layer in multiple quantum well active layer.
Alternatively, low temperature P-type layer is GaN layer, and growth temperature is 700-800 DEG C, growth pressure 100-600Torr, raw
It is for a long time 3-15min, growth thickness 30-120nm, in growth course, the molar ratio of group-v element and group iii elements is
1000-4000。
Step 209, the growing P-type electronic barrier layer in low temperature P-type layer.
Alternatively, P-type electron barrier layer is AlGaN layer, and growth temperature is 900-1000 DEG C, growth pressure 50-
300Torr, growth time 4-15min, thickness 50-150nm, in growth course, mole of group-v element and group iii elements
Than for 1000-10000.
Step 210, grow high temperature P-type layer in P-type electron barrier layer.
Alternatively, high temperature P-type layer is GaN layer, and growth temperature is 900-1050 DEG C, growth pressure 100-500Torr, raw
It is for a long time 10-20min, thickness 50-150nm, in growth course, the molar ratio of group-v element and group iii elements is 500-
4000。
Step 211, the growing P-type contact layer in high temperature P-type layer.
Alternatively, p-type contact layer is the PlnGaN layers of doping Mg/ln, and growth temperature is 700-850 DEG C, and growth pressure is
100-500Torr, growth time 0.5-5min, thickness 3-10nm, in growth course, group-v element and group iii elements are rubbed
Your ratio is 10000-20000.
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
Single 9*27mil chip is made in subsequent machining technology.
Embodiment three
An embodiment of the present invention provides a kind of manufacture method of gallium nitride based LED epitaxial slice, in the present embodiment
In, reflecting layer SixN layers, 0.3≤x≤0.5, thickness 20-40nm, the concentration of Si is from close to low temperature buffer layer in reflecting layer
Side start to away from the side of low temperature buffer layer gradually to reduce.When growing reflecting layer, chamber pressure is controlled in 100-
500torr, in growth course, growth rotating speed is 50-300r/min.
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
Single 9*27mil chip is made in subsequent machining technology.
Found after LED core built-in testing, LED chip provided in an embodiment of the present invention and the LED provided in embodiment two
Chip is compared, and the front amount of light of LED chip improves 3% than embodiment two.
Example IV
An embodiment of the present invention provides a kind of manufacture method of gallium nitride based LED epitaxial slice, in the present embodiment
In, reflecting layer SixN layers, 0.5 ＜ x ＜ 1, thickness 0-20nm, the concentration of Si is from close to the one of low temperature buffer layer in reflecting layer
Side starts to the side away from low temperature buffer layer gradually to reduce.When growing reflecting layer, chamber pressure is controlled in 100-
500torr, in growth course, growth rotating speed is 50-300r/min.
After the growth of gallium nitride based LED epitaxial slice is terminated, the temperature of reative cell is down to 600-900 DEG C,
In PN2Atmosphere carries out annealing 10-30min, is then gradually decreased to room temperature, then, through over cleaning, deposition, photoetching and etching
Single 9*27mil chip is made in subsequent machining technology.
Found after LED core built-in testing, LED chip provided in an embodiment of the present invention and the LED provided in embodiment three
The front amount of light of chip is suitable.
The foregoing is merely a prefered embodiment of the invention, is not intended to limit the invention, all in the spirit and principles in the present invention
Within, any modification, equivalent replacement, improvement and so on, should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of gallium nitride based LED epitaxial slice, the gallium nitride based LED epitaxial slice include substrate and
It is active to stack gradually low temperature buffer layer over the substrate, reflecting layer, high temperature buffer layer, N-type layer, shallow well layer, multiple quantum wells
Layer, low temperature P-type layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer, it is characterised in that
The reflecting layer is SixN layers, 0 ＜ x ＜ 1, the concentration of Si is from close to the side of the low temperature buffer layer in the reflecting layer
Start to the side away from the low temperature buffer layer gradually to reduce.
2. gallium nitride based LED epitaxial slice according to claim 1, it is characterised in that as 0 ＜ x ＜ 0.3, institute
The thickness for stating reflecting layer is 40-50nm.
3. gallium nitride based LED epitaxial slice according to claim 1, it is characterised in that as 0.3≤x≤0.5,
The thickness in the reflecting layer is 20-40nm.
4. gallium nitride based LED epitaxial slice according to claim 1, it is characterised in that as 0.5 ＜ x ＜ 1, institute
The thickness for stating reflecting layer is 0-20nm.
5. a kind of manufacture method of gallium nitride based LED epitaxial slice, it is characterised in that the manufacture method includes：
One substrate is provided；
On substrate successively low temperature growth buffer layer, reflecting layer, high temperature buffer layer, N-type layer, shallow well layer, multiple quantum well active layer,
Low temperature P-type layer, P-type electron barrier layer, high temperature P-type layer, p-type contact layer, it is characterised in that the reflecting layer is SixN layers, 0 ＜
X ＜ 1, in the reflecting layer concentration of Si since close to the side of the low temperature buffer layer to away from the low temperature buffer layer
Side gradually reduces.
6. manufacture method according to claim 5, it is characterised in that the growth pressure in the reflecting layer is 100-
500torr, growth temperature are 700-1100 DEG C.
7. the manufacture method according to claim 5 or 6, it is characterised in that the growth rotating speed in the reflecting layer is 50-
300r/min。
8. the manufacture method according to claim 5 or 6, it is characterised in that as 0 ＜ x ＜ 0.3, the thickness in the reflecting layer
Spend for 40-50nm.
9. the manufacture method according to claim 5 or 6, it is characterised in that as 0.3≤x≤0.5, the reflecting layer
Thickness is 20-40nm.
10. the manufacture method according to claim 5 or 6, it is characterised in that as 0.5 ＜ x ＜ 1, the thickness in the reflecting layer
Spend for 0-20nm.
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| CN109671828A (en) * | 2018-11-30 | 2019-04-23 | 华灿光电（浙江）有限公司 | A kind of LED epitaxial slice and preparation method thereof |
| CN114583026A (en) * | 2022-05-05 | 2022-06-03 | 徐州立羽高科技有限责任公司 | Novel semiconductor deep ultraviolet light source structure |
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