CN107799451B - 半导体加工中控制曲度以控制叠对的位置特定的应力调节 - Google Patents
半导体加工中控制曲度以控制叠对的位置特定的应力调节 Download PDFInfo
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- CN107799451B CN107799451B CN201710791991.3A CN201710791991A CN107799451B CN 107799451 B CN107799451 B CN 107799451B CN 201710791991 A CN201710791991 A CN 201710791991A CN 107799451 B CN107799451 B CN 107799451B
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- H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/70525—Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
- G03F7/70783—Handling stress or warp of chucks, masks or workpieces, e.g. to compensate for imaging errors or considerations related to warpage of masks or workpieces due to their own weight
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
- G06F30/23—Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0431—Apparatus for thermal treatment
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- H10P72/04—Apparatus for manufacture or treatment
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- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
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- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
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- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
- H10P72/0616—Monitoring of warpages, curvatures, damages, defects or the like
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- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
- H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
- H10P72/7614—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
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- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
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- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
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- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
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- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
- H10P76/2041—Photolithographic processes
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Toxicology (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Length Measuring Devices With Unspecified Measuring Means (AREA)
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662383549P | 2016-09-05 | 2016-09-05 | |
| US62/383,549 | 2016-09-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107799451A CN107799451A (zh) | 2018-03-13 |
| CN107799451B true CN107799451B (zh) | 2023-05-02 |
Family
ID=61280932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710791991.3A Active CN107799451B (zh) | 2016-09-05 | 2017-09-05 | 半导体加工中控制曲度以控制叠对的位置特定的应力调节 |
Country Status (5)
| Country | Link |
|---|---|
| US (5) | US10453692B2 (https=) |
| JP (2) | JP7164289B2 (https=) |
| KR (1) | KR102467979B1 (https=) |
| CN (1) | CN107799451B (https=) |
| TW (3) | TWI888250B (https=) |
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| JP7164289B2 (ja) | 2016-09-05 | 2022-11-01 | 東京エレクトロン株式会社 | 半導体プロセッシング中のオーバレイを制御するための湾曲を制御する応力の位置特定チューニング |
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Also Published As
| Publication number | Publication date |
|---|---|
| US10475657B2 (en) | 2019-11-12 |
| JP2018041080A (ja) | 2018-03-15 |
| US10453692B2 (en) | 2019-10-22 |
| TWI888250B (zh) | 2025-06-21 |
| US10157747B2 (en) | 2018-12-18 |
| CN107799451A (zh) | 2018-03-13 |
| TWI887546B (zh) | 2025-06-21 |
| US20180068860A1 (en) | 2018-03-08 |
| US20180068861A1 (en) | 2018-03-08 |
| JP7164289B2 (ja) | 2022-11-01 |
| TWI776817B (zh) | 2022-09-11 |
| US10811265B2 (en) | 2020-10-20 |
| US20200058509A1 (en) | 2020-02-20 |
| TW202234176A (zh) | 2022-09-01 |
| KR20180027382A (ko) | 2018-03-14 |
| TW201826036A (zh) | 2018-07-16 |
| US20180068859A1 (en) | 2018-03-08 |
| TW202449526A (zh) | 2024-12-16 |
| JP2022000917A (ja) | 2022-01-04 |
| US10431468B2 (en) | 2019-10-01 |
| KR102467979B1 (ko) | 2022-11-16 |
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| JP7216785B2 (ja) | 2023-02-01 |
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