CN107785239A - 半导体结构的形成方法 - Google Patents

半导体结构的形成方法 Download PDF

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Publication number
CN107785239A
CN107785239A CN201710188348.1A CN201710188348A CN107785239A CN 107785239 A CN107785239 A CN 107785239A CN 201710188348 A CN201710188348 A CN 201710188348A CN 107785239 A CN107785239 A CN 107785239A
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Prior art keywords
chip
layer
chip carrier
nitrogen
end interface
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CN201710188348.1A
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Inventor
刘奕莹
林钰庭
聂君文
陈威宇
王喻生
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN107785239A publication Critical patent/CN107785239A/zh
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Abstract

半导体结构的形成方法包括：将晶片置入晶片载具；将晶片载具置于沉积工具的装载埠上；将晶片载具连接至沉积工具的前端界面单元；以氮气净化前端界面单元；以及在沉积工具中沉积金属层于晶片上。

Description

半导体结构的形成方法
技术领域
本公开实施例涉及半导体结构的形成方法，更特别涉及以氮气净化晶片载具及/或沉积工具的前端界面单元的方法。
背景技术
集成电路材料与设计的技术进展，使每一代的集成电路比前一代的集成电路具有更小且更复杂的电路。在集成电路演进中，随着几何尺寸(工艺所能形成的最小构件或线路)缩小，功能密度(单位芯片面积中的内连线装置数目)通常随之增加。工艺尺寸缩小，通常有利于增加产能并降低相关成本。
这些尺寸缩小亦增加集成电路工艺的复杂性。为了使上述进展得以实施，集成电路工艺需要类似发展。举例来说，晶体管尺寸缩小时亦增加晶体管构件的电阻值，这将劣化晶体管效能。
发明内容
本公开一实施例提供的半导体结构的形成方法，包括：将晶片置入晶片载具；将晶片载具置于沉积工具的装载埠上；将晶片载具连接至沉积工具的前端界面单元；以氮气净化前端界面单元；以及在沉积工具中沉积金属层于晶片上。
附图说明
图1至图8是一些实施例中，晶体管于工艺的中间阶段的剖视图。
图9是一些实施例中，晶片载具的剖视图。
图10是一些实施例中，沉积工具的剖视图。
图11是一些实施例中，沉积工具其装载埠上的晶片载具的剖视图。
图12是一些实施例中，形成晶体管的工艺流程图。
附图标记说明：
10 晶片
11-11 剖线
12 第二预清洁腔室
20 基板
22 源极/漏极区
24、60 层间介电层
26 浅沟槽隔离
28 接点蚀刻停止层
30 栅极间隔物
32 蚀刻停止层
36 栅极介电层
38 栅极
40 栅极堆叠
42 牺牲层间介电层
44 开口
46 晶片载具
48 门
50 钛层
52 氮化钛层
54 硅化物区
56 导电材料
58 接点插塞
62 栅极接点插塞
62A、64A 阻挡层
62B、64B 含铜区
64 源极/漏极接点插塞
100 沉积工具
102 装载埠
104 前端界面单元
106、114A、114B 通行腔室
108 缓冲腔室
110 脱气腔室
112 清洁腔室
116 传输腔室
118 SiCoNiTM腔室
120、122 腔室
130 入口
132 氮气
134 氮气注入机
136 出口
138 泵
150 环境
152 真空主体
200 工艺流程
202、204、206、208、210、212、214、216、218、220、222 步骤
具体实施方式
下述内容提供的不同实施例或实例可实施本公开实施例的不同结构。特定构件与排列的实施例是用以简化本公开而非局限本公开。举例来说，形成第一结构于第二结构上的叙述包含两者直接接触，或两者的间隔有其他额外结构而非直接接触。此外，本公开实施例的多种例子可重复标号及/或符号，但这些重复仅用以简化及清楚说明，而非多种实施例及/或设置之间具有相同标号的单元之间具有相同的对应关系。
此外，空间性的相对用语如「下方」、「其下」、「较下方」、「上方」、「较上方」、或类似用语可用于简化说明某一元件与另一元件在图示中的相对关系。空间性的相对用语可延伸至以其他方向使用的元件，而非局限于图示方向。元件亦可转动90°或其他角度，因此方向性用语仅用以说明图示中的方向。
多种例示性的实施例提供晶体管工艺与对应的金属沉积工艺。一些实施例是钛层与氮化钛层的沉积的中间阶段。下述内容为一些实施例的一些变化。在多种附图与例示性实施例中，类似标号将用以标示类似单元。
图1至图8是一些实施例中，晶体管于工艺的中间阶段的剖视图。图1至图8中的步骤亦图示于图12中的工艺流程中。
如图1所示，提供晶片10，其上形成有初始结构。晶片10包含基板20，其组成可为半导体材料如硅、硅锗、碳化硅、III-V族半导体化合物材料、或类似物。基板20可为基体基板或绝缘层上半导体基板。层间介电层24形成于基板20上。层间介电层24的组成可为氧化物如磷硅酸盐玻璃、硼硅酸盐玻璃、掺杂硼的磷硅酸盐玻璃、四乙氧硅烷氧化物、或其他低介电常数非孔洞状的介电材料。举例来说，层间介电层24的形成方法可择自化学气相沉积、可流动的化学气相沉积、旋转涂布、或类似方法。浅沟槽隔离区26延伸至半导体的基板20中，使基板20中的主动区彼此隔离。
栅极堆叠40形成于半导体的基板20上，且栅极间隔物30形成于栅极堆叠40的侧壁上。在本公开一些实施例中，栅极堆叠40包含栅极介电层36，与栅极介电层36上的栅极38。在本公开一些实施例中，栅极堆叠40为置换的栅极堆叠，其形成方法为虚置栅极(未图示)、在形成层间介电24后移除虚置栅极以形成凹陷、以及形成置换的栅极堆叠40于凹陷中。栅极介电层36可为单层或含有多层的复合层。举例说，栅极介电层36可包含界面氧化物层，以及氧化物层上的高介电常数介电层。界面氧化物层可为氧化硅层，其形成方法可为热氧化、化学氧化、或沉积。高介电常数介电层的介电常数值可大于约7，高至约20、或更高。例示性的高介电常数介电材料包含氧化铪、氧化锆、氧化镧、或类似物。
栅极38亦可具有均质的导电材料组成的单层结构，或具有多个导电层的复合结构。在本公开一些实施例中，栅极38包含第一层(由TiN组成)、第二层(功函数层，由TaSiN、WN、TiAl、TiAlN、TaC、及/或类似物)、以及第三层(填充层，包含铝)。栅极38的形成方法可包含物理气相沉积、有机金属化学气相沉积、及/或其他可行方法，端视栅极38的材料而定。
在其他实施例中，栅极堆叠40不是置换栅极，其形成方法可为形成平坦的栅极介电层、形成平坦的栅极层于栅极介电层上、以及图案化栅极介电层与栅极层以保留栅极堆叠40。在本公开一些实施例中，栅极介电层36的组成可为氧化硅、氮化硅、高介电常数的介电材料、或类似物。举例来说，栅极38的组成可为多晶硅。
源极/漏极区22延伸至半导体的基板20中。在本公开一些实施例中，源极/漏极区22的形成方法为注入p型或n型杂质至基板20中。在本公开其他实施例中，源极/漏极区22的形成方法为蚀刻基板20以形成凹陷，以及再成长半导体材料于凹陷中以形成外延的源极/漏极区22。源极/漏极区22的组成可为硅、硅锗、磷化硅、碳化硅、或类似物。接点蚀刻停止层28覆盖源极/漏极区22，且可延伸于栅极间隔物30的侧壁上。在本公开一些实施例中，接点蚀刻停止层28的组成可为氮化硅、碳化硅、或其他半导体材料。
栅极堆叠40的上表面与层间介电层24的上表面共平面，此共平面结构的形成方法可为化学机械研磨。如图2所示，蚀刻停止层32形成于层间介电层24与栅极堆叠40的上表面上。此步骤即图12中的工艺流程200的步骤202。在本公开一些实施例中，蚀刻停止层32的组成为介电材料如碳化硅、氮化硅、氮氧化硅、或类似物。在一些实施例中，牺牲层间介电层42亦可形成于蚀刻停止层32上。牺牲层间介电层42可包含四乙氧硅烷或其他介电材料。在本公开其他实施例中，未形成蚀刻停止层32与牺牲层间介电层42。在本公开其他实施例中，可形成蚀刻停止层32，但未形成牺牲层间介电层42。
接着蚀刻牺牲层间介电层42(若存在)、蚀刻停止层32、层间介电层24、与接点蚀刻停止层28，以形成开口44露出源极/漏极区22。此步骤即图12中的工艺流程200的步骤204。在形成开口44后，进行预清洁步骤以清洁源极/漏极区22其露出的表面，以移除源极/漏极区22其露出的表面上形成的原生氧化物。此步骤即图12中的工艺流程200的步骤206。在预清洁步骤后，以去离子水冲洗晶片10后干燥。
接着将晶片10置于晶片载具46中，如图9所示。此步骤即图12中的工艺流程200的步骤208。晶片载具46可为前开式晶片传送盒或卡匣，其设置以同时储存多个晶片。多个晶片10置于晶片载具46中，其可传输至沉积工具以进行后续的金属沉积工艺。此步骤即图12中的工艺流程200的步骤208。在将晶片10置入晶片载具46中之后，关闭晶片载具46的门48。在本公开一些实施例中，在将晶片载具46传输至沉积工具的过程中，晶片载具46充填大气，其可为一大气压的干净气体。在本公开其他实施例中，以氮气净化晶片载具46，其实质上不含氧气与湿气(举例来说，氧气与湿气小于1体积％，小于0.1体积％、小于0.01体积％、或小于0.001体积％、或更低)。在将晶片载具46传输至沉积工具时，晶片载具46亦可充填氮气。
图10是本公开一些实施例中的沉积工具100。应理解的是，图10中的沉积工具100仅用以举例，而具有不同设计的沉积工具亦属本公开实施例的范畴。沉积工具100包含一或多个装载埠102，其用以载入/支撑晶片载具46(见图9)，使晶片载具46中的晶片得以传输至沉积工具100中以进行后续工艺。装载埠102连接至前端界面单元104，其可提供小规模的环境如清洁的空间，使露出的晶片/及或晶片卡匣可传输至工艺工具100的真空主体152中，或自真空主体152传输出来。以氮气净化前端界面单元104，使晶片暴露至湿气与氧气的程度最小化。
在本公开一些实施例中，沉积工具100的整体位于环境150中，且可采用氮气净化沉积工具100。在其他实施例中，真空主体152包含多个真空腔室且位于开放大气(或干燥的清洁气体，其已除湿以移除湿气并清洁以移除粒子)中，而装载埠102位于经氮气净化的环境150中。在其他实施例中，整体的沉积工具100包含真空主体152、前端界面单元104、与装载埠102位于环境中，其充填有干燥的清洁气体。
真空主体152包含通行腔室106，其可让晶片通过。通行腔室106具有门，以与前端界面单元104分隔，使通行腔室106得以抽真空。缓冲腔室108用以在腔室之间传输晶片。在本公开一些实施例中，缓冲腔室108连接至预清洁腔室如脱气腔室110、清洁腔室112、SiCoNiTM腔室118、与通行腔室114A及114B。传输腔室116设置以在腔室之间传输晶片，其连接至通行腔室114A与114B、用于沉积氮化钛的腔室120、以及用于沉积钛的腔室122。
自预清洁的站点传输出的晶片载具46，置于支撑晶片载具46的装载埠102之一上。晶片载具46连接至前端界面单元104，如图10所示。此步骤即图12中的工艺流程200的步骤210。图11是沉积工具100的剖视图，其为沿着图10的上视图中剖线11-11的剖视图。开启晶片载具46的门48(见图9)，使晶片载具46中的内部空间与前端界面单元104中的内部空间相接成连续的空间。
前端界面单元104具有入口130与出口136，分别用以吸气(氮气)与抽气(氮气)。在本公开一些实施例中，氮气注入机134可将氮气注入前端界面单元104，以净化前端界面单元104。此步骤即图12中的工艺流程200的步骤212。在下述内容中，用于净化前端界面单元104、环境150(见图10)、与晶片载具46的氮气，包含纯氮或实质上纯氮(例如氮的体积％大于99％或更高)。此外，氮气不具有湿气与氧气(例如湿气与氧气分别小于1体积％或0.1体积％)。
自出口136抽出前端界面单元104中的氮气，包含位于前端界面单元104的底部或任何其他位置的氮气。泵138连接至出口136，以移除前端界面单元104中的气体(包含氮气)。在本公开一些实施例中，以氮气净化前端界面单元104的工艺为连续工艺。在将晶片载具46置于装载埠102上之前、在对晶片载具46中的晶片10进行工艺之间、以及将晶片载具46传输离开之后，均可进行上述氮气净化工艺。由于将氮气连续地注入前端界面单元104，并将氮气抽出前端界面单元104，前端界面单元104中的氮气压力接近、高于、或低于一大气压，端视注入与抽出氮气的速率而定。
氮气132可吹向或导至晶片载具46，如氮气注入机134(实线部分)所示。上述氮气132的方向可改善驱出晶片载具46中的气体或湿气的效率，并将原本位于晶片载具46中的气体置换为注入的氮气。在其他实施例中，氮气132吹入前端界面单元104，而非导向晶片载具46。
由于氮气净化，前端界面单元104与晶片载具46中的湿气与氧气浓度明显降低。举例来说，环境大气的湿气浓度可大于约10000ppm。通过氮气净化，施气可降低至低于约1500ppm。此外，前端界面单元104与晶片载具46中的湿度可降低至低于30％。湿度可进一步降低至低于约10％或低于约5％，端视净化时间而定。净化时间越长，则湿度越低。
接着自晶片载具46接收晶片10，并将其传输通过前端界面单元104与通行腔室106(见图10)。晶片10通过缓冲腔室108，并进入第一预清洁腔室(可为脱气腔室110)。举例来说，可将脱气腔室110中的晶片10加热到约200℃至约400℃之间，使不利于吸收在晶片10中的气体(如氧气与湿气)可自晶片10脱气。
在本公开一些实施例中，将晶片10送至第二预清洁腔室12(可为PCXT腔室)，其采用氩气轰击移除位于开口44的底部的多余氧化物(见图4)。
接着将晶片10传输通过通行腔室114A与传输腔室116后，传输至第三预清洁腔室(如SiCoNiTM腔室118)。在一些例示性的实施例中，第三预清洁腔室为蚀刻氧化物(如图3中源极/漏极区22上的原生氧化物)的蚀刻腔室。上述蚀刻可采用SiCoNiTM，其包含HF3与NH3的混合气体。
在后续步骤中，将晶片10传输至腔室122，以沉积金属层于晶片10上。此步骤即图12中的工艺流程200的步骤214。在本公开一些实施例中，金属层为钛层50，如图3所示。举例来说，沉积工艺可为物理气相沉积。接着将晶片10传输至腔室120(见图9)，以沉积氮化钛层52于钛层50上，如图3所示。在沉积工艺后，将晶片10传输回传输腔室116，接着将晶片10传输通过通行腔室114B、缓冲腔室108、与通行腔室106之后，再将晶片10传输至前端界面单元104中。接着自前端界面单元104将晶片10置回图11所示的晶片载具46。
晶片载具46可容纳多个晶片10，以对晶片依序进行工艺(如沉积金属层)。单一晶片的金属沉积工艺可耗时几十分钟。综上所述，对第一片晶片10进行工艺到对最后一片晶片10进行工艺，需耗时几十分钟至数小时。在等待的时间中，晶片载具46中的晶片将暴露于前端界面单元104与晶片载具46中的气体。若前端界面单元104充填环境气体(即使是干净的气体)，湿气与氧气的吸收量将无法忽略。此外，若沉积的钛层50与氮化钛层52(见图3)暴露至氧气与湿气，其亦吸收氧气与湿气。吸收于晶片10中的氧气与湿气会与后续形成的金属硅化物区反应，这将增加接点电阻并降低良率。实验结果证实，当晶片10暴露至环境气体时(公知前端界面单元中的气体)，源极/漏极接点电阻将随着暴露时间增加而明显升高。在本公开实施例中，通过净化前端界面单元104，可隔离晶片10与氧气(及湿气)。综上所述，可避免增加源极/漏极接点电阻，并避免对应的良率损失。
回到图3，沉积的钛层50与氮化钛层52延伸至开口44中，而开口44中的钛层50其底部接触露出的源极/漏极区22。在本公开一些实施例中，除了沉积含钛层外，亦可沉积其他金属如镍或钴以形成硅化物区。如此一来，前述沉积的氮化钛层亦可置换为其他金属氮化物层，比如氮化钽层。
接着如图4所示，进行自对准硅化步骤，以形成硅化物区54于开口44的底部。此步骤即图12中的工艺流程200的步骤216。在自对准硅化工艺中，可进行回火使金属层(如钛层50)与源极/漏极区22反应，以形成源极/漏极的硅化物区54于保留的源极/漏极区22的上表面。硅化工艺可完全消耗钛层50的底部部分，使硅化工艺后的硅化物区54其上表面接触氮化钛层52的下表面。
如图5所示，导电材料56(可包含金属、金属合金、多层的复合金属化层、或类似物)填入剩余的开口44(见图4)中。此步骤即图12中的工艺流程200的步骤218。在本公开一些实施例中，导电材料56的组成为钨。接着进行化学机械研磨以移除多余的导电材料及牺牲层42。此步骤即图12中的工艺流程200的步骤220。上述工艺形成的结构如图6所示。在化学机械研磨时，蚀刻停止层32作为化学机械研磨的蚀刻停止层。保留的导电材料即形成接点插塞58。
如图7所示，另一层间介电层60形成于蚀刻停止层32上。层间介电层60的组成可为磷硅酸盐玻璃、硼硅酸盐玻璃、硼磷硅酸盐玻璃、四乙氧硅烷氧化物、或类似物。接着如图8所示，形成栅极接点插塞62与源极/漏极接点插塞64。此步骤即图12中的工艺流程200的步骤222。栅极接点插塞62与源极/漏极接点插塞64可同时形成，或者分别形成于不同步骤中。源极/漏极接点插塞64亦可称作较上的源极/漏极接点插塞。源极/漏极接点插塞64对准或接触接点插塞58(又称作较下的源极/漏极接点插塞)。栅极接点插塞62电性耦接至栅极38。每一栅极接点插塞62与源极/漏极接点插塞64可包含阻挡层62A或64A，以及含铜区62B或64B。上述层状的形成工艺可包含蚀刻层间介电层60以形成开口，以及将阻挡层与含铜层填入开口中。在本公开一些实施例中，阻挡层62A与64A可为钛层、氮化钛层、钽层、氮化钽层、或上述的多层结构。接着可进行化学机械研磨以移除多余部分的阻挡层与含铜层。保留的部分阻挡层形成阻挡层62A与64A，而保留的部分含铜层形成含铜层62B与64B。
本公开实施例具有一些优点。在公知金属沉积工艺中，在以晶片载具传输晶片之中与之后，晶片均可能暴露至氧气与湿气。此外，在以工艺工具对晶片进行工艺(如沉积金属层)时，晶片可能暴露至环境大气一段长时间。晶片会吸收氧气与湿气。在形成硅化物区之前或之后，会释放这些吸收的氧气与湿气，造成硅化物区氧化而增加接点电阻。在本公开实施例中，通过净化前端界面单元与晶片载具，可大幅降低晶片对氧气与湿气的暴露值，进而降低接点电阻及增加良率。
在本公开一些实施例中，方法包括：将晶片置入晶片载具；将晶片载具置于沉积工具的装载埠上；将晶片载具连接至沉积工具的前端界面单元；以氮气净化前端界面单元；以及在沉积工具中沉积金属层于晶片上。
在一些实施例中，上述方法的沉积金属层的步骤包括沉积钛层。
在一些实施例中，上述方法在净化步骤时，晶片载具的内部空间与前端界面单元的内部空间相连。
在一些实施例中，上述方法的净化步骤将氮气直接吹向晶片载具。
在一些实施例中，上述方法的晶片载具包含多个晶片，且在沉积工具中依序沉积金属层于晶片上，其中沉积金属层于每一晶片上的过程中，均以氮气连续地净化前端界面单元。
在一些实施例中，上述方法在将晶片载具置于装载埠上之前，即开始净化步骤。
在一些实施例中，上述方法还包括形成源极/漏极区于晶片中，其中金属层接触源极/漏极区。
在一些实施例中，上述方法还包括回火晶片，其中金属层与源极/漏极区反应以形成源极/漏极硅化物区。
在本公开一些实施例中，方法包括：形成源极/漏极区于晶片上；在晶片上以稀氢氟酸溶液进行清洁；将清洁后的晶片置入晶片载具；将晶片载具传输至沉积工具的装载埠上；连接晶片载具的内部空间至沉积工具其前端界面单元的内部空间；以氮气连续地净化前端界面单元；以及在沉积工具中沉积金属层于晶片上。
在一些实施例中，上述方法还包括在沉积工具中沉积金属氮化物层于金属层上。
在一些实施例中，上述方法还包括自装载埠移开晶片载具，其中在晶片置于装载埠上的过程中，连续地净化前端界面单元。
在一些实施例中，上述方法的晶片载具包含多个晶片于其中，且在沉积工具中依序沉积金属层于晶片上，其中沉积金属层于每一晶片上的过程中，均以氮气连续地净化前端界面单元。
在一些实施例中，上述方法的净化的前端界面单元其湿气浓度降低至低于约1500ppm。
在一些实施例中，上述方法还包括以氮气净化晶片载具。
在本公开一些实施例中，方法包括：以工艺气体净化沉积工具的前端界面单元。工艺气体包含氮气，且实质上不含氧气与湿气。此方法亦包括在净化开始后，将晶片载具置于沉积工具的装载埠上；将晶片载具中的第一内部空间连接至沉积工具其前端界面单元中的第二内部空间；将晶片载具中的第一晶片经由前端界面单元传输至沉积工具的真空主体中；沉积金属层于第一晶片上；以及将第一晶片置回晶片载具中。
在一些实施例中，上述方法更包含沉积额外金属层于晶片载具中的第二晶片，其中在在沉积金属层及额外金属层于第一晶片与第二晶片的过程中，均以氮气连续地净化晶片载具。
在一些实施例中，上述方法的净化的前端界面单元的湿气浓度降低至低于约1500ppm。
在一些实施例中，上述方法还包括在第一晶片上进行预清洁；以及将第一晶片置入晶片载具。
在一些实施例中，上述方法还包括将晶片载具移开沉积工具，且在晶片载具离开沉积工具后仍持续地净化前端界面单元。
在一些实施例中，上述方法的工艺气体包含实质上纯氮气。
上述实施例的特征有利于本领域技术人员理解本公开实施例。本领域技术人员应理解可采用本公开实施例作基础，设计并变化其他工艺与结构以完成上述实施例的相同目的及/或相同优点。本领域技术人员亦应理解，这些等效置换并未脱离本公开实施例的精神与范畴，并可在未脱离本公开实施例的精神与范畴的前提下进行改变、替换、或更动。

Claims (1)

1.一种半导体结构的形成方法，包括：
将一晶片置入一晶片载具；
将该晶片载具置于一沉积工具的一装载埠上；
将该晶片载具连接至该沉积工具的一前端界面单元；
以氮气净化该前端界面单元；以及
在该沉积工具中沉积一金属层于该晶片上。
CN201710188348.1A 2016-08-24 2017-03-27 半导体结构的形成方法 Pending CN107785239A (zh)

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