CN107743652A - 多层封装 - Google Patents

多层封装 Download PDF

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Publication number
CN107743652A
CN107743652A CN201580081135.8A CN201580081135A CN107743652A CN 107743652 A CN107743652 A CN 107743652A CN 201580081135 A CN201580081135 A CN 201580081135A CN 107743652 A CN107743652 A CN 107743652A
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China
Prior art keywords
layer
component
inactive
encapsulation
active
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CN201580081135.8A
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English (en)
Inventor
V.K.奈尔
C.胡
T.迈尔
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Intel Corp
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Intel Corp
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Publication of CN107743652A publication Critical patent/CN107743652A/zh
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Abstract

本文的实施例涉及系统级封装（SiP）。SiP可具有带有相应的第一活动侧和与第一活动侧相对的第一非活动侧的一个或多个第一功能组件的第一层。SiP还可以包括具有相应的第二活动侧和与第二活动侧相对的第二非活动侧的一个或多个第二功能组件的第二层。在实施例中，第一活动侧中的一个或多个面向第二活动侧中的一个或多个并且通过穿模通孔或穿硅通孔与第二活动侧中的一个或多个电气耦合。

Description

多层封装
技术领域
本公开的实施例总地涉及具有高密度互连封装和小形状因子的封装装配件的领域。
背景技术
诸如智能电话和超级本之类的移动电子设备的最终产品尺寸的持续减小是开发以小形状因子（SFF）进行封装的驱动力。已经开发出系统级封装（SiP）技术来将多个组件并入到单个封装中以减小系统尺寸。
附图说明
图1-A至1-K例示了根据实施例的在制造过程的各个阶段处的封装装配件的示例。
图2例示了根据实施例的在制造过程的最终阶段处的封装装配件的另一示例。
图3例示了根据实施例的在制造过程的最终阶段处的封装装配件的另一示例。
图4例示了根据实施例的用于制造封装装配件的过程的示例。
图5示意性地例示了根据实施例的计算设备。
具体实施方式
本公开的实施例总地涉及高密度互连封装和非常小的形状因子的领域。特别地，能够通过在组合（buildup）之前和之后在模制化合物（molding compound）中集成两层功能组件、并然后焊料接合或粘附接合这两个模制层来制造高度集成的系统级封装（SiP）。在下面的详细描述中，参考形成详细描述一部分的附图，其中类似的标号通篇指定类似的部件，并且在附图中通过例示的方式示出了可在其中实践本公开的主题的实施例。应当理解的是，可以采用其它实施例并且可以做出结构上或逻辑上的改变而不脱离本公开的范围。因此，下面的详细描述不应被认为是限制性的含义，并且实施例的范围由所附权利要求及其等同物限定。
为了本公开的目的，短语“A和/或B”意指（A）、（B）或（A和B）。为了本公开的目的，短语“A、B和/或C”意指（A）、（B）、（C）、（A和B）、（A和C）、（B和C）、或（A、B和C）。
描述可以使用基于透视的描述，诸如顶部/底部、里/外、上/下等等。这样的描述仅用于促进讨论，而不意图将本文描述的实施例的应用局限于任何特定朝向。
描述可以使用短语“在一实施例中”或“在实施例中”，它们可以分别指代相同或不同实施例中的一个或多个。此外，关于本公开的实施例使用的术语“包括”、“包含”、“具有”等是同义的。
本文中可以使用术语“与......耦合”及其衍生词。“耦合”可意指以下各项中的一项或多项。“耦合”可意指两个或更多个元件直接物理接触或电气接触。然而，“耦合”也可意指两个或更多个元件彼此间接接触，但仍然彼此协作或交互，并且可意指在被说成是彼此耦合的元件之间耦合或连接有一个或多个其它元件。术语“直接耦合”可意指两个或更多个元件直接接触。
各种操作可以以最有助于理解所要求保护的主题的方式依次被描述为多个分立操作。然而，描述的顺序不应当被解释为暗示这些操作一定是顺序相关的。
如本文中所使用的，术语“模块”可以指代执行提供所描述的功能的一个或多个软件或固件程序、组合逻辑电路和/或其它合适的组件的ASIC、电子电路、（共享的、专用的或群组的）处理器和/或（共享的、专用的或群组的）存储器，可以是上述内容的部分或者可以包括上述内容。
本文的各图可以描绘一个或多个封装装配件的一个或多个层。本文描绘的层被描绘为不同封装装配件的各层的相对位置的示例。为了解释的目的描绘了这些层，而没有按比例绘制它们。因此，不应当从附图中假设层的相对尺寸，并且可以仅在特别指示或讨论的情况下针对一些实施例假设尺寸、厚度或维度。
如上所述，封装尺寸缩放对于装配件制造是重要的。在一些实施例中，所公开的封装可以使得能够实现：集成具有变化的x-高度、y-高度和z-高度的多个有源组件和无源组件；诸如负鼠（Opossum）配置之类的硅管芯到硅管芯；面板级处理；两个或更多个模具化合物以优化低密度和高密度I/O设备嵌入的集成；扇入和扇出的实现；以及在不研磨模具的情况下对准并暴露金属插入（interject）柱、没有额外镀覆过程的通孔互连。具体地，能够通过在组合之前和之后在模制化合物中集成两层功能组件并然后焊料接合或粘附接合这两个模制层来制造高度集成的系统级封装（SiP）。这也可具有组件之间的更短的布线距离的优点。另外，这也可以具有将无源器件附接到模具中的优点，其中无源器件可以是厚的组件，并且可以非常薄的有源组件可以稍后附接在不同的层中。结果，模制层可以较厚，并且附接的硅管芯可以较薄。
图1-A至1-K描绘了在制造过程的各个阶段处的这种封装装配件的示例。在实施例中，可以在较早的图（例如图1-A）中引入一个或多个元件，并且然后假设所述一个或多个元件持续到诸如1-B之类的后续图。因此，为了清楚起见和易于理解，可能没有在图1-A至1-K中的每一个阶段中都标注封装装配件100的每一个元件。
具体而言，图1-A描绘了包括无源组件102、104和有源组件106的封装装配件100。在实施例中，组件的部分102a、104a和106a可以表示组件可以被电气耦合的区域，并且组件的部分102b、104b和106b可以表示组件不能被电气耦合的区域。在实施例中，可以使用任何数量的无源或有源组件。在非限制性示例中，无源组件可以包括或者指代电阻器或者电容器，并且有源组件可以包括或者指代晶体管或者集成电路。
在实施例中，这些组件可以至少部分地被模具化合物108围绕。模具化合物108可以是可增加组件102、104、106的横向表面积和/或使组件102、104、106电气绝缘或热绝缘的某其它电气中性层和/或热中性层。在一些实施例中，模具化合物108可以是环氧树脂，但是在其它实施例中，模具化合物可以是或可以包括酚醛、不饱和聚酯、热固性聚酰亚胺等。
组件102、104、106中的每一个可具有在第一方向和与组件的第一方向垂直的第二方向中彼此平行的不同的活动侧和非活动侧。垂直于第一方向和第二方向的第三方向可以被称为z-高度。在实施例中，组件的z-高度可以小于模具108的z-高度。
接下来，如图1-B所示，在实施例中，可以涂敷导电层110以用各种方式连接组件102、104、106。例如，在一些实施例中，可以通过溅射和电镀或者无电镀和电镀来涂敷导电层110。在实施例中，可以首先涂敷种子层，并且可以稍后增加厚度。导电层110可以是铜或诸如金（Au）之类的某其它导电材料。
随后，在实施例中，可以在导电层110之上涂敷电介质材料112。在实施例中，这可以是旋转涂布，诸如WPR光敏电介质材料（来自JSR公司®）或其它电介质材料。在实施例中，可以通过层压来涂敷电介质。
接下来，如图1-C所示，可以在电介质材料112中打开通孔114。在实施例中，如果电介质是光敏的，则可以通过光学方法打开通孔114。在其它实施例中，可以通过激光钻孔，化学蚀刻，或某其它物理、光学和/或化学过程来打开通孔114。
接下来，如图1-D所示，可以添加用于布线的金属化层110。在实施例中，该层可以是具有镀层的半添加剂，并且可以被称为第二导电层。第二导电层可以允许布线的交叉并且可以以与第一导电层相同或相似的方式进行涂敷。
接下来，如图1-E所示，可以沉积焊料掩模116，并且可以在掩模内打开通孔118。在实施例中，可以被称为阻焊层的焊料掩模116可以是限定光的（photo-defined）电介质材料，其可以保护表面层金属化并且提供用于与其它器件连接的开口。焊料掩模116可以是与电介质材料112相同的材料，并且可以是旋转涂布、割缝涂布或层压的。在实施例中，焊料掩模116的厚度可以高于电介质112的厚度。
接下来，如图1-F所示，可以添加焊料凸块120。在实施例中，可以在通孔118上在印刷过程中涂敷焊剂以形成焊料凸块120的区域。在实施例中，然后可以例如通过类似印刷过程的漏印板来涂敷预成形的焊料凸块120。在实施例中，该封装然后可以经历回流过程，其中焊剂可以去除焊盘和焊料凸块112上的氧化层，并且（一个或多个）焊料凸块112可以熔化并且与焊盘接触。
接下来，如图1-G所示，一个或多个管芯122、124可以被附接到焊料凸块120并且与焊料凸块120电气耦合。管芯122、124可以是例如硅或某其它导电或导热或半导电材料。尽管未示出，但是在一些实施例中，管芯122、124可以包括一个或多个晶体管器件和/或形成在管芯122、124的活动侧上的各种互连结构层以将电信号和/或功率路由到所述一个或多个晶体管器件。在实施例中，管芯或组件的活动侧可以是管芯或组件可以被电气耦合到的一侧。可能是相对侧的非活动侧是组件可能不能被电气耦合到的一侧。具体地，在一些实施例中，管芯122、124可以包括一个或多个层或材料，诸如电介质材料、基板、半导体材料、钝化层或本领域已知的某其它材料或层。在实施例中，通孔122a可以被并入到管芯122中。
接下来，如图1-H所示，管芯122、124可以被底部填充并模制126。在实施例中，可以在晶片级和/或在面板级完成转移模具。在实施例中，用于模具的材料可具有可包括较软相（诸如树脂或聚合物）并且可包括诸如二氧化硅（SiO2）或碳化硅（SiC）之类的较硬相的两种成分。较软相可以提供材料在一定条件下流动的流动性，并且一旦流动完成并且完全固化，较硬相就可以提供期望的机械强度。
接下来，如图1-I所示，穿模通孔128、130可以被切割穿过模具126。在实施例中，通孔128可以仅切割穿过模具126。在其它实施例中，可以穿过模具126和焊料掩模116切割通孔130。在实施例中，这可以使用激光或者化学、物理或其它光学过程来完成，或者可以用具有穿硅通孔122a的硅管芯之一来完成。
接下来，如图1-J所示，通孔128、130可以被镀覆110。在实施例中，这可涉及溅射、电镀或无电镀和/或诸如锡膏印刷、焊料烧结或焊料回流之类的其它方法。在实施例中，可以添加额外的模制132。
接下来，如图1-K所示，封装100可以被翻转，并且可以涂敷区域阵列朝向中的焊球来实现可以附接的球栅阵列（BGA）134。在实施例中，在这一点上，面向组件102、104、106的管芯122、124处于分离的模具中，以面对面对准的方式结合并电气耦合。此结构可以具有管芯122、124与组件102、104、106之间的更短连接的优点。它还可以具有支持额外的扇入（逻辑门的输入数量）或扇出（该结构的逻辑输出能够驱动的逻辑输入的数量）的优点。
图2描绘了可以实现平面栅格阵列（LGA）的替换封装装配件200。在实施例中，LGA实现可以导致（特别是在整体封装的z-高度上的）更小的整体形状因子。在实施例中，可以翻转图1-J所示的封装，并且可以附接用于平面栅格阵列（LGA）的着陆焊盘。在实施例中，可通过打开焊料掩模116并然后在通孔区域（例如，在通孔122a处或附近）镀覆或沉积导电层来形成LGA。因此，LGA可以包括导电组件210和不导电组件232。封装装配件200与图1-K中的封装装配件100的不同之处在于允许较低轮廓的LGA连接而不是可能需要焊接的较高轮廓的BGA连接。在实施例中，封装的较低的托脚高度可以提供增加的可靠性。
图3描绘了可以实现可以填充更大的穿模通孔的球栅阵列（BGA）球外302的替换封装装配件300。在实施例中，可以替代地以可以使管芯322、324的上部（比如图1-H的122、124）暴露的方式涂敷薄模具层326（比如图1-H的126）。这可以例如在可能不需要额外的扇入、扇出和/或布线组合时是有用的。在管芯322、324的上部未被模制围绕的情况下，可具有额外散热的优点。
图4描绘了示出根据各种实施例的用于制造诸如封装装配件100之类的封装装配件的方法400的流程图。方法400可以始于块402。
在块404处，诸如组件102、104、106之类的器件可以被嵌入在模具中。在实施例中，可以将器件嵌入晶片（未示出）上的模具中，可以释放并翻转已模制的晶片。在其它实施例中，器件可以包括诸如无源组件102、104之类的无源组件和/或诸如有源组件106之类的有源组件，如图1-A中所示（在晶片可被翻转之后）。在实施例中，诸如模具化合物108之类的模具化合物可以部分地或完全地围绕组件。
在块408处，可以涂敷诸如电介质层112之类的电介质。在实施例中，这也可以包括涂敷诸如导电层110之类的导电层，以用各种方式连接诸如组件102、104、106之类的一个或多个组件。导电层110可以具有某导电金属。在实施例中，诸如电介质112之类的电介质可以被涂敷在诸如导电层110之类的导电层之上，并且被涂敷到诸如模制108之类的模制的边缘，如图1-B所示。诸如电介质112之类的电介质可以包括旋转涂布WPR或其它合适的电介质材料。在实施例中，可以使用低温固化聚酰亚胺。在其它实施例中，例如如果基板是矩形的，则可以使用层压层。
在块410处，可以打开诸如电介质112之类的电介质中的诸如通孔114之类的通孔。在实施例中，例如如果电介质是光敏的，则可以通过光学方法打开图1-C上所示的诸如通孔114之类的电介质通孔，或者可以通过激光钻孔来打开电介质通孔。
在块412处，可以涂敷诸如金属化层110之类的金属化层来进行布线。在实施例中，金属化层110可以具有导电金属，如图1-D所示。
在块414处，可以沉积诸如图1-E上的焊料掩模116之类的焊料掩模，并且可以在焊料掩模中打开诸如通孔118之类的通孔。
在块416处，可以附接诸如焊料凸块120之类的焊料凸块。
在块418处，可以附接诸如硅管芯122、124之类的管芯。在图1-G上示出了附接的硅管芯的实施例，并且其可以包括附接到焊料凸块120。
在块420处，可以执行检查以确定是否要暴露诸如管芯122、124之类的管芯的一部分。如果确定的结果显示要暴露管芯，则在块422处，可对所述管芯进行底部填充。在实施例中，诸如图1-H所示的模制材料126之类的模制材料可以在管芯122、124的下方流动，以使得管芯122、124的表面和/或上部暴露（未示出）。在块424处，可以附接诸如图3中的焊料凸块302之类的焊料凸块。之后，方法400可以在块440处结束。
如果在块420处，管芯的一部分不要被暴露，则在块426处，可对诸如管芯122、124之类的管芯进行底部填充，并且诸如模具126之类的模具可被涂敷在管芯之上。在实施例中，诸如模具126之类的模具可以包封管芯122、124。
在块428处，可以打开诸如通孔128、130之类的穿模通孔。在实施例中，如图1-I所示，可以将穿模通孔128、130切割穿过诸如模具126之类的模具。在实施例中，诸如通孔128之类的通孔可仅切割穿过诸如模具126之类的模具。在其它实施例中，诸如通孔130之类的通孔可以切割穿过诸如模具126之类的模具和焊料掩模116。在实施例中，这可以用激光来完成，或者可以用具有穿硅通孔122a的硅管芯之一来完成。
在块430处，可以填充诸如通孔128、130之类的通孔。在实施例中，可以用诸如图1-J中发现的材料110之类的导电材料来镀覆诸如通孔128、130之类的通孔。在其它实施例中，可以用诸如电镀、无电镀、锡膏印刷、焊料烧结或焊料回流之类的方法对通孔进行镀覆。在仍其它的实施例中，在镀覆之后，可以添加诸如模制132之类的额外模制，并且所述额外模制可以包含通孔（未示出）以允许对导电材料110的访问。
在块432处，可以执行检查以确定是否要使用诸如BGA 134之类的BGA用于连接。如果确定的结果显示要使用BGA用于连接，则在块434处，可翻转封装，并且诸如BGA 302之类的BGA可连接到诸如导电材料310（比如图2的210；和/或图1B、1D、1J和1K的110）之类的导电材料，其可以是诸如模制132中的通孔（未示出）之类的穿孔。之后，方法400可以在块440处结束。
如果在块432处不要使用BGA用于连接，则在块436处可执行检查以确定是否要使用LGA用于连接。在实施例中，LGA层可以由诸如导电材料210（比如图1B、1D、1J和1K的110）之类与诸如顶部模制层212之类的顶部模制层分离的导电材料构成。如果确定的结果显示要使用LGA，则在块438处，可以翻转封装并且可以创建LGA连接。在实施例中，LGA连接可以具有图2所示的布局。之后，方法400可以在块440处结束。
本公开的实施例可以被实现到使用任何合适的硬件和/或软件来根据需要进行配置的系统中。图5示意性地例示了根据本发明的一个实现的计算设备500。计算设备500可以容纳诸如母板502之类的板（即，壳体551）。母板502可以包括多个组件，包括但不限于处理器504和至少一个通信芯片506。处理器504可以物理地和电气地耦合到母板502。在一些实现中，至少一个通信芯片506也可以物理地和电气地耦合到母板502。在其它实现中，通信芯片506可以是处理器504的一部分。
取决于其应用，计算设备500可以包括可以或者可以不物理地和电气地耦合到母板502的其它组件。这些其它组件可以包括但不限于：易失性存储器（例如，DRAM）520、非易失性存储器（例如，ROM）524、闪存存储器522、图形处理器530、数字信号处理器（未示出）、密码处理器（未示出）、芯片组526、天线528、显示器（未示出）、触摸屏显示器532、触摸屏控制器546、电池536、音频编解码器（未示出）、视频编解码器（未示出）、功率放大器541、全球定位系统（GPS）设备540、罗盘542、加速度计（未示出）、陀螺仪（未示出）、扬声器550、相机552和大容量存储设备（诸如硬盘驱动器、紧凑盘（CD）、数字多功能盘（DVD）等）（未示出）。图5中未示出的其它组件可以包括麦克风、滤波器、振荡器、压力传感器或RFID芯片。在实施例中，封装装配件组件555中的一个或多个可以是诸如图1-K所示的封装装配件100、图2所示的封装装配件200或图3所示的封装装配件300之类的封装装配件。
通信芯片506可以使得能够实现无线通信以用于将数据传送至计算设备500以及传送来自计算设备500的数据。术语“无线”及其派生词可以用于描述可以通过使用通过非实体介质的调制电磁辐射来传送数据的电路、设备、系统、方法、技术、通信信道等。该术语并不意味着相关设备不包含任何电线，尽管在一些实施例中它们可能不包含电线。通信芯片506可以实现多种无线标准或协议中的任何，包括但不限于：包括Wi-Fi（IEEE 802.11家族）、IEEE 802.16标准（例如，IEEE 802.16-2005修订版）的电气和电子工程师协会（IEEE）标准，长期演进（LTE）项目以及任何修改、更新和/或修订（例如，高级LTE项目、超移动宽带（UMB）项目（也称为“3GPP2”）等）。IEEE 802.16兼容的BWA网络通常称为WiMAX网络，这是代表全球微波接入互操作性的首字母缩略词，其是通过IEEE 802.16标准的一致性和互操作性测试的产品的认证标志。通信芯片506可以根据全球移动通信系统（GSM）、通用分组无线电服务（GPRS）、通用移动电信系统（UMTS）、高速分组接入（HSPA）、演进的HSPA（E-HSPA）、或LTE网络进行操作。通信芯片506可以根据增强型数据GSM演进（EDGE）、GSM EDGE无线电接入网络（GERAN）、通用陆地无线电接入网络（UTRAN）或演进的UTRAN（E-UTRAN）进行操作。通信芯片506可以根据码分多址（CDMA），时分多址（TDMA），数字增强无绳电信（DECT），演进数据优化（EV-DO），其衍生物，以及任何其它被指定为3G、4G、5G及之上的无线协议进行操作。在其它实施例中，通信芯片506可以根据其它无线协议进行操作。
计算设备500可以包括多个通信芯片506。例如，第一通信芯片506可以专用于诸如Wi-Fi和蓝牙之类的较短距离无线通信，并且第二通信芯片506可以专用于诸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO以及其它之类的较长距离无线通信。在一些实施例中，通信芯片中的一个或多个可以包括诸如例如本文所述封装装配件100、200、300中的一个之类的封装装配件中的管芯。
计算设备500的处理器504可以包括诸如例如本文所述封装装配件100、200、300中的一个之类的封装装配件中的管芯。术语“处理器”可以指代处理来自寄存器和/或存储器的电子数据以将此电子数据转换成可以存储在寄存器和/或存储器中的其它电子数据的任何设备或设备的部分。
在各种实现中，计算设备500可以是膝上型计算机、上网本、笔记本、超级本、智能电话、平板电脑、个人数字助理（PDA）、超移动PC、移动电话、台式计算机、服务器、打印机、扫描仪、监视器、机顶盒、娱乐控制单元、数码相机、便携式音乐播放器或数字录像机。在其它实现中，计算设备500可以是处理数据的任何其它电子设备，例如，诸如一体式传真机或打印设备之类的一体式设备。
示例
示例1是一种封装，包括：被模制到晶片中的一个或多个第一组件的第一层，所述晶片具有第一活动层侧和与所述第一活动层侧相对的第一非活动层侧，其中，所述一个或多个第一组件中的相应组件具有相应的第一活动组件侧和与所述第一活动组件侧相对的第一非活动组件侧，所述第一活动组件侧和所述第一非活动组件侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，并且所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同；以及在模制中的一个或多个第二组件的第二层，所述模制具有第二活动层侧和与所述第二活动层侧相对的第二非活动层侧，并且其中所述一个或多个第二组件具有第二活动组件侧和与所述第二活动组件侧相对的第二非活动组件侧，所述第二活动组件侧和所述第二非活动组件侧沿着所述第一方向和所述第二方向彼此平行，并且其中所述第二活动层侧面向所述第一活动层侧并且与所述第一活动层侧电气耦合和物理耦合，并且所述第二活动层侧通过穿模通孔或穿硅通孔与所述第二非活动层侧电气耦合。
示例2可以包括示例1的主题，还包括附接至所述第二非活动侧并且与所述第二活动侧电气耦合的平面栅格阵列或球栅阵列。
示例3可以包括示例1至2中的任一项的主题，其中，所述第二活动层侧经由焊料或粘合剂与所述第一活动层侧物理耦合。
示例4可以包括示例1至3中的任一项的主题，其中，所述一个或多个第一组件中的一个组件在所述第一方向上的长度比所述一个或多个第二组件中的一个组件在所述第一方向上的长度更长。
示例5是一种封装，包括：
具有相应的第一活动侧和与所述第一活动侧相对的第一非活动侧的一个或多个第一功能组件的第一层；具有相应的第二活动侧和与所述第二活动侧相对的第二非活动侧的一个或多个第二功能组件的第二层；并且其中，所述第一活动侧中的一个或多个面向所述第二活动侧中的一个或多个并且通过穿模通孔或穿硅通孔与所述第二活动侧中的一个或多个电气耦合。
示例6可以包括示例5的主题，其中，所述一个或多个第一功能组件的所述第一层被模制到晶片中。
示例7可以包括示例5至6中任一项的主题，其中，所述第一或多个第二功能组件的所述第二层是在模制中。
示例8可以包括示例7的主题，其中，所述模制包括环烯烃共聚物。
示例9可以包括示例5至8中的任一项的主题，其中，所述一个或多个第一功能组件中的相应功能组件的第一活动侧与所述一个或多个第一功能组件中的所述相应功能组件的第一非活动侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同。
示例10可以包括示例5至9中的任一项的主题，其中，功能组件是无源组件或有源组件。
示例11可以包括示例10的主题，其中，无源组件是电阻器或电容器。
示例12可以包括示例10的主题，其中，有源组件是晶体管或集成电路。
示例13可以包括示例5至12中的任一项的主题，其中，所述封装是系统级封装（SiP）。
示例14是具有封装装配件的系统，所述系统包括：电路板；与所述电路板耦合的封装装配件，所述封装装配件包括：具有相应的第一活动侧和与所述第一活动侧相对的第一非活动侧的一个或多个第一功能组件的第一层；具有相应的第二活动侧和与所述第二活动侧相对的第二非活动侧的一个或多个第二功能组件的第二层，其中，所述第一活动侧中的一个或多个面向所述第二活动侧中的一个或多个并且通过穿模通孔或穿硅通孔与所述第二活动侧中的一个或多个电气耦合。
示例15可以包括示例14的主题，其中，所述第一活动侧通过穿模通孔或穿硅通孔与所述第二非活动侧电气耦合。
示例16可以包括示例14至15中的任一项的主题，还包括附接至所述第二非活动侧并且与所述第一活动侧电气耦合的平面栅格阵列或球栅阵列。
示例17可以包括示例14至16中的任一项的主题，其中，对所述第一层和第二层进行模制。
示例18可以包括示例17的主题，其中，第一层模具和第二层模具具有不同的化合物。
示例19可以包括示例18的主题，其中，所述第一或第二功能组件是扇出组件。
示例20可以包括示例14至19中的任一项的主题，其中，所述一个或多个第一功能组件中的相应功能组件的第一活动侧与所述一个或多个第一功能组件中的所述相应功能组件的第一非活动侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同。
各种实施例可以包括上述实施例的任何合适的组合，包括上文以连接形式（和）（例如，“和”可以是“和/或”）描述的实施例的替换（或）实施例。此外，一些实施例可以包括具有存储在其上的指令的一个或多个制品（例如，非非暂时性计算机可读介质），所述指令在被执行时导致上述实施例中的任何的动作。此外，一些实施例可以包括具有用于实行上述实施例的各种操作的任何合适部件的装置或系统。
对本发明的所例示的实现的以上描述（包括在摘要中描述的内容）不旨在是穷举性的或将本发明限制到所公开的确切形式。尽管本文出于例示性目的而描述了本发明的具体实现和示例，但是如相关领域的技术人员将认识到的，在本发明的范围内的各种等同修改是可能的。
可以鉴于以上详细描述对本发明做出这些修改。以下权利要求中使用的术语不应被解释为将本发明限制于说明书和权利要求中公开的具体实现。相反，本发明的范围应完全由以下权利要求来确定，应根据所建立的权利要求解读原则来解释所述权利要求。

Claims (20)

1.一种封装，包括：
被模制到晶片中的一个或多个第一组件的第一层，所述晶片具有第一活动层侧和与所述第一活动层侧相对的第一非活动层侧，其中，所述一个或多个第一组件中的相应组件具有相应的第一活动组件侧和与所述第一活动组件侧相对的第一非活动组件侧，所述第一活动组件侧和所述第一非活动组件侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，并且所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同；以及
在模制中的一个或多个第二组件的第二层，所述模制具有第二活动层侧和与所述第二活动层侧相对的第二非活动层侧，并且其中所述一个或多个第二组件具有第二活动组件侧和与所述第二活动组件侧相对的第二非活动组件侧，所述第二活动组件侧和所述第二非活动组件侧沿着所述第一方向和所述第二方向彼此平行，并且其中所述第二活动层侧面向所述第一活动层侧并且与所述第一活动层侧电气耦合和物理耦合，并且所述第二活动层侧通过穿模通孔或穿硅通孔与所述第二非活动层侧电气耦合。
2.根据权利要求1所述的封装，还包括附接至所述第二非活动侧并且与所述第二活动侧电气耦合的平面栅格阵列或球栅阵列。
3.根据权利要求1所述的封装，其中，所述第二活动层侧经由焊料或粘合剂与所述第一活动层侧物理耦合。
4.根据权利要求1至3中的任一项所述的封装，其中，所述一个或多个第一组件中的一个组件在所述第一方向上的长度比所述一个或多个第二组件中的一个组件在所述第一方向上的长度更长。
5.一种封装，包括：
具有相应的第一活动侧和与所述第一活动侧相对的第一非活动侧的一个或多个第一功能组件的第一层；
具有相应的第二活动侧和与所述第二活动侧相对的第二非活动侧的一个或多个第二功能组件的第二层；并且
其中，所述第一活动侧中的一个或多个面向所述第二活动侧中的一个或多个并且通过穿模通孔或穿硅通孔与所述第二活动侧中的一个或多个电气耦合。
6.根据权利要求5所述的封装，其中，所述一个或多个第一功能组件的所述第一层被模制到晶片中。
7.根据权利要求6所述的封装，其中，所述第一或多个第二功能组件的所述第二层是在模制中。
8.根据权利要求7所述的封装，其中，所述模制包括环烯烃共聚物。
9.根据权利要求5至8中的任一项所述的封装，其中，所述一个或多个第一功能组件中的相应功能组件的第一活动侧与所述一个或多个第一功能组件中的所述相应功能组件的第一非活动侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同。
10.根据权利要求9所述的封装，其中，功能组件是无源组件或有源组件。
11.根据权利要求10所述的封装，其中，无源组件是电阻器或电容器。
12.根据权利要求10所述的封装，其中，有源组件是晶体管或集成电路。
13.根据权利要求9所述的封装，其中，所述封装是系统级封装（SiP）。
14.一种具有封装装配件的系统，所述系统包括：
电路板；
与所述电路板耦合的封装装配件，所述封装装配件包括：
具有相应的第一活动侧和与所述第一活动侧相对的第一非活动侧的一个或多个第一功能组件的第一层；
具有相应的第二活动侧和与所述第二活动侧相对的第二非活动侧的一个或多个第二功能组件的第二层，
其中，所述第一活动侧中的一个或多个面向所述第二活动侧中的一个或多个并且通过穿模通孔或穿硅通孔与所述第二活动侧中的一个或多个电气耦合。
15.根据权利要求14所述的系统，其中，所述第一活动侧通过穿模通孔或穿硅通孔与所述第二非活动侧电气耦合。
16.根据权利要求14所述的系统，还包括附接至所述第二非活动侧并且与所述第一活动侧电气耦合的平面栅格阵列或球栅阵列。
17.根据权利要求14所述的系统，其中，对所述第一层和第二层进行模制。
18.根据权利要求17所述的系统，其中，第一层模具和第二层模具具有不同的化合物。
19.根据权利要求18所述的系统，其中，所述第一或第二功能组件是扇出组件。
20.根据权利要求14至19中的任一项所述的系统，其中，所述一个或多个第一功能组件中的相应功能组件的第一活动侧与所述一个或多个第一功能组件中的所述相应功能组件的第一非活动侧在第一方向和与所述第一方向垂直的第二方向上彼此平行，所述一个或多个第一组件中的相应组件具有在与所述第一方向和所述第二方向垂直的第三方向上的相应z-高度测量，并且所述一个或多个第一组件中的第一个组件的z-高度与所述一个或多个第一组件中的第二个组件的z-高度不同。
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