CN107659151A - Buck load current detection circuits and method without external sampling resistance - Google Patents

Buck load current detection circuits and method without external sampling resistance Download PDF

Info

Publication number
CN107659151A
CN107659151A CN201710272315.5A CN201710272315A CN107659151A CN 107659151 A CN107659151 A CN 107659151A CN 201710272315 A CN201710272315 A CN 201710272315A CN 107659151 A CN107659151 A CN 107659151A
Authority
CN
China
Prior art keywords
current
sampling
circuit
electrical connection
buck
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710272315.5A
Other languages
Chinese (zh)
Other versions
CN107659151B (en
Inventor
黄令华
张海波
牛现立
陈智荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN HOTCHIP TECHNOLOGY Co Ltd
Original Assignee
SHENZHEN HOTCHIP TECHNOLOGY Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN HOTCHIP TECHNOLOGY Co Ltd filed Critical SHENZHEN HOTCHIP TECHNOLOGY Co Ltd
Priority to CN201710272315.5A priority Critical patent/CN107659151B/en
Publication of CN107659151A publication Critical patent/CN107659151A/en
Application granted granted Critical
Publication of CN107659151B publication Critical patent/CN107659151B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Buck converter loads current detection circuit without external sampling resistance includes current sample pipe（Q3）, current sampling circuit（31）, sampling hold circuit（33）And low pass filter（32）；In the first Buck power output pipes（Q1）During conducting, Buck converter loads current detection circuit utilizes current sample pipe（Q3）And current sampling circuit（31）Sampling obtains the first Buck power output pipes（Q1）Conducting electric current；In the first Buck power output pipes（Q1）During closing, sampling hold circuit is utilized（33）And low pass filter（32）Fed-back current signals are produced, external loading current feedback signal are simulated, to control the output current of Buck converters.The present invention is simplified periphery circuit design, reduces energy loss, improved whole efficiency, can be realized and external sampling identical high-accuracy and constant current charge using suitable physical circuit without external sampling resistance.

Description

Buck load current detection circuits and method without external sampling resistance
Technical field
The present invention relates to direct current energy translation circuit or control device；The direct current energy of more particularly to Buck decompression conversions becomes Change circuit, more particularly to the decompressions of the Buck with load current detection conversion direct current energy converting means and method.
Background technology
Prior art is used for the switching power circuit of direct current energy translation circuit or control device（SWITCHING REGULATOR）In, Buck buck converters are DC/DC（DC-DC）The important type of converter, is primarily adapted for use in input Voltage is higher than the situation of output voltage, to realize the constant current output of Buck converters, it usually needs detection load current, that is, Need accurately to detect the load current of Buck converters, and the control terminal for feeding back to Buck translation circuits carries out Buck and turned Parallel operation controls, to keep the constant current output of Buck converters.
Existing Buck load current detections technology is typically a small sampling electricity of being connected between inductance and output signal Resistance is detected, and for this detection method, the average current flowed through on resistance is output load current, therefore passes through sampling Circuit is detected, the moment detects the voltage at sampling resistor both ends, then amplified, and takes its average, that is, it is corresponding to be converted into load current The voltage signal of ratio；In CC control loops, the sampled voltage that this draws and reference voltage are subjected to loop error contrast, are allowed to It is equal, system is operated in constant current output pattern.
It is the structured flowchart that prior art realizes load current detection as shown in Figure 1, as seen from the figure, external impressed current sampling electricity Resistance Rsen is serially connected in output voltage（VOUT）Between lead-out terminal and external inductance L1, the electric current of inductance flows through current sampling resistor Rsen produces pressure drop, and internal current sampling circuit is converted into internal electricity by detecting the pressure drop on current sampling resistor Rsen Signal Isen is flowed, internal current signal Isen is converted into representing the voltage signal of load current size by internal resistance Rs Vsen, because the pressure drop on current sampling resistor Rsen is that have ripple, therefore voltage signal Vsen caused by inside will pass through one The feedback voltage signal Vsen_FB into approximate DC, the feedback voltage signal could be stablized after level or multiple-order low-pass wave filter Vsen_FB is transmitted to the error amplifier of Buck converter inside CC current constant controls, when Buck converters are in CC current constant controls area When interior, output current becomes big, and Vsen_FB accordingly increases, and stablizes until CC loops work to target output current or maximum Output current.
Existing Buck load current detections technology is to realize load detecting by the mode for sampling resistor of being connected outside piece, This scheme has following inferior position:1. chip is needed to need the PIN required for one current sample of more increases, in pin Resource is nervous, rather unfavorable in the compact chip application of space requirement；2. flow through electricity during external sampling resistor normal work Stream, causes energy loss, causes efficiency to reduce；3. the required precision of generally external sampling resistor is higher, increase high accuracy Resistance so that the cost of whole application system accordingly increases.
Explanation of nouns：
DCDC is English Direct current Direct current abbreviation, and Chinese implication is that DC voltage conversion is straight Flow voltage；
The implication of BUCK buck converters in this application is to convert electricity using the decompression DC/DC of BUCK REGULATOR modes Road；
The implications of CC in this application are constant current, i.e. constant current
NMOS is Negative channel-Metal-Oxide-Semiconductor abbreviation, i.e. N-type metal oxide half Conductor；
PMOS is Positive channel-Metal-Oxide-Semiconductor abbreviation, i.e. p-type metal oxide half Conductor；
PWM is English Pulse Width Modulation abbreviation, and Chinese implication is pulse width modulation；Pulsewidth width modulated Formula（PWM）Switching mode mu balanced circuit is in the case where control circuit output frequency is constant, by adjusting its dutycycle, so as to reach To the purpose of regulated output voltage.
The content of the invention
The technical problem to be solved in the present invention is to avoid above-mentioned the deficiencies in the prior art part and propose a kind of without outer The Buck converter loads current detection circuit and method of portion's sampling resistor, needing the Buck decompression converting circuits of current constant control Middle load current detection of the realization without external sampling resistance, reduces chip pin, saves energy consumption and cost caused by non-essential resistance.
It is a kind of Buck converter loads without external sampling resistance to solve the technical scheme that above-mentioned technical problem uses Current detection circuit, including the current sample pipe for the Buck power output tube currents of mirror image the first, for sampling from the electricity The current sampling circuit of sampling pipe drain electrode output current is flowed, the first Buck power output pipe close moment peak values are kept for sampling The sampling hold circuit of electric current and the low pass filter for sampling hold circuit output voltage signal LPF；The electric current The source electrode of sampling pipe electrically connects with external input voltage source, the grounded-grid of the current sample pipe, the current sample pipe Drain electrode electrically connects with the first input end of the current sampling circuit；Second input terminal of the current sampling circuit with it is outer Portion's input voltage source electrical connection；3rd input terminal of the current sampling circuit and the drain electrode electricity of the first Buck power output pipes Connection；The lead-out terminal of the current sampling circuit electrically connects with the first input end of the sampling hold circuit, the electricity Stream sample circuit lead-out terminal electrically connected with one end of internal current sampling resistor, the internal current sampling resistor it is another End ground connection；The lead-out terminal of the sampling hold circuit electrically connects with the input terminal of the low pass filter, the low pass filtered The output signal of ripple device lead-out terminal is used as the load current sampled signal of Buck converter loads current detection circuit output.
The current sampling circuit, including for obtaining the 4th PMOS of sample rate current from the current sample pipe, use In the current sample operational amplifier for sampling the first Buck power output pipe drain voltage signals, for input signal control One switch and second switch；The first switch receives the control of the first control signal, and the second switch receives the first control The control of the non-signal of signal；The current sample operational amplifier first input end and one end of the first switch are electrically connected Connect；The other end of the first switch electrically connects with the drain electrode of the first Buck power output pipes；The current sample operation amplifier Device first input end electrically connects with one end of the second switch；The other end of the second switch and external input voltage source Electrical connection；The source electrode of 4th PMOS be used as the current sampling circuit input terminal and with the current sample pipe Drain electrode electrical connection, the grid of the 4th PMOS electrically connects with the lead-out terminal of the current sample operational amplifier, described Second input terminal of current sample operational amplifier electrically connects with the source electrode of the 4th PMOS, the 4th PMOS Lead-out terminal of the drain electrode as the current sampling circuit.
The sampling hold circuit, including the sampling holding capacitor kept for applied signal voltage, for input signal The Buffer buffer circuits of buffering, the 3rd switch for the control of sampling hold circuit input signal；3rd switch receives the The control of one control signal；One end of the input terminal of the Buffer buffer circuits and the sampling holding capacitor is electrically connected Connect, the other end ground connection of the sampling holding capacitor；The input terminal of the Buffer buffer circuits and the described 3rd switch One end electrical connection, the other end of the 3rd switch is used as the first input end of the sampling hold circuit, and described interior The ungrounded end electrical connection of portion's current sampling resistor；The lead-out terminal of the Buffer buffer circuits is used as the sampling and kept The lead-out terminal of circuit.
The low pass filter includes LPF resistance and LPF electric capacity, and one end of the LPF resistance is used The input for making the low pass filter electrically connects with the output end of the sampling hold circuit；The LPF resistance it is another One end is used as the output end of the low pass filter, and is electrically connected with one end of the LPF electric capacity, the LPF The other end ground connection of electric capacity.
The Buck converter loads current detection circuit also includes generating circuit from reference voltage, and the reference voltage produces Circuit includes current source and reference voltage circuit resistance；The positive pole of the current source and the electrical connection of external input voltage source, it is described Current source negative pole is used as the lead-out terminal of the generating circuit from reference voltage；The current source negative pole is also electric with the reference voltage One end electrical connection of road resistance, the other end ground connection of the reference voltage circuit resistance
The Buck converter loads current detection circuit is also included for feedback current voltage signal and reference voltage contrast fortune The error amplifier of calculation, the lead-out terminal electricity of the first input end of the error amplifier and the generating circuit from reference voltage Connection；Second input terminal of the error amplifier electrically connects with the lead-out terminal of the low pass filter.
The current sample operational amplifier includes chopper-type operational amplifier, the low error amplifier of automatic zero set With automatic zero set operational amplifier.
The Buck converter load current detection circuits without external sampling resistance, in addition to in the first Buck Power output pipe is closed, output voltage is detected in the 2nd Buck power output pipe ON times section and is mended by output voltage Repay the sampling compensation circuit of electric current；The sampling hold circuit also includes the second input terminal, and the of the sampling hold circuit Two input terminals electrically connect with the lead-out terminal of the sampling compensation circuit；The input terminal of the sampling compensation circuit is used for same Output voltage electrically connects to the output voltage terminals of outside.
The sampling hold circuit, in addition to for the 4th switch with the sampling compensation circuit electrical connection；Described Four switches receive the control of the non-signal of the first control signal；One end of 4th switch is used as the sampling hold circuit Second input terminal, electrically connected with one end of the sampling compensation circuit；Controlled by the non-signal of the first control signal from institute State the signal of the input terminal of sampling hold circuit second input；The other end of 4th switch and Buffer buffers electricity The input terminal electrical connection on road.
It is described sampling compensation circuit include first resistor, second resistance and 3rd resistor, compensation amplifier, the 5th metal-oxide-semiconductor, 6th metal-oxide-semiconductor and the 7th metal-oxide-semiconductor；One end of the first resistor electrically connects with output voltage VO UT lead-out terminal, as institute State the input terminal of sampling compensation circuit；The negative input of the other end of the first resistor and the compensation amplifier is electrically connected Connect；One end of the second resistance electrically connects with the negative input of the compensation amplifier；The other end of the second resistance Ground connection；One end of the 3rd resistor electrically connects with the lead-out terminal of output voltage；The other end of the 3rd resistor with it is described Compensate the electrode input end electrical connection of amplifier；Source of the electrode input end of the compensation amplifier also with the 5th metal-oxide-semiconductor Pole electrically connects；The output end electrical connection of the grid of 5th metal-oxide-semiconductor and the compensation amplifier；The leakage of 5th metal-oxide-semiconductor The drain electrode electrical connection of pole and the 6th metal-oxide-semiconductor；The source electrode electrical connection of the source electrode and the 7th metal-oxide-semiconductor of 6th metal-oxide-semiconductor； The grid electrical connection of the grid and the 7th metal-oxide-semiconductor of 6th metal-oxide-semiconductor；6th metal-oxide-semiconductor and the 6th metal-oxide-semiconductor group Into current mirror；The drain electrode of 7th metal-oxide-semiconductor is used as the lead-out terminal of sampling compensation circuit, and electric current is compensated for exporting.
The current sample operational amplifier, which includes the primary operational amplifier, to be included the operational amplifier of low error, cuts Wave mode operational amplifier and the operational amplifier of automatic zero set.The operational amplifier of low error, i.e. low offset Operation amplifier or chopper-type operational amplifier are Chopping operation amplifier, also Can be the operational amplifier i.e. Auto-Zeroing operation amplifier of automatic zero set.No matter which kind of operation amplifier Device and its equivalent transformation form, in the protection domain of this patent.
Solve the technical scheme that above-mentioned technical problem uses and can also be that one kind is based on above-mentioned Buck converter loads electric current The Buck load current detection methods without external sampling resistance of circuit are detected, including：Step 1：The current sample pipe with The first Buck power outputs in Buck voltage conversion circuits are tubular to be mirrored into pipe, is turned in the first Buck power outputs pipe, When 2nd Buck power outputs pipe is closed, the conducting electric current that the current sample pipe collection obtains the first Buck power output pipes is Load current；Step 2：When the first Buck power outputs pipe is switched to closed mode from conducting state, the sampling keeps electricity Road obtains the voltage at the current sample pipe current time, and common by the sampling hold circuit and the low pass filter Simulate freewheel current i.e. load current when the first Buck power outputs pipe is closed, the 2nd Buck power output pipes Q2 is turned on.
Solve the technical scheme that above-mentioned technical problem uses and can also be that one kind is based on above-mentioned Buck converter loads electric current The Buck load current detection methods without external sampling resistance of circuit are detected, including：Step 1：The current sample pipe with The first Buck power outputs in Buck voltage conversion circuits are tubular to be mirrored into pipe, is turned in the first Buck power outputs pipe, When 2nd Buck power output pipes Q2 is closed, the current sample pipe collection obtains the conducting electric current of the first Buck power output pipes That is load current；Step 2：When the first Buck power outputs pipe is switched to closed mode from conducting state, the sampling is kept Circuit obtains the voltage at the current sample pipe current time, and is total to by the sampling hold circuit and the low pass filter Closed with the first Buck power outputs pipe of simulation, freewheel current when the 2nd Buck power outputs pipe turns on is load current； Comprise the following steps 3 in the step 2：Closed in the first Buck power outputs pipe, during the 2nd Buck power outputs pipe turns on, The output voltage of the sampling compensation circuit detection Buck circuits simultaneously obtains compensation electric current by output voltage, for compensating second Freewheel current when Buck power outputs pipe turns on so that freewheel current is closer to real load current.
Compared with the existing technology compared with, the beneficial effects of the invention are as follows：1st, in the chip for applying present invention design circuit arrangement, It outside need not reconnect sampling resistor and load current detection can be achieved；2. save chip pin so that in small space education and correction for juvenile offenders Also load current detection can be realized in the chip application of pin, so as to realize Buck current constant controls；Sampled 3. outside need not reconnect Power consumption and cost caused by outer meeting resistance when resistance also saves chip application；4. pass through sampling hold circuit and compensation circuit Combination, realize estimating for inductive current, simulaed inductance electric current, not only increase the precision of load current detection also facilitating chip Interior circuit.
Brief description of the drawings
Fig. 1 is the circuit structure block diagram of the load current detection embodiment of Buck translation circuits in the prior art；
Fig. 2 is the circuit structure block diagram of one of the preferred embodiment of the present invention；
Fig. 3 is one of preferred embodiment of the present invention implementing circuit schematic diagram；
Fig. 4 is the waveform timing diagram of one of the preferred embodiment of the present invention；
Fig. 5 is the electrical schematic diagram that compensation circuit 34 is sampled described in the preferred embodiment of the present invention；
Fig. 6 is the electrical schematic diagram of current sample operational amplifier described in the preferred embodiment of the present invention 37.
Embodiment
Embodiments of the present invention are further described below in conjunction with each accompanying drawing.
The purpose of the present invention is to propose to a kind of Buck converter load current detection circuits without sampling resistor, solve The problem of being needed under Buck output load currents detection situation by external sampling resistance.
In Buck converters, it is assumed that Buck is operated in CCM（Continuous operation mode）Pattern, output load current are equal to inductance The average of electric current, in the presence of no sampling resistor, it is difficult to directly sample the electric current on inductance, it is contemplated that inductance Electric current only has power tube and continued flow tube as path, therefore can be come with the electric current flowed through on indirect detection power tube and on continued flow tube Obtain inductive current, in a turn-on cycle T, in 0 ~ DT cycles, wherein D be Buck converters dutycycle, high-order power The electric current that pipe PMOS flows through is equal to the electric current of inductance, and the electric current for then flowing through continued flow tube is 0, in 0 ~ DT cycles, it is only necessary to detect Flow through the electric current of PMOS;DT~（1-D）In the T cycles, when continued flow tube is opened, the electric current that continued flow tube flows through is equal to the electric current of inductance, High-order PMOS electric current is flowed through for 0, DT ~ in (1-D) T cycles, it is only necessary to detects the electric current of continued flow tube；Therefore flowed through by sampling PMOS can obtain inductive current with afterflow tube current sum.
Buck converter load current detection circuits without external sampling resistance involved in the present invention, basic thought is just It is that the electric current of accurate detection stream overpower pipe learns output load current, the current sample of high-order power tube is easier to, low level The electric current of power tube can also detect, but separately increase unnecessary circuit, and when continued flow tube uses external schottky diode When, it is difficult to sample the electric current of continued flow tube, therefore, in order to simplify and optimizing detection circuit and be more suitable for continued flow tube and use Xiao The situation of special based diode, the present invention are only sampled by detecting the electric current in high-side switch power tube PMOS turn-on cycles, When continued flow tube is just begun to turn on, the signal of sampling is allowed to be maintained at the peak value size that PMOS switch pipe closes that time, Zhi Hou In continued flow tube turn-on cycle, VOUT signals are exported by detecting, draw a compensation electric current, are kept with this compensation electric current drop-down Electric capacity, carry out corresponding sample waveform during the decline of simulaed inductance electric current, inductive current size is arrived in accurate anticipation, improves Buck loads The accuracy of electric current, the sampled operational amplifier being applied in addition in system reduces amplifier imbalance using Chop copped waves structure to be caused Influence, really realize high precision test.
High-order power tube corresponds to the first Buck power outputs in specific embodiment as invention shown in figures 2 and 3 Pipe Q1, low level power tube correspond to the 2nd Buck power outputs pipe Q2, and the first Buck power output pipes Q1 is PMOS, institute The 2nd non-NMOS tubes of Buck power output pipe Q2 are stated, implement to illustrate only limited embodiment in illustration certainly, in practical application In, the type of pipe can be other kinds of pipe to substitute, as long as the switch power output of BUCK translation circuits can be realized .
The fundamental block diagram of the preferred embodiment of the present invention as shown in Figure 2, including output voltage sampling module 40, for detecting The current detection circuit 30 of load current, the CC/CV error amplifier blocks for controlling CC/CV loops, for producing ramp signal Slope generating circuit 60, for comparing PWM comparators 70 that slope exports with error amplifier, for controlling patrolling for power tube Control module 80, power tube level 20, outputting inductance L1 and output capacitance C8 are collected, in addition to the part of current detection circuit 30, its Remaining circuit forms consistent with the fundamental block diagram of the prior art shown in Fig. 1.
As shown in Fig. 2 the input signal of the output voltage sampling module 40 includes output voltage VO UT signals, it is described defeated The output voltage feedback signal VFB for going out voltage sample module 40 is the partial pressure of output voltage VO UT signals.The output voltage is adopted The output voltage feedback signal VFB that egf block 40 exports is connected to CC/CV error amplifiers, as CC/CV error amplifiers Input one of control signal.
As shown in Fig. 2 the output load current feedback signal Vsen_FB to CC/CV of current detection circuit module 30 is missed Poor amplifier, two as the input control signal of CC/CV error amplifiers；Load current feedback signal Vsen_FB is to represent The feedback voltage signal of load current.
As shown in Fig. 2 the input control signal of CC/CV error amplifiers also includes benchmark electricity caused by internal reference circuit Press signal VBG and CC loop reference voltage signal VREFL；Output voltage feedback signal VFB, load current feedback signal Vsen_ FB, reference voltage signal VBG and CC loop reference voltage signal VREFL are connected to CC/CV error amplifier blocks 50, are The input control signal of CC/CV error amplifier blocks 50.
As shown in Fig. 2 in the CC/CV error amplifiers, CC error amplifiers detection load current feedback signal Vsen_ FB and CC loop reference voltage signals VREFL the first error signal VCL；CV error amplifiers detect output voltage feedback signal VFB and reference voltage signal VBG the second error signal VCV；In first error signal VCL and the second error signal VCV, select Corresponding signal is used as PWM comparison controller control signals VC；
As shown in Fig. 2 slope generating circuit 60 exports sawtooth signal Vsaw to PWM comparators；The PWM comparators 70 compare Sawtooth signal Vsaw and PWM comparison controller control signal VC, the PWM comparator 70 of input exports logic controller control letter Number to Logic control module 80；The Logic control module 80 exports high-order power tube control signal GP to control power tube level 20 High-order power tube be PMOS Q1 grid；Meanwhile the Logic control module 80 exports low level power tube control signal GN Continued flow tube to control power tube level 20 is NMOS tube Q2 grid.
As shown in Fig. 2 the current detection circuit 30 includes current sample pipe Q3, current sampling circuit 31, sampling holding Circuit 33, sampling compensation circuit 34, low-pass filter circuit 32 and internal current sampling resistor Rs；The source of the current sample pipe Q3 Pole electrically connects with external input voltage source VIN, the grounded-grid of the current sample pipe Q3, the drain electrode of the current sample pipe Q3 Electrically connected with the input terminal of the current sampling circuit 31；The current sample pipe Q3 is set to be in normally open.
As shown in Fig. 2 the first input end input current sampling pipe Q3 drain voltages letter of the current sampling circuit 31 Number Vs, the external voltage input signal VIN in the second input terminal input external input voltage source of the current sampling circuit 31； The voltage signal that inductive current size is characterized from the 3rd input terminal input of the current sampling circuit 31 is circuit node LX The voltage signal of point, that is, the first Buck power output pipes Q1 drain voltage signal；The current sampling circuit 31 it is defeated Go out terminal output load current signal Isen and deliver to internal current sampling resistor Rs generation load current sampled voltage signal Vsp, Load current sampled voltage signal Vsp delivers to the sampling hold circuit 33.
As shown in Figures 2 and 3, the sampling compensation circuit 34 electrically connects with output voltage terminal, makes output voltage signal VOUT turns into the input signal of the sampling compensation circuit 34, and the sampling compensation circuit 34 is counted according to voltage signal VOUTV is gone out Calculate generation compensation electric current letter I1 and deliver to the sampling hold circuit 33；The sampling hold circuit 33 receives internal sample resistance Rs The voltage signal Vsp or compensating current signal I1, the output signal Vsen of sampling hold circuit 33 of one end deliver to LPF Device 32, obtained after the LPF of low pass filter 32 for being output to the load of CC/CV error amplifier blocks 50 Current feedback signal Vsen_FB.
As shown in figure 3, the source electrode of the first Buck power output pipes Q1 meets external input voltage source VIN, described first Buck power output pipes Q1 drain electrode connects the 2nd i.e. continued flow tube Q2 drain electrodes of Buck power output pipes Q2, the 2nd Buck power outputs Pipe Q2 drain electrode is that circuit node LX is electrically connected with one end of external inductors, and the first Buck power output pipes Q1 grid connects logic Control circuit output signal GP.
As shown in figure 3, the 2nd Buck power output pipes Q2 drain electrode connects the first Buck power output pipes Q1 drain electrode and outer One end of portion's inductance is circuit node LX, and the 2nd Buck power output pipes Q2 source electrode meets GND, the 2nd Buck power output pipes Q2 Grid meet the output signal GN of logic control circuit.
As shown in figure 3, the source electrode of the current sample pipe Q3 electrically connects with external input voltage source VIN, the electric current is adopted Sample pipe Q3 grounded-grid, the drain electrode of the current sample pipe Q3 and the first input end of the current sampling circuit 31 are electrically connected Connect；The current sampling circuit 31, including for obtaining the 4th PMOS Q4 of sample rate current from the current sample pipe Q3, use In the current sample operational amplifier 37 for sampling the first Buck power output pipe Q1 drain voltage signals, controlled for input signal First switch K1 and second switch K2；The first switch K1 receives the first control signalControl, the second switch K2 receives the non-signal of the first control signalControl.
As shown in figure 3, one end of the first input end of current sample operational amplifier 37 and the first switch K1 Electrical connection；The other end of the first switch K1 electrically connects with the first Buck power output pipes Q1 drain electrode；The current sample The first input end of operational amplifier 37 electrically connects with one end of the second switch K2；The other end of the second switch K2 with External input voltage source VIN is electrically connected.
As shown in figure 3, the source electrode of the 4th PMOS Q4 is used as the first input end of the current sampling circuit 31 And electrically connected with the drain electrode of the current sample pipe Q3, grid and the current sample operation amplifier of the 4th PMOS Q4 The lead-out terminal electrical connection of device 37, the second input terminal of the current sample operational amplifier 37 and the 4th PMOS Q4 Source electrode electrical connection, the 4th PMOS Q4 drain electrode as the current sampling circuit 31 lead-out terminal, output loading Current sampling signal Isen to internal current sampling resistor Rs.
As shown in figure 3, the sampling hold circuit 33, including the sampling holding capacitor kept for applied signal voltage Cp, opened for the Buffer buffer circuits 36 of buffer input signal, for the control of sampling hold circuit input signal the 3rd Close K3；3rd switch K3 receives the first control signalControl；The input terminal of the Buffer buffer circuits 36 and institute State sampling holding capacitor Cp one end electrical connection, the other end ground connection of the sampling holding capacitor Cp；The Buffer buffers The input terminal of circuit 36 electrically connects with the described 3rd switch K3 one end, and the other end of the 3rd switch K3 is used as described adopt The first input end of sample holding circuit 33, electrically connected with the ungrounded end of the internal current sampling resistor Rs；It is described The lead-out terminal of Buffer buffer circuits 36 is used as the lead-out terminal of the sampling hold circuit 33.
In the embodiment of Buck converter load current detection circuits as shown in Figure 3, in addition to in Buck circuits Continued flow tube turn-on cycle in detection output voltage and pass through output voltage obtain compensation electric current sampling compensation circuit 34；It is described Sampling hold circuit 33 also includes the second input terminal, and the second input terminal of the sampling hold circuit 33 is mended with the sampling Repay the lead-out terminal electrical connection of circuit 34；The input terminal of the sampling compensation circuit 34 is used for outside output voltage output end Son electrical connection.
As shown in figure 3, the sampling hold circuit 33, in addition to it is used for and samples the 4th switch of compensation circuit electrical connection K4；The 4th switch K4 receives the non-signal of the first control signalThe control sampling hold circuit 33 second input The input signal of terminal；The input terminal of the Buffer buffer circuits 36 electrically connects with the described 4th switch K4 one end, The other end of the 4th switch K4 is used as the second input terminal of the sampling hold circuit 33, with the sampling compensation circuit 34 one end electrical connection.
As shown in figure 3, the low pass filter 32 includes LPF resistance Rf and LPF electric capacity Cf, the low pass The output end that filter resistance Rf one end is used as the input and the sampling hold circuit 33 of the low pass filter 32 is electrically connected Connect；The other end of the LPF resistance Rf is used as the output end of the low pass filter 32, and electric with the LPF Hold Cf one end electrical connection, the other end ground connection of the LPF electric capacity Cf.
In the embodiment of Buck converter load current detection circuits as shown in Figure 3, in addition to for feedback current electricity Press signal and the error amplifier 38 of reference voltage contrast computing, first input end and the ginseng of the error amplifier 38 Examine the lead-out terminal electrical connection of voltage generation circuit 90；Second input terminal of the error amplifier 38 and the LPF The lead-out terminal electrical connection of device 32.The error amplifier 38 can be integrated in one in the CC/CV error amplifiers 50 Individual part.
In the embodiment of Buck converter load current detection circuits as shown in Figure 3, in addition to reference voltage produces electricity Road 90, the generating circuit from reference voltage 90 include current source Iref and reference voltage circuit resistance RL；The current source Iref Positive pole and portion input voltage source VIN electrical connections, the current source Iref negative poles be used as the generating circuit from reference voltage 90 Lead-out terminal；The one end of the current source Iref negative poles also with the reference voltage circuit resistance RL electrically connects, described with reference to electricity Volt circuit resistance RL other end ground connection.The generating circuit from reference voltage 90 produces reference voltage signal REFL.
As shown in figure 3, the electrode input end of the error amplifier 38 is that first input end connects reference voltage signal REFL, the negative input of the error amplifier 38 connect the output signal Vsen_FB of low pass filter, the error amplifier 38 output signal is VCL, is that the error for characterizing feedback voltage V sen_FB and reference voltage REFL corresponding to load current exports Signal；Piece external inductance L1 one end is used as output voltage VO UT output voltage terminals, piece external inductance L1 other end output table The voltage signal of inductive current size is levied, electric capacity C8 one end electrically connects with piece external inductance L1 output voltage terminals VOUT, Electric capacity C8 other end ground connection.
In signal timing diagram as shown in Figure 4, IL is the current signal timing diagram on piece external inductance L1, and what Io was represented is defeated Go out load current, Vin is the external input voltage of external voltage source VIN accesses, and the drain electrode that Vs is the current sample pipe Q3 is electric Press signal；Vsp is the voltage signal at the ungrounded ends of internal sample resistance Rs；Vp is the electricity at sampling holding capacitor Cp ungrounded end Signal is pressed, Vsen_FB is the output signal of low pass filter.
As shown in figure 4, when the Buck translation circuits for applying this Buck converter load current detection circuits work in CCM moulds During formula, i.e. continuous operation mode, include two working conditions within the work period that the cycle is T:
First working condition is Phase1：In 0 ~ DT times, high-order PMOS Q1 is opened, and low level NMOS tube is the 2nd Buck outputs Power tube Q2 is closed, now because the first Buck power output pipes Q1 is that high-order PMOS is opened, the piece external inductance L1 other end The voltage instantaneous of output is pulled to（VIN-IL×RdQ1）, wherein, VIN is an externally input voltage, and IL is inductive current, and RdQ1 is The equivalent resistance of high-order PMOS Q1 conducting state；Now inductive current rises, and its rate of rise is（VIN-VOUT）/ L1, Wherein VIN is an externally input voltage, and VOUT is output voltage, and L1 is the equivalent inductance value of inductance.In this condition, inductive current The path that flows through be from the inflow of high-order PMOS Q1 source electrode, flowed out from high-order PMOS Q1 drain electrode, flow into inductance L1 and electricity Hold C8 and form current loop.Wherein DT closes for high-order PMOS Q1, at the time of low level NMOS tube Q2 is opened;
Second working condition is Phase2：DT ~ T time cycle, high-order PMOS Q1 are closed, and low level NMOS tube Q2 is opened, now, Because Q1 is closed, inductance plays the role of to maintain electric current, and therefore, the path that flows through of inductive current is changed into from external capacitive C8 inflows Low level NMOS tube Q2 source electrode, inductance L1 is flowed into from low level NMOS tube Q2 drain electrode, then flow back to electric capacity C8 from inductance and form electric current Loop;In this condition, inductive current declines, and inductive current descending slope is VOUT/L1, and wherein VIN is an externally input voltage, VOUT is output voltage, and L1 is the equivalent inductance value of inductance.
As shown in figure 4, when current sampling circuit is in the first working condition Phase1 of sampling phase cycling, it is now high-order PMOS Q1 is opened, and metal-oxide-semiconductor Q3 is sampled by current sample pipe Q3 and carries out current sample, switch K1 closures, and switch K2 is opened, Now current sample operational amplifier 37 is that the effect of OPA operational amplifiers is to ensure the drain voltage of the current sample pipe Q3 Signal Vs is equal to the voltage of inductance and the tie point LX of high-order PMOS Q1 drain electrodes, because high-order PMOS Q1 drain electrode and electric current Sampling pipe Q3 drain potential Vs is consistent, thus current sample pipe Q3 sample electric current Isen=（1/K）× IL, wherein IL are Inductive current, K are the multiplication factor for the current mirror that current sample pipe Q3 and high-order PMOS Q1 is formed, or can be that electric current is adopted The ratio of sample pipe Q3 and high-order PMOS Q1 conducting resistance；Therefore, the pressure drop on sampling resistor Rs internally be Vsp=（1/K） × IL × Rs, now, switch K3 closures, the switch K3 closures of sampling hold circuit, current potential on electric capacity Cp also for Vsp=（1/K） × IL × Rs, as inductive current rises, the voltage sampled also synchronously rises.Assuming that output current is Io；Inductive current Ripple is：（(Vin-Vout)/L) × DT, wherein D=Vout/Vin；Then the low spot of inductive current is：Io-（(Vin-Vout)/L) ×DT；The equivalent inductive current low potential at Vsp：Vsp=（1/K）×Rs×（Io-（(Vin-Vout)/L)×DT）；Inductance Electric current high point is：Io+（(Vin-Vout)/L)×DT；The equivalent inductive current high point at Vsp is：Vsp=（1/K）×Rs× （Io+（(Vin-Vout)/L)×DT）.
When flowing phase cycling of the sample circuit in the second working condition Phase2 of sampling, high-order PMOS Q1 is closed, electricity Inducing current declines, and now current sample does not sample the electric current of inductance directly, but opens switch K3, allows Cp to keep high-order PMOS Pipe Q1 closes the sampled voltage of that time, further according to the decrease speed of the inductive current of prediction, is introduced by sampling compensation circuit Electric current is compensated equivalent to compensating current element I1 is introduced, electric capacity Cp is slowly discharged in DT ~ T time, simulaed inductance electric current declines Process, if simulation decline process, compensation electric current should be：I1=Cp×Rs×(Vin-Vout)×D×T/(K×L1 ×(1-D)T)=Cp×Rs×Vout/K。
As can be seen from the above equation, it is necessary to compensation electric current be only Vout linear functional relation, this is to hold very much in circuit Easily realize.So as to current potential on Vp and inductive current Complete Synchronization, by the buffering Buffer in sampling hold circuit and low After bandpass filter 32, the average voltage for obtaining Vp is that Vsen_FB, this voltage Vsen_FB and output current Io are also linearly to close System, can be very good simulation output load current.
As shown in figure 4, it is the working waveform figure under CCM of the present invention i.e. continuous operation mode.First working condition is Phase1, switching tube Q1 are opened, and inductive current is put centered on Io to be risen, and corresponds to Vs electricity of the waveform with circuit node LX immediately Corrugating, corresponding Vsp signals synchronously rise, until power tube Q1 is closed, K3 switches are opened, and the current potential on electric capacity Cp is kept, In the presence of current compensation electric current I1, simulaed inductance electric current decline it is corresponding decline, such as scheme Vp signals, by low-frequency filter it Afterwards, the Vsen_FB signals needed；If without current compensation electric current I1 presence, voltage Vp waveform will be shade Area also to count in, it is average after voltage Vsen_FB will become big, i.e., sampled voltage can become big, and actual detecting is negative Electric current meeting step-down is carried, a little error can be introduced, but it is not very high situation to testing requirements to go for.
As shown in figure 5, it is the sampling compensation circuit implementation legend of the present invention.The sampling compensation circuit 34 includes the first electricity Hinder R1, second resistance R2 and 3rd resistor R3, compensation amplifier 345, the 5th metal-oxide-semiconductor Q5, the 6th metal-oxide-semiconductor Q6 and the 7th metal-oxide-semiconductor Q7；One end of the first resistor R1 electrically connects with output voltage VO UT lead-out terminal, as the sampling compensation circuit 34 Input terminal；The other end of the first resistor R1 electrically connects with the negative input of the compensation amplifier 345；Described Two resistance R2 one end electrically connects with the negative input of the compensation amplifier 345；Another termination of the second resistance R2 Ground；One end of the 3rd resistor R3 electrically connects with output voltage VO UT lead-out terminal；The other end of the 3rd resistor R3 Electrically connected with the electrode input end of the compensation amplifier 345；The electrode input end of the compensation amplifier 345 is also with described the Five metal-oxide-semiconductor Q5 source electrode electrical connection；The output end electrical connection of the grid of the 5th metal-oxide-semiconductor Q5 and the compensation amplifier 345； The drain electrode of the 5th metal-oxide-semiconductor Q5 and the drain electrode of the 6th metal-oxide-semiconductor Q6 electrically connect；The source electrode of the 6th metal-oxide-semiconductor Q6 and institute State the 7th metal-oxide-semiconductor Q7 source electrode electrical connection；The grid electrical connection of the grid and the 7th metal-oxide-semiconductor Q7 of the 6th metal-oxide-semiconductor Q6； The 6th metal-oxide-semiconductor Q6 and the 6th metal-oxide-semiconductor Q6 composition current mirrors；The drain electrode of the 7th metal-oxide-semiconductor Q7 is used as sampling and compensated The lead-out terminal of circuit, electric current is compensated for exporting.
The partial pressure that the voltage of the negative input of operational amplifier as shown in Figure 5 is output voltage VO UT, then passes through fortune To put, resistance R3, metal-oxide-semiconductor Q5 generation compensation electric current, the size for compensating electric current is I1=Vout × R1/ (Rs × (R1+R2)), according to Formula above-mentioned, therefore Cp/K=R1/ (Rs × Rs × (R1+R2)) can be drawn, thus formula is known that setting is reasonable Sensitivity can be compensated electric current, draw the analog waveform under freewheeling cycle, the precision of increase inductive current detection.
As shown in fig. 6, it is amplifier in a kind of Buck load current high precision test circuits without sampling resistor of the invention OPA specific embodiment.Embodiment is in order to reduce the biasing of amplifier i.e. offset, using chop copped wave structures, because adopting Sample signal is the high level of comparison, therefore input uses NMOS types to pipe, and current source Ir, Q12, Q13, Q14, Q15 are constituted Mirror current source, there is provided the image current required for OPA, work as control signalFor high level when, Q10 connects amplifier OPA anode INP is inputted, Q11 meets amplifier OPA negative sense input, Q16 connection Q14, Q17 connections Q15, it is assumed that equivalent to arrive to input to the inclined of pipe It is Vos to put offset, as amplifier OPA positive pole input signal INP=amplifier OPA negative pole input signal INN, OUT terminal output Electric current：Iout=gm10 × Vos, wherein gm10 are that Q10 mutual conductance, Vos are due to process deviation, it is equivalent to input to the inclined of pipe Shift error voltage；WhenFor low level or zero level when, reverse input end INN, Q11 that Q10 meets amplifier OPA connect amplifier OPA's Positive input INP, Q16 meet Q15, and Q17 meets Q14, then when amplifier OPA positive pole input signal INP=amplifier OPA negative pole is defeated When entering signal INN, OUT terminal output current：Iout=- gm10 × Vos, wherein gm10 are Q10 mutual conductances, and Vos is due to that technique is inclined Difference, the equivalent offset error voltage to input to pipe；Therefore,When=1, nowIt is logic high 1, amplifier output is electric Flow for gm10 × Vos,When=0, nowIt is logic low 0, amplifier output current is-gm10 × Vos, each other just Negative, after the RC filtering of outside, 2 signals positive and negative each other can be the equivalent offset error voltage to input to pipe Error counteracting falls caused by Vos, so as to improve accuracy of detection.
Technical scheme, the Buck converter loads current detection circuit without external sampling resistance include electric current Sampling pipe Q3, current sampling circuit 31, sampling hold circuit 33 and low pass filter 32；Led in the first Buck power output pipes Q1 When logical, Buck converter loads current detection circuit obtains first using current sample pipe Q3 and the sampling of current sampling circuit 31 Buck power output pipes Q1 conducting electric current；When the first Buck power output pipes Q1 is closed, the He of sampling hold circuit 33 is utilized Low pass filter produces fed-back current signals, external loading current feedback signal is simulated, to control the output of Buck converters Electric current.The present invention simplifies the design of peripheral circuit, reduces energy loss, improve whole efficiency, adopt without external sampling resistance It can be realized with suitable physical circuit and use identical precision with outside, realize high-accuracy and constant current charge.
Compared with prior art, its advantage is the present invention：1st, extra external sampling resistance is not needed, it is not necessary to volume Outer increase pin, simplify periphery；2. reducing the energy loss caused by sampling resistor, whole efficiency is improved；3. pass through electricity Inducing current anticipator circuit, simulaed inductance current sampling signal, simplify sample circuit, improve sampling precision；4. sample amplifier to use Chop copped wave structures, reduce sampling imbalance, further improve sampling precision.
Separately it should be noted that, for convenience, the electronic component such as NMOS tube, NMOS tube, resistance, electric capacity all employs The serial number such as first, second, these serial numbers do not represent its position or restriction sequentially, are intended merely to description side Just.Embodiments of the invention are the foregoing is only, are not intended to limit the scope of the invention, it is every to utilize description of the invention And the equivalent structure made of accompanying drawing content or equivalent flow conversion, or other related technical areas are directly or indirectly used in, It is included within the scope of the present invention.

Claims (10)

  1. A kind of 1. Buck converter load current detection circuits without external sampling resistance, it is characterised in that including：
    For the Buck power output pipes of mirror image the first（Q1）The current sample pipe of electric current（Q3）, for sampling from the current sample Pipe（Q3）The current sampling circuit for the output current that drains（31）, the first Buck power output pipes are kept for sampling（Q1）During closing Carve the sampling hold circuit of peak point current（33）With the LPF for sampling hold circuit output voltage signal LPF Device（32）；
    The current sample pipe（Q3）Source electrode and external input voltage source（VIN）Electrical connection, the current sample pipe（Q3）'s Grounded-grid, the current sample pipe（Q3）Drain electrode and the current sampling circuit（31）First input end electrical connection； The current sampling circuit（31）The second input terminal and external input voltage source（VIN）Electrical connection；The current sample electricity Road（31）The 3rd input terminal and the first Buck power output pipes（Q1）Drain electrode electrical connection；
    The current sampling circuit（31）Lead-out terminal and the sampling hold circuit（33）First input end electrical connection, The current sampling circuit（31）Lead-out terminal and internal current sampling resistor（Rs）One end electrical connection, the internal current Sampling resistor（Rs）The other end ground connection；
    The sampling hold circuit（33）Lead-out terminal and the low pass filter（32）Input terminal electrical connection, it is described low Bandpass filter（32）The load current that the output signal of lead-out terminal is used as the output of Buck converter loads current detection circuit is adopted Sample signal.
  2. 2. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 1 In,
    The current sampling circuit（31）, including for from the current sample pipe（Q3）Obtain the 4th PMOS of sample rate current （Q4）, for sampling the first Buck power output pipes（Q1）The current sample operational amplifier of drain voltage signal（37）, it is used for The first switch of input signal control（K1）And second switch（K2）；The first switch（K1）Receive the first control signal（ ）Control, the second switch（K2）Receive the non-signal of the first control signal（）Control；
    The current sample operational amplifier（37）First input end and the first switch（K1）One end electrical connection；It is described First switch（K1）The other end and the first Buck power output pipes（Q1）Drain electrode electrical connection；The current sample operation amplifier Device（37）First input end and the second switch（K2）One end electrical connection；The second switch（K2）The other end with it is outer Portion's input voltage source（VIN）Electrical connection；
    4th PMOS（Q4）Source electrode be used as the current sampling circuit（31）Input terminal and adopted with the electric current Sample pipe（Q3）Drain electrode electrical connection, the 4th PMOS（Q4）Grid and the current sample operational amplifier（37）It is defeated Go out terminal electrical connection, the current sample operational amplifier（37）The second input terminal and the 4th PMOS（Q4）Source Pole electrically connects, the 4th PMOS（Q4）Drain electrode be used as the current sampling circuit（31）Lead-out terminal.
  3. 3. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 1 In,
    The sampling hold circuit（33）, including the sampling holding capacitor kept for applied signal voltage（Cp）, for inputting The Buffer buffer circuits of signal buffering（36）, the 3rd switch for the control of sampling hold circuit input signal（K3）；The Three switches（K3）Receive the first control signal（）Control；
    The Buffer buffer circuits（36）Input terminal and the sampling holding capacitor（Cp）One end electrical connection, it is described Sample holding capacitor（Cp）The other end ground connection；The Buffer buffer circuits（36）Input terminal with the described 3rd switch （K3）One end electrical connection, it is described 3rd switch（K3）The other end be used as the sampling hold circuit（33）First input end Son, with the internal current sampling resistor（Rs）Ungrounded end electrical connection；
    The Buffer buffer circuits（36）Lead-out terminal be used as the sampling hold circuit（33）Lead-out terminal.
  4. 4. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 1 In,
    The low pass filter（32）Including LPF resistance（Rf）With LPF electric capacity（Cf）, the LPF resistance （Rf）One end be used as the low pass filter（32）Input and the sampling hold circuit（33）Output end electrical connection； The LPF resistance（Rf）The other end be used as the low pass filter（32）Output end, and with the LPF electricity Hold（Cf）One end electrical connection, the LPF electric capacity（Cf）The other end ground connection；
    The Buck converter loads current detection circuit also includes generating circuit from reference voltage（90）, the reference voltage generation Circuit（90）Including current source（Iref）With reference voltage circuit resistance（RL）；The current source（Iref）Positive pole and outside it is defeated Enter voltage source（VIN）Electrical connection, the current source（Iref）Negative pole is used as the generating circuit from reference voltage（90）Output end Son；The current source（Iref）Negative pole also with the reference voltage circuit resistance（RL）One end electrical connection, the reference voltage Circuitous resistance（RL）The other end ground connection；
    The Buck converter loads current detection circuit is also included for feedback current voltage signal and reference voltage contrast fortune The error amplifier of calculation（38）, the error amplifier（38）First input end and the generating circuit from reference voltage（90） Lead-out terminal electrical connection；The error amplifier（38）The second input terminal and the low pass filter（32）Output end Son electrical connection.
  5. 5. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 2 In,
    The current sample operational amplifier（37）Chopper-type operational amplifier, low error amplifier including automatic zero set With automatic zero set operational amplifier.
  6. 6. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 1 In,
    Also include being used in the first Buck power output pipes（Q1）Close, the 2nd Buck power output pipes（Q2）In ON time section Detect output voltage and the sampling compensation circuit of compensation electric current is obtained by output voltage（34）；
    The sampling hold circuit（33）Also include the second input terminal, the sampling hold circuit（33）The second input terminal With the sampling compensation circuit（34）Lead-out terminal electrical connection；The sampling compensation circuit（34）Input terminal be used for defeated Go out voltage to electrically connect to the output voltage terminals of outside.
  7. 7. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 6 In,
    The sampling hold circuit（33）, in addition to be used for and the sampling compensation circuit（34）4th switch of electrical connection （K4）；4th switch（K4）Receive the non-signal of the first control signal（）Control；
    4th switch（K4）One end be used as the sampling hold circuit（33）The second input terminal, with it is described sampling mend Repay circuit（34）One end electrical connection；Pass through the non-signal of the first control signal（）Control from the sampling hold circuit （33）The signal of second input terminal input；4th switch（K4）The other end and the Buffer buffer circuits（36） Input terminal electrical connection.
  8. 8. the Buck converter load current detection circuits without external sampling resistance, its feature exist according to claim 6 In,
    The sampling compensation circuit（34）Including first resistor（R1）, second resistance（R2）And 3rd resistor（R3）, compensation amplification Device（345）, the 5th metal-oxide-semiconductor（Q5）, the 6th metal-oxide-semiconductor（Q6）With the 7th metal-oxide-semiconductor（Q7）；
    The first resistor（R1）One end and output voltage（VOUT）Lead-out terminal electrical connection, as it is described sampling compensation electricity Road（34）Input terminal；The first resistor（R1）The other end and the compensation amplifier（345）Negative input electricity Connection；The second resistance（R2）One end and the compensation amplifier（345）Negative input electrical connection；Second electricity Resistance（R2）The other end ground connection；
    The 3rd resistor（R3）One end and output voltage（VOUT）Lead-out terminal electrical connection；The 3rd resistor（R3）'s The other end and the compensation amplifier（345）Electrode input end electrical connection；The compensation amplifier（345）Electrode input end Also with the 5th metal-oxide-semiconductor（Q5）Source electrode electrical connection；5th metal-oxide-semiconductor（Q5）Grid and the compensation amplifier （345）Output end electrical connection；5th metal-oxide-semiconductor（Q5）Drain electrode and the 6th metal-oxide-semiconductor（Q6）Drain electrode electrical connection；Institute State the 6th metal-oxide-semiconductor（Q6）Source electrode and the 7th metal-oxide-semiconductor（Q7）Source electrode electrical connection；6th metal-oxide-semiconductor（Q6）Grid With the 7th metal-oxide-semiconductor（Q7）Grid electrical connection；6th metal-oxide-semiconductor（Q6）With the 6th metal-oxide-semiconductor（Q6）Form electric current Mirror；7th metal-oxide-semiconductor（Q7）Drain electrode be used as sampling compensation circuit lead-out terminal, for export compensate electric current.
  9. 9. a kind of Buck converter loads electric current based on described in claim 1 to 5 any one without external sampling resistance is examined The Buck load current detection methods of slowdown monitoring circuit, including：
    Step 1：The current sample pipe（Q3）With the first Buck power output pipes in Buck voltage conversion circuits（Q1）Formed Mirror image is to pipe, in the first Buck power output pipes（Q1）Conducting, the 2nd Buck power output pipes（Q2）During closing, the electric current is adopted Sample pipe（Q3）Collection obtains the first Buck power output pipes（Q1）Conducting electric current be load current；
    Step 2：In the first Buck power output pipes（Q1）When being switched to closed mode from conducting state, the sampling hold circuit （33）Obtain the current sample pipe（Q3）The voltage at current time, and pass through the sampling hold circuit（33）With the low pass Wave filter（32）The first Buck power output pipes of common simulation（Q1）Close, the 2nd Buck power output pipes（Q2）It is continuous during conducting It is load current to flow electric current.
  10. 10. a kind of Buck converter loads electric current based on described in claim 6 to 8 any one without external sampling resistance is examined The Buck load current detection methods of slowdown monitoring circuit, including：
    Step 1：The current sample pipe（Q3）With the first Buck power output pipes in Buck voltage conversion circuits（Q1）Formed Mirror image is to pipe, in the first Buck power output pipes（Q1）Conducting, the 2nd Buck power output pipes（Q2）During closing, the electric current is adopted Sample pipe（Q3）Collection obtains the first Buck power output pipes（Q1）Conducting electric current be load current；
    Step 2：In the first Buck power output pipes（Q1）When being switched to closed mode from conducting state, the sampling hold circuit （33）Obtain the current sample pipe（Q3）The voltage at current time, and pass through the sampling hold circuit（33）With the low pass Wave filter（32）The first Buck power output pipes of common simulation（Q1）Close, the 2nd Buck power output pipes（Q2）It is continuous during conducting It is load current to flow electric current；
    Comprise the following steps 3 in the step 2：In the first Buck power output pipes（Q1）Close, the 2nd Buck power outputs Pipe（Q2）During conducting, the sampling compensation circuit（34）Detect the output voltage of Buck circuits and mended by output voltage Electric current is repaid, for compensating the 2nd Buck power output pipes（Q2）Freewheel current during conducting so that freewheel current is closer to truly Load current.
CN201710272315.5A 2017-04-24 2017-04-24 Buck load current detection circuit and method without external sampling resistor Active CN107659151B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710272315.5A CN107659151B (en) 2017-04-24 2017-04-24 Buck load current detection circuit and method without external sampling resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710272315.5A CN107659151B (en) 2017-04-24 2017-04-24 Buck load current detection circuit and method without external sampling resistor

Publications (2)

Publication Number Publication Date
CN107659151A true CN107659151A (en) 2018-02-02
CN107659151B CN107659151B (en) 2023-07-07

Family

ID=61126708

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710272315.5A Active CN107659151B (en) 2017-04-24 2017-04-24 Buck load current detection circuit and method without external sampling resistor

Country Status (1)

Country Link
CN (1) CN107659151B (en)

Cited By (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108683329A (en) * 2018-06-14 2018-10-19 聚辰半导体(上海)有限公司 A kind of load current real-time detection system
CN110045173A (en) * 2019-05-24 2019-07-23 杭州科工电子科技有限公司 A kind of bidirectional current detection circuit
WO2020061728A1 (en) * 2018-09-25 2020-04-02 深圳市华芯邦科技有限公司 Circuit and method for detecting load current on switching power supply converter
CN111130346A (en) * 2018-11-01 2020-05-08 财团法人成大研究发展基金会 DC converter and digital fixed on-time controller
CN111122946A (en) * 2020-01-06 2020-05-08 科博达技术股份有限公司 Current sampling circuit for inductive load driving circuit
CN111208337A (en) * 2020-01-10 2020-05-29 南京能瑞自动化设备股份有限公司 Current sampling circuit and current detection system
CN111416519A (en) * 2020-05-07 2020-07-14 矽力杰半导体技术(杭州)有限公司 Inductive current reconstruction circuit, reconstruction method and power converter applying inductive current reconstruction circuit and reconstruction method
CN111740598A (en) * 2020-07-02 2020-10-02 重庆邮电大学 Low-power-consumption load current detection circuit applied to PWM DC-DC converter
CN111999545A (en) * 2020-08-14 2020-11-27 Oppo广东移动通信有限公司 Current measurement method, power supply device and power supply chip
CN112710886A (en) * 2020-12-02 2021-04-27 江苏应能微电子有限公司 Current sampling circuit
CN112787482A (en) * 2019-11-05 2021-05-11 晶豪科技股份有限公司 Transient enhancement circuit and constant on-time converter using the same
CN112987840A (en) * 2019-12-16 2021-06-18 长鑫存储技术有限公司 Voltage generating circuit
CN113485502A (en) * 2021-06-29 2021-10-08 昂宝电子（上海）有限公司 Constant current control chip, power system and constant current control method
CN113625034A (en) * 2021-07-19 2021-11-09 北京知存科技有限公司 Sampling circuit, sampling array, integrated storage and calculation chip and electronic equipment
CN113702790A (en) * 2020-05-23 2021-11-26 圣邦微电子（北京）股份有限公司 Current detection circuit in high-voltage application
CN113933671A (en) * 2021-09-01 2022-01-14 郑州嘉晨电器有限公司 MOS device temperature detection device
CN114487544A (en) * 2021-12-30 2022-05-13 西安拓尔微电子股份有限公司 Current detection circuit and load driving device
CN115184663A (en) * 2022-08-17 2022-10-14 上海紫鹰微电子有限公司 Bidirectional high-precision NMOS power tube current sampling circuit and method
CN116827087A (en) * 2023-07-14 2023-09-29 江苏展芯半导体技术有限公司 Switching power supply current estimation method applied to DCM/BCM mode
WO2023226997A1 (en) * 2022-05-24 2023-11-30 上海沛塬电子有限公司 High-precision current measurement method and chip module therefor
EP4312034A1 (en) * 2022-07-26 2024-01-31 NXP USA, Inc. Dual current sensing
CN117767754A (en) * 2024-02-19 2024-03-26 成都芯正微电子科技有限公司 Bipolar device Buck output Positive and negative adjustable current circuit

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100033146A1 (en) * 2008-08-07 2010-02-11 Asic Advantage Inc. Current sensing for high voltage buck converter
US20100052637A1 (en) * 2008-08-27 2010-03-04 Vincent Lorentz Apparatus and Method for Sensing a Current Within a Coil
CN103280971A (en) * 2013-05-28 2013-09-04 成都芯源系统有限公司 Buck-boost converter and controller and control method thereof
US20140049239A1 (en) * 2012-08-17 2014-02-20 St-Ericsson Sa Current-Mode Controller for Step-Down (Buck) Converter
CN103701321A (en) * 2014-01-03 2014-04-02 东南大学 Synchronous rectification DC-DC (Direct Current) converter with rapid transient response buck
CN104377945A (en) * 2014-11-21 2015-02-25 成都芯源系统有限公司 Reference signal generating circuit and method thereof
CN104937847A (en) * 2012-11-15 2015-09-23 密克罗奇普技术公司 Slope compensation module
CN106329892A (en) * 2015-07-09 2017-01-11 无锡矽瑞微电子股份有限公司 Constant current control method based on product of detection voltage and breakover time
CN106329924A (en) * 2016-05-30 2017-01-11 武汉新芯集成电路制造有限公司 System for improving load transient response performance

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100033146A1 (en) * 2008-08-07 2010-02-11 Asic Advantage Inc. Current sensing for high voltage buck converter
US20100052637A1 (en) * 2008-08-27 2010-03-04 Vincent Lorentz Apparatus and Method for Sensing a Current Within a Coil
US20140049239A1 (en) * 2012-08-17 2014-02-20 St-Ericsson Sa Current-Mode Controller for Step-Down (Buck) Converter
CN104937847A (en) * 2012-11-15 2015-09-23 密克罗奇普技术公司 Slope compensation module
CN103280971A (en) * 2013-05-28 2013-09-04 成都芯源系统有限公司 Buck-boost converter and controller and control method thereof
CN103701321A (en) * 2014-01-03 2014-04-02 东南大学 Synchronous rectification DC-DC (Direct Current) converter with rapid transient response buck
CN104377945A (en) * 2014-11-21 2015-02-25 成都芯源系统有限公司 Reference signal generating circuit and method thereof
CN106329892A (en) * 2015-07-09 2017-01-11 无锡矽瑞微电子股份有限公司 Constant current control method based on product of detection voltage and breakover time
CN106329924A (en) * 2016-05-30 2017-01-11 武汉新芯集成电路制造有限公司 System for improving load transient response performance

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
李彬;段哲民;黄劲松;: "电流模式BUCK型驱动电路斜率补偿研究" *
黄林秀;欧雪春;周泽坤;明鑫;张波;: "一种新型高精度斜坡补偿电路" *

Cited By (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108683329A (en) * 2018-06-14 2018-10-19 聚辰半导体(上海)有限公司 A kind of load current real-time detection system
WO2020061728A1 (en) * 2018-09-25 2020-04-02 深圳市华芯邦科技有限公司 Circuit and method for detecting load current on switching power supply converter
CN111130346A (en) * 2018-11-01 2020-05-08 财团法人成大研究发展基金会 DC converter and digital fixed on-time controller
CN110045173A (en) * 2019-05-24 2019-07-23 杭州科工电子科技有限公司 A kind of bidirectional current detection circuit
CN110045173B (en) * 2019-05-24 2024-02-06 杭州科工电子科技股份有限公司 Bidirectional current detection circuit
CN112787482A (en) * 2019-11-05 2021-05-11 晶豪科技股份有限公司 Transient enhancement circuit and constant on-time converter using the same
CN112987840A (en) * 2019-12-16 2021-06-18 长鑫存储技术有限公司 Voltage generating circuit
CN111122946A (en) * 2020-01-06 2020-05-08 科博达技术股份有限公司 Current sampling circuit for inductive load driving circuit
CN111208337A (en) * 2020-01-10 2020-05-29 南京能瑞自动化设备股份有限公司 Current sampling circuit and current detection system
CN111416519A (en) * 2020-05-07 2020-07-14 矽力杰半导体技术(杭州)有限公司 Inductive current reconstruction circuit, reconstruction method and power converter applying inductive current reconstruction circuit and reconstruction method
CN113702790B (en) * 2020-05-23 2023-10-13 圣邦微电子（北京）股份有限公司 Current detection circuit in high voltage application
CN113702790A (en) * 2020-05-23 2021-11-26 圣邦微电子（北京）股份有限公司 Current detection circuit in high-voltage application
CN111740598A (en) * 2020-07-02 2020-10-02 重庆邮电大学 Low-power-consumption load current detection circuit applied to PWM DC-DC converter
CN111999545B (en) * 2020-08-14 2023-03-21 Oppo广东移动通信有限公司 Current measurement method, power supply device and power supply chip
CN111999545A (en) * 2020-08-14 2020-11-27 Oppo广东移动通信有限公司 Current measurement method, power supply device and power supply chip
CN112710886A (en) * 2020-12-02 2021-04-27 江苏应能微电子有限公司 Current sampling circuit
CN113485502A (en) * 2021-06-29 2021-10-08 昂宝电子（上海）有限公司 Constant current control chip, power system and constant current control method
TWI817253B (en) * 2021-06-29 2023-10-01 大陸商昂寶電子（上海）有限公司 Constant current control chip, power system and constant current control method
CN113625034A (en) * 2021-07-19 2021-11-09 北京知存科技有限公司 Sampling circuit, sampling array, integrated storage and calculation chip and electronic equipment
CN113625034B (en) * 2021-07-19 2024-05-24 杭州知存算力科技有限公司 Sampling circuit, sampling array, integrated memory chip and electronic equipment
CN113933671A (en) * 2021-09-01 2022-01-14 郑州嘉晨电器有限公司 MOS device temperature detection device
CN114487544A (en) * 2021-12-30 2022-05-13 西安拓尔微电子股份有限公司 Current detection circuit and load driving device
WO2023226997A1 (en) * 2022-05-24 2023-11-30 上海沛塬电子有限公司 High-precision current measurement method and chip module therefor
EP4312034A1 (en) * 2022-07-26 2024-01-31 NXP USA, Inc. Dual current sensing
US12055568B2 (en) 2022-07-26 2024-08-06 Nxp Usa, Inc. Dual current sensing
CN115184663A (en) * 2022-08-17 2022-10-14 上海紫鹰微电子有限公司 Bidirectional high-precision NMOS power tube current sampling circuit and method
CN116827087A (en) * 2023-07-14 2023-09-29 江苏展芯半导体技术有限公司 Switching power supply current estimation method applied to DCM/BCM mode
CN116827087B (en) * 2023-07-14 2024-02-09 江苏展芯半导体技术股份有限公司 Switching power supply current estimation method applied to DCM/BCM mode
CN117767754A (en) * 2024-02-19 2024-03-26 成都芯正微电子科技有限公司 Bipolar device Buck output Positive and negative adjustable current circuit
CN117767754B (en) * 2024-02-19 2024-05-10 成都芯正微电子科技有限公司 Bipolar Buck output positive and negative adjustable current circuit

Also Published As

Publication number Publication date
CN107659151B (en) 2023-07-07

Similar Documents

Publication Publication Date Title
CN107659151A (en) Buck load current detection circuits and method without external sampling resistance
CN206962700U (en) Buck converter load current detection circuits without external sampling resistance
CN206788232U (en) Buck converter load current detection circuits with compensation circuit
CN106026653B (en) Buck-boost converter with slope compensation and controller and control method thereof
CN107656124A (en) Boost load current detection circuits and method without external sampling resistance
CN101789687B (en) Average current mode controller based on inductance current self-calibration lossless detection
CN105978337B (en) A kind of offset voltage based on COT control models eliminates circuit
WO2020061727A1 (en) Load current detection method and circuit for inductive switching power converter
CN209105014U (en) Inductive type switch power converter and its load current detection circuit
CN102969894B (en) Mode automatic converting circuit for DC-DC (Direct Current to Direct Current) converter
CN209134299U (en) Switch power converter and its load current detection circuit
CN107656123A (en) Buck load current detection circuits and method with compensation circuit
CN102694462A (en) Dc-dc converter control apparatus and dc-dc converter
CN110957894A (en) Load current detection method and circuit of inductive switching power converter
CN104426374B (en) Power conversion device and multiplication and division circuit
CN110943612A (en) Load current detection circuit and method for switching power supply converter
CN106849659B (en) The control method and control circuit of four switch Buck-Boost converters
CN206788231U (en) Boost converter load current detection circuits without external sampling resistance
CN107659150A (en) The direct current energy transform method and system that DCDC modules automatically switch
CN114977736B (en) Current detection circuit and controller for switching conversion circuit
CN111707858B (en) Input current sampling method for buck-boost converter
CN104716836A (en) Control circuit and method for switching power converter
CN106602878A (en) Buck-boost conversion device
CN208818756U (en) A kind of circuit improving STEP-DOWN load current detection precision
CN203722465U (en) Switch converter and control circuit thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant