CN107658374B - Epitaxial wafer of light emitting diode and preparation method thereof - Google Patents
Epitaxial wafer of light emitting diode and preparation method thereof Download PDFInfo
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- CN107658374B CN107658374B CN201710724777.6A CN201710724777A CN107658374B CN 107658374 B CN107658374 B CN 107658374B CN 201710724777 A CN201710724777 A CN 201710724777A CN 107658374 B CN107658374 B CN 107658374B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 121
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 118
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 98
- 239000011787 zinc oxide Substances 0.000 claims abstract description 49
- 239000002131 composite material Substances 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 230000004888 barrier function Effects 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 150000002902 organometallic compounds Chemical class 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 abstract description 13
- 239000010980 sapphire Substances 0.000 abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 10
- 239000013078 crystal Substances 0.000 abstract description 10
- 229910052710 silicon Inorganic materials 0.000 abstract description 10
- 239000010703 silicon Substances 0.000 abstract description 10
- 230000010287 polarization Effects 0.000 abstract description 6
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 229910052738 indium Inorganic materials 0.000 description 9
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 9
- 230000000903 blocking effect Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 3
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000000376 reactant Substances 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- HQWPLXHWEZZGKY-UHFFFAOYSA-N diethylzinc Chemical compound CC[Zn]CC HQWPLXHWEZZGKY-UHFFFAOYSA-N 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- -1 trimethyl ethyl Chemical group 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an epitaxial wafer of a light-emitting diode and a preparation method thereof, belonging to the technical field of semiconductors. The epitaxial wafer comprises a substrate, a buffer layer, an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer and a P-type gallium nitride layer, wherein the buffer layer, the N-type gallium nitride layer, the multi-quantum well layer, the electronic barrier layer and the P-type gallium nitride layer are sequentially stacked on the substrate. According to the invention, the composite layer is arranged between the buffer layer and the N-type gallium nitride layer and comprises the plurality of gallium nitride layers and the plurality of zinc oxide layers which are alternately stacked, so that dislocation and stress polarization extension caused by lattice mismatch between the sapphire or silicon substrate and the gallium nitride can be effectively controlled, the crystal quality of an epitaxial wafer is improved, a better crystal foundation is improved for the multi-quantum well layer, the internal quantum efficiency of the light-emitting diode is improved, and the light-emitting efficiency of the light-emitting diode is further improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an epitaxial wafer of a light-emitting diode and a preparation method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor Light Emitting device manufactured by using the PN junction electroluminescence principle of a semiconductor. The epitaxial wafer is a primary finished product in the preparation process of the light-emitting diode.
The conventional epitaxial wafer comprises a substrate, and a buffer layer, an undoped gallium nitride layer, an N-type gallium nitride layer, a multi-quantum well layer, an electron blocking layer and a P-type gallium nitride layer which are sequentially stacked on the substrate. The multiple quantum well layer comprises a plurality of quantum wells and a plurality of quantum barriers, the quantum wells and the quantum barriers are alternately stacked, the quantum wells are indium gallium nitride layers, and the quantum barriers are gallium nitride layers. When current is injected, electrons provided by the N-type gallium nitride layer and holes provided by the P-type gallium nitride layer are injected into the multi-quantum well layer to perform composite light emission.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
the substrate is usually made of sapphire or silicon, and because a large lattice mismatch (16.9%) exists between sapphire (or silicon) and gallium nitride, a gallium nitride layer grows on the sapphire substrate or the silicon substrate, the bottom of the gallium nitride layer has a large lattice mismatch, and dislocations and stress generated by the lattice mismatch extend along with the gallium nitride layer in the subsequent growth process, so that the crystal quality of an epitaxial wafer is poor, and the light emitting efficiency of the light emitting diode is affected.
Disclosure of Invention
In order to solve the problem of low light emitting efficiency of a light emitting diode in the prior art, the embodiment of the invention provides an epitaxial wafer of the light emitting diode and a preparation method thereof. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides an epitaxial wafer of a light emitting diode, where the epitaxial wafer includes a substrate, and a buffer layer, an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer, and a P-type gallium nitride layer that are sequentially stacked on the substrate, and the epitaxial wafer further includes a composite layer stacked between the buffer layer and the N-type gallium nitride layer, where the composite layer includes a plurality of gallium nitride layers and a plurality of zinc oxide layers, and the plurality of gallium nitride layers and the plurality of zinc oxide layers are alternately stacked.
Optionally, the thickness of each zinc oxide layer is 5nm to 100 nm.
Optionally, the thickness of each gallium nitride layer is 25nm to 300 nm.
Optionally, the composite layer has a thickness of 0.2 μm to 2 μm.
Optionally, the number of the plurality of zinc oxide layers is the same as the number of the plurality of gallium nitride layers, and the number of the plurality of gallium nitride layers is 5 to 50.
On the other hand, the embodiment of the invention provides a preparation method of an epitaxial wafer of a light emitting diode, which comprises the following steps:
growing a buffer layer on a substrate;
alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer to form a composite layer;
and sequentially growing an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer and a P-type gallium nitride layer on the composite layer.
Optionally, the alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer includes:
and growing the zinc oxide layer by adopting a metal organic compound chemical vapor deposition technology.
Preferably, the growth conditions of the zinc oxide layer are the same as those of the gallium nitride layer, and the growth conditions comprise growth temperature and growth pressure.
More preferably, the growth temperature of the composite layer is 1000 ℃ to 1100 ℃.
More preferably, the growth pressure of the composite layer is 100to 500 torr.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the composite layer is arranged between the buffer layer and the N-type gallium nitride layer and comprises a plurality of gallium nitride layers and a plurality of zinc oxide layers which are alternately stacked, only 1.9% of lattice mismatch exists between the zinc oxide layers and the gallium nitride layers, the zinc oxide layers and the gallium nitride layers are alternately stacked without further introducing lattice mismatch, meanwhile, the lattice constants of the zinc oxide layers and the gallium nitride layers are different, the zinc oxide layers and the gallium nitride layers are alternately stacked, dislocation and stress extension generated by lattice mismatch between the sapphire substrate and the silicon substrate can be blocked, dislocation and stress accumulation are relieved, dislocation defects and stress polarization are effectively controlled, the crystal quality of an epitaxial wafer is improved, a better crystal foundation is improved for a multi-quantum well layer, the internal quantum efficiency of the light-emitting diode is improved, and the light-emitting efficiency of the light-emitting diode is further improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an epitaxial wafer of a light emitting diode according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a composite layer according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to a second embodiment of the present invention;
fig. 4 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example one
An embodiment of the present invention provides an epitaxial wafer of a light emitting diode, and referring to fig. 1, the epitaxial wafer includes a substrate 1, and a buffer layer 2, a composite layer 3, an N-type gallium nitride layer 4, a multi-quantum well layer 5, an electron blocking layer 6, and a P-type gallium nitride layer 7, which are sequentially stacked on the substrate 1.
In the present embodiment, referring to fig. 2, the composite layer 3 includes a plurality of gallium nitride layers 31 and a plurality of zinc oxide layers 32, and the plurality of gallium nitride layers 31 and the plurality of zinc oxide layers 32 are alternately stacked.
In the embodiment of the invention, the composite layer is arranged between the buffer layer and the N-type gallium nitride layer and comprises a plurality of gallium nitride layers and a plurality of zinc oxide layers which are alternately stacked, the lattice mismatch between the zinc oxide layers and the gallium nitride layers is only 1.9 percent, the lattice mismatch is not further introduced by alternately stacking the zinc oxide layers and the gallium nitride layers, meanwhile, the lattice constants of the zinc oxide layer and the gallium nitride layer are different, a plurality of zinc oxide layers and a plurality of gallium nitride layers are alternately stacked, can block dislocation and stress extension generated by lattice mismatch between the sapphire substrate and the silicon substrate, relieve the accumulation of dislocation and stress, the dislocation defect and the stress polarization are effectively controlled, the crystal quality of the epitaxial wafer is improved, a better crystal foundation is improved for the multiple quantum well layer, the internal quantum efficiency of the light-emitting diode is improved, and the light-emitting efficiency of the light-emitting diode is further improved.
Alternatively, the thickness of each zinc oxide layer may be 5nm to 100 nm.
Alternatively, the thickness of each gallium nitride layer may be 25nm to 300 nm.
In a specific implementation, the thickness of the zinc oxide layer is smaller than that of the gallium nitride layer, so that the matching degree of the composite layer and the epitaxial wafer is better. Specifically, the thickness of the gallium nitride layer may be 3 to 5 times the thickness of the zinc oxide layer.
Alternatively, the composite layer may have a thickness of 0.2 μm to 2 μm. If the thickness of the composite layer is less than 0.2 μm, dislocation and stress polarization extension caused by lattice mismatch between the sapphire or silicon substrate and gallium nitride cannot be effectively controlled; if the thickness of the composite layer is greater than 2 μm, material is wasted.
Optionally, the number of the plurality of zinc oxide layers is the same as the number of the plurality of gallium nitride layers, and the number of the plurality of gallium nitride layers may be 5 to 50. If the number of the plurality of gallium nitride layers is less than 5, dislocation and stress polarization extension caused by lattice mismatch between the sapphire or silicon substrate and gallium nitride cannot be effectively controlled; if the number of the plurality of gallium nitride layers is greater than 50, the material is wasted.
Specifically, the substrate is a sapphire substrate or a silicon substrate. The buffer layer can be a gallium nitride layer or an aluminum nitride layer. The quantum well can be an indium gallium nitride layer, the quantum barrier can be a gallium nitride layer, and the quantum barrier can also be an aluminum gallium nitride layer. The electron blocking layer can be P-type doped AlyGa1-yN layer, y is more than 0.1 and less than 0.5.
Alternatively, the buffer layer may have a thickness of 15nm to 35 nm.
Alternatively, the thickness of the N-type gallium nitride layer may be 1 μm to 5 μm.
Alternatively, the doping concentration of the N-type dopant in the N-type gallium nitride layer may be 1018cm-3～1019cm-3。
Alternatively, the quantum well may have a thickness of 2nm to 3 nm.
Alternatively, the quantum barrier may have a thickness of 9nm to 20 nm.
Optionally, the number of layers of the quantum barrier is the same as that of the quantum well, and the number of layers of the quantum well may be 3-15.
Alternatively, the thickness of the electron blocking layer may be 50nm to 150 nm.
Alternatively, the thickness of the P-type gallium nitride layer may be 105nm to 500 nm.
Example two
The embodiment of the invention provides a preparation method of an epitaxial wafer of a light emitting diode, which is suitable for preparing the epitaxial wafer provided by the first embodiment, and referring to fig. 3, the preparation method comprises the following steps:
step 201: a buffer layer is grown on a substrate.
Specifically, the step 201 may include:
controlling the temperature to be 400-600 ℃ and the pressure to be 400-600 Torr, and growing a gallium nitride layer with the thickness of 15-35 nm on the sapphire substrate to form a buffer layer.
Optionally, before step 201, the preparation method may further include:
the temperature was controlled at 1100 deg.c, the substrate was annealed in a hydrogen atmosphere for 8 minutes, and a nitriding treatment was performed to clean the substrate.
Specifically, the substrate may be sapphire of [0001] crystal orientation.
Optionally, after step 201, the preparation method may further include:
controlling the temperature to be 1000-1200 ℃, the pressure to be 400-600 Torr and the duration to be 5-10 minutes, and carrying out in-situ annealing treatment on the buffer layer.
Step 202: and alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer to form a composite layer.
Specifically, growing the zinc oxide layer may include:
the zinc oxide layer is grown by using a Metal Organic Chemical Vapor Deposition (MOCVD) technique.
Specifically, growing the gallium nitride layer may include:
and growing a gallium nitride layer by using an MOCVD (metal organic chemical vapor deposition) technology.
In the specific implementation, the zinc oxide layer and the gallium nitride layer can be grown by the MOCVD technology, and the difference is only that reactants introduced during the growth of the zinc oxide layer are water and diethyl zinc, and reactants introduced during the growth of the gallium nitride layer are ammonia and trimethyl gallium.
Alternatively, the growth conditions of the zinc oxide layer may be the same as those of the gallium nitride layer, and the growth conditions include growth temperature and growth pressure. The growth conditions are the same, and the realization is simple and convenient.
Preferably, the growth temperature of the composite layer may be 1000 ℃ to 1100 ℃. The structure is the same as the undoped gallium nitride layer at the same position in the existing epitaxial wafer, and the realization is simple and convenient.
Preferably, the growth pressure of the composite layer may be 100to 500 torr. The structure is the same as the undoped gallium nitride layer at the same position in the existing epitaxial wafer, and the realization is simple and convenient.
Step 203: and sequentially growing an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer and a P-type gallium nitride layer on the composite layer.
Specifically, the step 203 may include:
controlling the temperature to 1000-1200 deg.C, the pressure to 100-500 torr, growing on the composite layer with the thickness of 1-5 μm and the doping concentration of 1018cm-3～1019cm-3An N-type gallium nitride layer of (a);
controlling the pressure to be 100-500 torr, and alternately growing an indium gallium nitride layer and a gallium nitride layer on the N-type gallium nitride layer, wherein the growth temperature of the indium gallium nitride layer is 720-829 ℃, the growth temperature of the gallium nitride layer is 850-959 ℃, and a multi-quantum well layer is formed;
controlling the temperature to be 850-1080 ℃ and the pressure to be 200-500 torr, and growing a P-type aluminum gallium nitride layer with the thickness of 50-150 nm on the multi-quantum well layer to form an electron barrier layer;
controlling the temperature to be 750-1080 ℃ and the pressure to be 200-500 torr, and growing a P-type gallium nitride layer with the thickness of 100-200 nm on the electron barrier layer;
controlling the temperature at 850-1050 ℃ and the pressure at 100-300 torr, and continuously growing the P-type gallium nitride layer with the thickness of 5-300 nm.
More specifically, the quantum well may have a thickness of 2nm to 3 nm; the thickness of the quantum barrier can be 9 nm-20 nm; the number of layers of the quantum barrier is the same as that of the quantum well, and the number of layers of the quantum well can be 3-15.
Optionally, after step 203, the preparation method may further include:
the temperature is controlled to be 650-850 ℃, the duration time is 5-15 minutes, and annealing treatment is carried out in nitrogen atmosphere.
In this embodiment, controlling both the temperature and the pressure means controlling the temperature and the pressure in the reaction chamber for growing the epitaxial wafer. During implementation, trimethyl gallium or trimethyl ethyl is used as a gallium source, high-purity nitrogen is used as a nitrogen source, trimethyl indium is used as an indium source, trimethyl aluminum is used as an aluminum source, silane is used as an N-type dopant, and magnesium diclocide is used as a P-type dopant.
In the embodiment of the invention, the composite layer is arranged between the buffer layer and the N-type gallium nitride layer and comprises a plurality of gallium nitride layers and a plurality of zinc oxide layers which are alternately stacked, the lattice mismatch between the zinc oxide layers and the gallium nitride layers is only 1.9 percent, the lattice mismatch is not further introduced by alternately stacking the zinc oxide layers and the gallium nitride layers, meanwhile, the lattice constants of the zinc oxide layer and the gallium nitride layer are different, a plurality of zinc oxide layers and a plurality of gallium nitride layers are alternately stacked, can block dislocation and stress extension generated by lattice mismatch between the sapphire substrate and the silicon substrate, relieve the accumulation of dislocation and stress, the dislocation defect and the stress polarization are effectively controlled, the crystal quality of the epitaxial wafer is improved, a better crystal foundation is improved for the multiple quantum well layer, the internal quantum efficiency of the light-emitting diode is improved, and the light-emitting efficiency of the light-emitting diode is further improved.
EXAMPLE III
The embodiment of the invention provides a preparation method of an epitaxial wafer of a light-emitting diode, which is a specific implementation of the preparation method provided in the second embodiment. Referring to fig. 4, the preparation method includes:
step 301: the temperature was controlled at 1100 ℃, and the substrate was annealed in a hydrogen atmosphere for 8 minutes and subjected to nitriding treatment.
Step 302: controlling the temperature at 500 ℃ and the pressure at 500Torr, and growing a gallium nitride layer with the thickness of 25nm on the sapphire substrate to form a buffer layer.
Step 303: the buffer layer was annealed in situ at 1100 deg.C under 500Torr for 7.5 minutes.
Step 304: and controlling the temperature to be 1050 ℃ and the pressure to be 300torr, and alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer to form a composite layer.
In this example, the composite layer includes 25 gallium nitride layers and 25 zinc oxide layers, the gallium nitride layers having a thickness of 10nm and the zinc oxide layers having a thickness of 30 nm.
Step 305: controlling the temperature at 1100 deg.C and the pressure at 300torr, and growing a layer with a thickness of 3 μm and a doping concentration of 5 x 10 on the composite layer18cm-3The N-type gallium nitride layer of (1).
Step 306: and controlling the pressure to be 300torr, and alternately growing an indium gallium nitride layer and a gallium nitride layer on the N-type gallium nitride layer, wherein the growth temperature of the indium gallium nitride layer is 775 ℃, the growth temperature of the gallium nitride layer is 905 ℃, and a multi-quantum well layer is formed.
In this embodiment, the mqw layer includes 10 indium gallium nitride layers and 10 gallium nitride layers, the thickness of the indium gallium nitride layer is 3nm, and the thickness of the gallium nitride layer is 15 nm.
Step 307: controlling the temperature to be 965 ℃ and the pressure to be 350torr, and growing a P-type aluminum gallium nitride layer with the thickness of 100nm on the multi-quantum well layer to form the electron barrier layer.
Step 308: and controlling the temperature to be 915 ℃ and the pressure to be 350torr, and growing a P-type gallium nitride layer with the thickness of 150nm on the electron blocking layer.
Step 309: controlling the temperature at 950 ℃ and the pressure at 200torr, and continuously growing the P-type gallium nitride layer with the thickness of 150 nm.
Step 310: the annealing treatment was carried out in a nitrogen atmosphere while controlling the temperature at 750 ℃ for 10 minutes.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. An epitaxial wafer of a light emitting diode comprises a substrate, and a buffer layer, an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer and a P-type gallium nitride layer which are sequentially stacked on the substrate, and is characterized by further comprising a composite layer stacked between the buffer layer and the N-type gallium nitride layer, wherein the composite layer comprises a plurality of gallium nitride layers and a plurality of zinc oxide layers, and the plurality of gallium nitride layers and the plurality of zinc oxide layers are alternately stacked; the thickness of the gallium nitride layer is 3-5 times of that of the zinc oxide layer.
2. The epitaxial wafer of claim 1, wherein each of the zinc oxide layers has a thickness of 5nm to 100 nm.
3. Epitaxial wafer according to claim 1 or 2, characterized in that the thickness of each of the gallium nitride layers is comprised between 25nm and 300 nm.
4. The epitaxial wafer according to claim 1 or 2, wherein the composite layer has a thickness of 0.2 μm to 2 μm.
5. Epitaxial wafer according to claim 1 or 2, characterized in that the number of the plurality of zinc oxide layers is the same as the number of the plurality of gallium nitride layers, the number of the plurality of gallium nitride layers being between 5 and 50.
6. A preparation method of an epitaxial wafer of a light-emitting diode is characterized by comprising the following steps:
growing a buffer layer on a substrate;
alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer to form a composite layer, wherein the thickness of the gallium nitride layers is 3-5 times that of the zinc oxide layers;
and sequentially growing an N-type gallium nitride layer, a multi-quantum well layer, an electronic barrier layer and a P-type gallium nitride layer on the composite layer.
7. The method according to claim 6, wherein the alternately growing a plurality of gallium nitride layers and a plurality of zinc oxide layers on the buffer layer comprises:
and growing the zinc oxide layer by adopting a metal organic compound chemical vapor deposition technology.
8. The method according to claim 7, wherein the growth conditions of the zinc oxide layer are the same as those of the gallium nitride layer, and the growth conditions include a growth temperature and a growth pressure.
9. The method of claim 8, wherein the growth temperature of the composite layer is 1000 ℃ to 1100 ℃.
10. The method of claim 8, wherein the growth pressure of the composite layer is 100to 500 torr.
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| CN109192826B (en) * | 2018-07-09 | 2019-11-29 | 华灿光电（浙江）有限公司 | A kind of LED epitaxial slice and preparation method thereof |
| CN109545918B (en) * | 2018-09-27 | 2020-11-27 | 华灿光电（浙江）有限公司 | Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof |
| CN117276336B (en) * | 2023-11-22 | 2024-02-20 | 江西兆驰半导体有限公司 | Epitaxial structure of HEMT and preparation method thereof |
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