CN107516680A - 一种分裂栅功率mos器件 - Google Patents

一种分裂栅功率mos器件 Download PDF

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CN107516680A
CN107516680A CN201710694501.8A CN201710694501A CN107516680A CN 107516680 A CN107516680 A CN 107516680A CN 201710694501 A CN201710694501 A CN 201710694501A CN 107516680 A CN107516680 A CN 107516680A
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gate
dielectric
type
grid
doped semiconductor
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罗小蓉
赵哲言
邓高强
张凯
孙涛
杨洋
张波
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

本发明属于功率半导体技术领域，涉及一种分裂栅功率MOS器件。本发明与传统的分裂栅功率MOS相比，引入高K介质作为屏蔽栅的栅介质层，且将屏蔽栅上方的控制栅一分为二。器件在正向阻断时，高K介质增强辅助耗尽漂移区，提高了漂移区浓度，有利于降低比导通电阻；正向导通时，靠近高K介质的漂移区产生电子积累层，高K介质增强了积累效应，进一步降低了比导通电阻。器件在开关过程中，控制栅与屏蔽栅通过高K介质进行强耦合，极大地降低了栅漏电容；同时分立的控制栅减小了交叠面积，进一步降低了栅源电容和总栅电荷。本发明相比于传统分裂栅功率MOS，具有更低的比导通电阻和栅漏电荷，显著改善了QGD×RDS(on)优值，降低了驱动损耗和开关损耗。

Description

一种分裂栅功率MOS器件
技术领域
本发明属于功率半导体技术领域，涉及一种分裂栅功率MOS器件。
背景技术
功率MOSFET是电压控制器件，驱动电路简单，且驱动功耗较低，工作频率高，在中低压及高频电力电子领域应用广泛。
槽栅VDMOS消除了传统平面栅型VDMOS中存在的JFET区域、增大了器件的沟道密度，降低了器件的比导通电阻，使其广泛应用在开关电源和DC-DC转换器等电力电子领域。然而传统槽栅VDMOS具有很大的栅漏交叠电容，影响了器件的性能，限制了器件在高频条件下的应用。为了降低栅漏电容、改善槽栅VDMOS的性能，分裂栅结构(Split gate)被提出。传统分裂栅结构的控制栅和屏蔽栅栅介质均为二氧化硅材料，且控制栅和屏蔽栅交叠面积大，栅漏电容和总栅电荷还有很大的改善空间。
发明内容
相较于传统的分裂栅结构，本发明提出一种新型分裂栅功率MOS器件，利用变K栅介质(K为相对介电常数)及三分裂栅技术显著降低栅漏电容，极大改善槽栅VDMOS器件性能。
本发明的技术方案为，一种分裂栅功率MOS器件，包括N型重掺杂半导体衬底1和位于N型重掺杂半导体衬底1上表面的N型半导体漂移区2；所述N型半导体漂移区2上表面具有P型区3；所述P型区3表面具有N型重掺杂半导体源区4和P型重掺杂半导体体接触区5，所述N型重掺杂半导体源区4和P型重掺杂半导体体接触区5相互独立；在N型重掺杂半导体源区4中部具有贯穿P型区3并延伸至N型半导体漂移区2中的栅结构，栅结构下半部分为屏蔽栅6，所述屏蔽栅6位于N型半导体漂移区2中，具有高K栅介质61和由高K栅介质61包围的屏蔽栅导电材料62，所述高K栅介质61是相对介电常数K大于3.9的绝缘材料；所述屏蔽栅6上方为控制栅7，所述控制栅7具有与N型半导体漂移区2、P型区3及N型重掺杂半导体源区4相接触的绝缘介质71和由绝缘介质71包围的且分为左右两部分的控制栅导电材料72，所述控制栅导电材料72之间为绝缘介质71；所述控制栅7与屏蔽栅6之间为绝缘介质71；所述控制栅7与屏蔽栅6构成栅结构；所述N型重掺杂半导体源区4和P型重掺杂半导体体接触区5上表面引出源电极，所述N型重掺杂半导体衬底1下表面引出漏电极，所述控制栅导电材料72上表面引出栅电极。
进一步的，所述高K栅介质61下表面与N型重掺杂半导体衬底1接触。
本发明的有益效果为，具有更低的比导通电阻和栅漏电荷，显著改善了QGD×RDS(on)优值，降低了驱动损耗和开关损耗。
附图说明
图1为实施例1的结构示意图；
图2位实施例2的结构示意图。
具体实施方式
下面结合附图和实施例进一步详细描述本法发明的工作原理。
实施例1
如图1所示，为本例的结构示意图，相对于传统的分裂栅结构，本发明引入高K介质作为屏蔽栅的栅介质层，且将屏蔽栅上方的控制栅一分为二，器件在正向阻断时，高K介质增强辅助耗尽漂移区，提高了漂移区浓度，有利于降低比导通电阻；正向导通时，靠近高K介质的漂移区产生电子积累层，高K介质增强了积累效应，进一步降低了比导通电阻。器件在开关过程中，控制栅与屏蔽栅通过高K介质进行强耦合，极大地降低了栅漏电容；同时分立的控制栅减小了交叠面积，进一步降低了栅源电容和总栅电荷。
实施例2
如图2所示，本例与实施例1的区别在于，本例中高K栅介质61下表面与N型重掺杂半导体衬底1接触；相对于实施例1，本例可以实现更高的漂移区摻杂浓度，进一步降低比导通电阻。

Claims (2)

1.一种分裂栅功率MOS器件，包括N型重掺杂半导体衬底(1)和位于N型重掺杂半导体衬底(1)上表面的N型半导体漂移区(2)；所述N型半导体漂移区(2)上表面具有P型区(3)；所述P型区(3)表面具有N型重掺杂半导体源区(4)和P型重掺杂半导体体接触区(5)，所述N型重掺杂半导体源区(4)和P型重掺杂半导体体接触区(5)相互独立；在N型重掺杂半导体源区(4)中部具有贯穿P型区(3)并延伸至N型半导体漂移区(2)中的栅结构，栅结构下半部分为屏蔽栅(6)，所述屏蔽栅(6)位于N型半导体漂移区(2)中，具有高K栅介质(61)和由高K栅介质(61)包围的屏蔽栅导电材料(62)，所述高K栅介质(61)是相对介电常数K大于3.9的绝缘材料；所述屏蔽栅(6)上方为控制栅(7)，所述控制栅(7)具有与N型半导体漂移区(2)、P型区(3)及N型重掺杂半导体源区(4)相接触的绝缘介质(71)和由绝缘介质(71)包围的且分为左右两部分的控制栅导电材料(72)，所述控制栅导电材料(72)之间为绝缘介质(71)；所述控制栅(7)与屏蔽栅(6)之间为绝缘介质(71)；所述控制栅(7)与屏蔽栅(6)构成栅结构；所述N型重掺杂半导体源区(4)和P型重掺杂半导体体接触区(5)上表面引出源电极，所述N型重掺杂半导体衬底(1)下表面引出漏电极，所述控制栅导电材料(72)上表面引出栅电极。
2.根据权利要求1所述的一种分裂栅功率MOS器件，其特征在于，所述高K栅介质(61)下表面与N型重掺杂半导体衬底(1)接触。
CN201710694501.8A 2017-08-15 2017-08-15 一种分裂栅功率mos器件 Pending CN107516680A (zh)

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CN111009581A (zh) * 2020-01-10 2020-04-14 济南安海半导体有限公司 一种新型sgt-mosfet器件栅结构
CN111415867A (zh) * 2020-02-18 2020-07-14 捷捷微电(上海)科技有限公司 一种半导体功率器件结构及其制造方法
CN112687735A (zh) * 2019-10-14 2021-04-20 无锡先瞳半导体科技有限公司 一种屏蔽栅功率器件及其制备方法
WO2021088156A1 (zh) * 2019-11-08 2021-05-14 株洲中车时代电气股份有限公司 一种功率半导体器件
CN113838924A (zh) * 2021-09-23 2021-12-24 电子科技大学 具有栅间介质区的分离栅mos器件及制造方法

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US20160343849A1 (en) * 2010-01-12 2016-11-24 Maxpower Semiconductor Inc. Devices, Components and Methods Combining Trench Field Plates with Immobile Electrostatic Charge
CN106298939A (zh) * 2016-08-22 2017-01-04 电子科技大学 一种具有复合介质层结构的积累型dmos
CN106876279A (zh) * 2017-03-31 2017-06-20 上海华虹宏力半导体制造有限公司 屏蔽栅沟槽功率器件及其制造方法

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US20160343849A1 (en) * 2010-01-12 2016-11-24 Maxpower Semiconductor Inc. Devices, Components and Methods Combining Trench Field Plates with Immobile Electrostatic Charge
US20120228695A1 (en) * 2011-03-11 2012-09-13 Globalfoundries Singapore Pte. Ltd. Ldmos with improved breakdown voltage
CN106298939A (zh) * 2016-08-22 2017-01-04 电子科技大学 一种具有复合介质层结构的积累型dmos
CN106876279A (zh) * 2017-03-31 2017-06-20 上海华虹宏力半导体制造有限公司 屏蔽栅沟槽功率器件及其制造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112687735A (zh) * 2019-10-14 2021-04-20 无锡先瞳半导体科技有限公司 一种屏蔽栅功率器件及其制备方法
WO2021088156A1 (zh) * 2019-11-08 2021-05-14 株洲中车时代电气股份有限公司 一种功率半导体器件
CN111009581A (zh) * 2020-01-10 2020-04-14 济南安海半导体有限公司 一种新型sgt-mosfet器件栅结构
CN111415867A (zh) * 2020-02-18 2020-07-14 捷捷微电(上海)科技有限公司 一种半导体功率器件结构及其制造方法
CN113838924A (zh) * 2021-09-23 2021-12-24 电子科技大学 具有栅间介质区的分离栅mos器件及制造方法
CN113838924B (zh) * 2021-09-23 2024-02-23 电子科技大学 具有栅间介质区的分离栅mos器件及制造方法

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