CN107452840A - A kind of LED panel and preparation method thereof - Google Patents
A kind of LED panel and preparation method thereof Download PDFInfo
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- CN107452840A CN107452840A CN201710574667.6A CN201710574667A CN107452840A CN 107452840 A CN107452840 A CN 107452840A CN 201710574667 A CN201710574667 A CN 201710574667A CN 107452840 A CN107452840 A CN 107452840A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 118
- 239000011265 semifinished product Substances 0.000 claims abstract description 107
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 89
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 88
- 238000002955 isolation Methods 0.000 claims abstract description 27
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- 238000001039 wet etching Methods 0.000 claims abstract description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 58
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 32
- 239000000243 solution Substances 0.000 claims description 29
- 239000000377 silicon dioxide Substances 0.000 claims description 23
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 22
- 239000000696 magnetic material Substances 0.000 claims description 22
- 235000012239 silicon dioxide Nutrition 0.000 claims description 20
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 16
- 238000005516 engineering process Methods 0.000 claims description 13
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 12
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 12
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- 229910052733 gallium Inorganic materials 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 239000012071 phase Substances 0.000 claims description 9
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- 230000007797 corrosion Effects 0.000 claims description 8
- 238000005260 corrosion Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 239000004332 silver Substances 0.000 claims description 8
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- 238000001259 photo etching Methods 0.000 claims description 7
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 6
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 239000004411 aluminium Substances 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 239000007792 gaseous phase Substances 0.000 claims description 3
- 239000011259 mixed solution Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000010521 absorption reaction Methods 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims 2
- 229910052779 Neodymium Inorganic materials 0.000 claims 1
- 229910052742 iron Inorganic materials 0.000 claims 1
- 239000007788 liquid Substances 0.000 claims 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 claims 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
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- 238000004519 manufacturing process Methods 0.000 description 4
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- 230000008859 change Effects 0.000 description 3
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- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910017709 Ni Co Inorganic materials 0.000 description 2
- 229910003267 Ni-Co Inorganic materials 0.000 description 2
- 229910003262 Ni‐Co Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
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- 230000003993 interaction Effects 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
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- 235000008434 ginseng Nutrition 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
- Led Device Packages (AREA)
Abstract
The invention discloses a kind of LED panel and preparation method thereof, belong to technical field of semiconductors.Preparation method includes：Form some chip semi-finished product on substrate, the P-type electrode in chip semi-finished product is magnet, and isolation channel is provided between chip semi-finished product；By isolation channel wet etching chip semi-finished product, separated until chip semi-finished product become inverted cone with substrate；Electrode fixed block is set on substrate, and the one end of P-type electrode away from p-type gallium nitride layer is synonyms pole in electrode fixed block one end and corresponding chip semi-finished product away from substrate；All chip semi-finished product and substrate are put into same solution, the P-type electrode of each chip semi-finished product is adsorbed on corresponding electrode fixed block in the presence of magnetic force；Insulating barrier is set on each chip semi-finished product；N-type electrode connecting line is set on the insulating layer.The present invention can avoid, because splitting substrate separating chips cause fragmentation and luminescent layer to damage, substantially increasing product yield.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of LED panel and preparation method thereof.
Background technology
Light emitting diode (English：Light Emitting Diode, referred to as：LED it is) that one kind can change into electric energy
The semiconductor diode of luminous energy, there is the characteristics of small volume, brightness are high and energy consumption is small, be widely used in display screen, backlight
Source and lighting field.LED core component is chip, and some chip proper alignments form LED panel on substrate.
The preparation method of existing LED panel includes：Sequentially formed on substrate cushion, n type semiconductor layer, luminescent layer and
P type semiconductor layer；The groove for extending to n type semiconductor layer is opened up on p type semiconductor layer, the n type semiconductor layer in groove
It is upper to form the isolation channel for extending to substrate；N-type electrode is formed on n type semiconductor layer in groove, the shape on p type semiconductor layer
Into P-type electrode；Substrate is adhered on blue film, substrate is cleaved along the bearing of trend of isolation channel, forms some separate cores
Piece；Blue film is extended, separate chip is separated；Chip after separation is separately fixed on substrate, forms LED panel.
During the present invention is realized, inventor has found that prior art at least has problems with：
Micro-led (English abbreviation：Micro LED) chip is that size reaches micron-sized LED chip, if
Micro LED chips are handled according to the preparation method of existing LED panel, fragmentation and luminescent layer damage are easily caused when cleaving substrate
Wound, product yield is too low, can not carry out industrial production.
The content of the invention
In order to solve problem of the prior art, the embodiments of the invention provide a kind of LED panel and preparation method thereof.It is described
Technical scheme is as follows：
On the one hand, the embodiments of the invention provide a kind of preparation method of LED panel, the preparation method to include：
Some separate chip semi-finished product are formed on substrate, each chip semi-finished product include being sequentially laminated on
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and P-type electrode on the substrate, the P-type electrode
For magnet, the isolation channel that the substrate is extended to from the P-type electrode is provided between the two neighboring chip semi-finished product；
By chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become inverted cone with
The substrate separates, and the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product；
Setting and the one-to-one electrode fixed block of the chip semi-finished product on substrate, the electrode fixed block is magnetic
Body, P-type electrode is away from institute described in the electrode fixed block one end and the corresponding chip semi-finished product away from the substrate
The one end for stating p-type gallium nitride layer is synonyms pole；
All chip semi-finished product and the substrate are put into same solution, the p-type of each chip semi-finished product
Electrode is adsorbed on the corresponding electrode fixed block in the presence of magnetic force；
The insulating barrier that the substrate is extended to from the n type gallium nitride layer is set on each chip semi-finished product；
N-type electrode connecting line is set on the insulating barrier, the both ends of the N-type electrode connecting line respectively with the N-type
Gallium nitride layer and the substrate connection.
Alternatively, it is described that some separate chip semi-finished product, each chip semi-finished product bag are formed on substrate
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and the P-type electrode stacked gradually over the substrate is included,
The P-type electrode is magnet, is provided between the two neighboring chip semi-finished product from the P-type electrode and extends to the substrate
Isolation channel, including：
Using metallo-organic compound chemical gaseous phase deposition technology on substrate growing aluminum nitride cushion, N-type nitrogen successively
Change gallium layer, luminescent layer, p-type gallium nitride layer；
The photoresist of the first figure is formed on the p-type gallium nitride layer using photoetching technique；
Using physical gas phase deposition technology in the photoresist of first figure and the photoresist of first figure
P-type electrode is formed on the p-type gallium nitride layer exposed；
The P-type electrode is put into the first magnetic field and magnetized, direction and the P-type electrode in first magnetic field
Stacked direction is parallel, until the P-type electrode becomes magnet；
Silicon dioxide layer is formed in the P-type electrode using physical gas phase deposition technology；
Remove the photoresist of first figure；
P-type gallium nitride layer, the luminescent layer and the n type gallium nitride layer described in dry etching, form isolation channel.
Alternatively, it is described by chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become
Being separated into inverted cone with the substrate, the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product, including：
The chip semi-finished product are immersed in etchant solution, the etchant solution is to p-type electricity in the chip semi-finished product
The chip semi-finished product in silicon dioxide layer, the isolation channel on extremely are corroded, and the etchant solution is phosphoric acid solution, sulfuric acid
The mixed solution of solution or phosphoric acid and sulfuric acid.
Alternatively, the temperature of the etchant solution is 200 DEG C~250 DEG C.
Alternatively, the thickness of the silicon dioxide layer is 100nm~5000nm.
Alternatively, the P-type electrode includes reflecting layer and the magnet layer being sequentially laminated on the p-type gallium nitride layer.
Alternatively, the material of the magnet layer uses nickel or neodium magnet.
Alternatively, when the material of the magnet layer uses nickel, the material in the reflecting layer is using silver；When the magnet layer
Material when using neodium magnet, the material in the reflecting layer is using silver, aluminium, gold or platinum.
Alternatively, it is described to be set on substrate and the one-to-one electrode fixed block of the chip semi-finished product, the electrode
Fixed block is magnet, p-type described in the electrode fixed block one end and the corresponding chip semi-finished product away from the substrate
The one end of electrode away from the p-type gallium nitride layer is synonyms pole, including：
The photoresist of second graph is formed on substrate using photoetching technique；
Using physical gas phase deposition technology in the photoresist of the second graph and the photoresist of the second graph
Magnetic material is laid on the substrate exposed；
Remove the photoresist of the second graph, the magnetic material on the substrate forms electrode fixed block；
The electrode fixed block is put into the second magnetic field and magnetized, the direction in second magnetic field and first magnetic
It is in opposite direction, until the electrode fixed block becomes magnet, one end away from the substrate of the electrode fixed block and right
The one end of P-type electrode away from the p-type gallium nitride layer is synonyms pole described in the chip semi-finished product answered.
On the other hand, the embodiments of the invention provide a kind of LED panel, the LED panel includes substrate, some electrodes are consolidated
Determine block and be separately positioned on the one-to-one chip of electrode fixed block, some electrode fixed blocks on the substrate,
Each chip includes aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer, P-type electrode, N-type electrode and connected
Wiring and insulating barrier, P-type electrode, p-type gallium nitride layer in the chip, luminescent layer, n type gallium nitride layer, aluminum nitride buffer layer
Form cone on the electrode fixed block corresponding to being sequentially laminated on, the insulating barrier sets on the cone and from described
N type gallium nitride layer extends to the substrate, the N-type electrode connecting line be arranged on the insulating barrier and both ends respectively with it is described
N type gallium nitride layer and the substrate connection.
The beneficial effect that technical scheme provided in an embodiment of the present invention is brought is：
The isolation of substrate is extended to from P-type electrode by being set between the two neighboring chip semi-finished product that are formed on substrate
Groove, and isolation channel wet etching chip semi-finished product are utilized, because the aluminium nitride being layered at first on substrate in chip semi-finished product delays
It is most fast to rush the corrosion rate of layer, therefore chip semi-finished product are etched into inverted cone and separated with substrate, each chip semi-finished product become
Into the individual being kept completely separate, can avoid, because splitting substrate separating chips cause fragmentation and luminescent layer to damage, substantially increasing
Product yield, the industrial production for the Micro LED that are particularly suitable for use in.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, make required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of flow chart of the preparation method for LED panel that the embodiment of the present invention one provides；
Fig. 2 a- Fig. 2 g are the structural representations for the manufacturing process chips semi-finished product that the embodiment of the present invention one provides；
Fig. 3 a- Fig. 3 c are the structural representations for the substrate that the embodiment of the present invention one provides；
Fig. 4 a- Fig. 4 c are the structural representations for the LED panel that the embodiment of the present invention one provides；
Fig. 5 is a kind of structural representation for LED panel that the embodiment of the present invention two provides.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
The embodiments of the invention provide a kind of preparation method of LED panel, and referring to Fig. 1, the preparation method includes：
Step 101：Some separate chip semi-finished product are formed on substrate, each chip semi-finished product include layer successively
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and the P-type electrode being stacked on substrate, P-type electrode is magnetic
Body, the isolation channel that substrate is extended to from P-type electrode is provided between two neighboring chip semi-finished product.
Alternatively, the ultimate range on the surface of chip semi-finished product and substrate contact between 2 points can be 3 μm~15 μm.
Specifically, the step 101 can include：
The first step, using metallo-organic compound chemical gaseous phase deposition technology (English：Metal Organic Chemical
Vapor Deposition, referred to as：MOCVD) growing aluminum nitride (AlN) cushion, n type gallium nitride (GaN) successively on substrate
Layer, luminescent layer, p-type gallium nitride layer.
Fig. 2 a are the structural representation of chip semi-finished product after the first step performs.Wherein, 11 be substrate, and 12 delay for aluminium nitride
Layer is rushed, 13 be n type gallium nitride layer, and 14 be luminescent layer, and 15 be p-type gallium nitride layer.As shown in Figure 2 a, aluminum nitride buffer layer 12, N-type
Gallium nitride layer 13, luminescent layer 14, p-type gallium nitride layer 15 stack gradually on the substrate 11.
In the specific implementation, high-purity hydrogen (H can be used2) or high pure nitrogen (N2) or high-purity H2And high-purity N2Mixing
Gas is as carrier gas, high-purity N H3As nitrogen source, trimethyl gallium (TMGa) and triethyl-gallium (TEGa) are used as gallium source, trimethyl indium
(TMIn) indium source is used as, trimethyl aluminium (TMAl) is used as silicon source, and silane (SiH4) is used as N type dopant, two luxuriant magnesium (CP2Mg) make
For P-type dopant.Chamber pressure is controlled in 100~600torr.
Specifically, substrate can be Sapphire Substrate, or silicon substrate.Luminescent layer can include multiple indium gallium nitrogen layers
With multiple gallium nitride layers, multiple indium gallium nitrogen layers and the alternately laminated setting of multiple gallium nitride layers.
More specifically, the thickness of substrate can be 400 microns, the thickness of aluminum nitride buffer layer can be 200 nanometers, N-type
The thickness sum of gallium nitride layer, luminescent layer and p-type gallium nitride layer can be 5 microns, indium gallium nitrogen layer and gallium nitride layer in luminescent layer
Number of plies sum can be 16 layers.
Second step, the photoresist of the first figure is formed on p-type gallium nitride layer using photoetching technique.
Fig. 2 b are the structural representation of chip semi-finished product after second step performs.Wherein, 10 be the first figure photoresist.
As shown in Figure 2 b, the photoresist 10 of the first figure is arranged on the position where isolation channel and (refers to the 6th step).
In actual applications, one layer of photoresist can be first laid on p-type gallium nitride layer, then to right under the blocking of mask plate
Photoresist is exposed, and finally the photoresist after exposure is immersed in developer solution, and part photoresist is dissolved in developer solution, is stayed
The photoresist of lower first figure.
3rd step, using physical gas phase deposition technology (English：Physical Vapor Deposition, referred to as：PVD)
P-type electrode is formed on the p-type gallium nitride layer exposed in the photoresist of the first figure and the photoresist of the first figure.
Fig. 2 c are the structural representation of chip semi-finished product after the 3rd step performs.Wherein, 16 be P-type electrode.Such as Fig. 2 c institutes
Show, P-type electrode 16 is arranged on the p-type gallium nitride exposed in the photoresist 10 of the figure of photoresist 10 and first of the first figure simultaneously
On layer 15, due to highly different, the P-type electrode 16 that is arranged on the photoresist 10 of the first figure and p-type gallium nitride is arranged on
P-type electrode 16 on layer 15 does not link together.
Alternatively, P-type electrode can include reflecting layer and the magnet layer being sequentially laminated on p-type gallium nitride layer.Reflecting layer
The direction of directive P-type electrode can be changed, increase the light extraction efficiency of chip.
Preferably, the material of magnet layer can use nickel or neodium magnet, and magnetic is preferable.
Further, when the material of magnet layer uses nickel, the material in reflecting layer can use silver-colored (Ag)；When magnet layer
When material uses neodium magnet, the material in reflecting layer can use silver, aluminium (Al), golden (Au) or platinum (Pt), with magnetospheric
With preferable.
Specifically, the thickness of P-type electrode can be 0.1 μm~1 μm.If the thickness of P-type electrode is less than 0.1 μm, can not
It is secured firmly to (refer to step 104) on electrode fixed block；If the thickness of P-type electrode is more than 1 μm, the waste of material is caused.
4th step, P-type electrode is put into the first magnetic field and magnetized, the direction in the first magnetic field and the stacking of P-type electrode
Direction is parallel, until P-type electrode becomes magnet.
It should be noted that the inside of magnetic material has magnetic domain, they confusedly accumulate as numerous small magnets, respectively
From magnetic cancel out each other, overall externally do not have magnetic.If magnetic material is put into the environment of external magnetic field, these small magnets
With magnetic field interaction, the magnetic moment of magnetic domain is rotated to the direction in magnetic field, and respective magnetic is no longer cancel out, and outwards shows magnetic.This
When leave magnetic field, magnetic will not also be disappeared, and the magnetic history of magnetic material is completed.The present embodiment first makes P using magnetic material
Type electrode, then p-type is magnetized, you can P-type electrode is become magnet.
5th step, silica (SiO is formed in P-type electrode using physical gas phase deposition technology2) layer.
Fig. 2 d are the structural representation of chip semi-finished product after the 5th step performs.Wherein, 20 be silicon dioxide layer.Such as Fig. 2 d
It is shown, also due to highly different, silicon dioxide layer 20 on the photoresist 10 of the first figure and positioned at p-type gallium nitride
Silicon dioxide layer 20 on layer 15 is also not attached to together.
Alternatively, the thickness of silicon dioxide layer can be 100nm~5000nm.If the thickness of silicon dioxide layer is less than
100nm, then silicon dioxide layer following P-type electrode can not be avoided to carry out wet etching (refer to step 102), and then can not be formed
The chip semi-finished product of cone shape；If the thickness of silicon dioxide layer is more than 5000nm, the waste of material can be caused, and subsequently
Also need to individually remove unnecessary silicon dioxide layer, increase unnecessary step, increase production cost.
6th step, remove the photoresist of the first figure.
Fig. 2 e are the structural representation of chip semi-finished product after the 6th step performs.As shown in Figure 2 e, with the first figure
The removal of photoresist 10, P-type electrode 16 and silicon dioxide layer 20 on the photoresist 10 of the first figure are also removed in the lump,
Leave the P-type electrode 16 and silicon dioxide layer 20 on p-type gallium nitride layer 15.
In actual applications, the photoresist of the first figure can be immersed in glue, photoresist can be dissolved in
In glue.
7th step, dry etching p-type gallium nitride layer, luminescent layer and n type gallium nitride layer, form isolation channel.
Fig. 2 f are the structural representation of chip semi-finished product after the 7th step performs.Wherein, 30 be isolation channel.Such as Fig. 2 f institutes
Show, isolation channel 30 extends to substrate 11 from P-type electrode 16, and n type gallium nitride layer 12 etc. is divided into some separate chips
The part of semi-finished product.
Step 102：By isolation channel wet etching chip semi-finished product, until chip semi-finished product become inverted cone and substrate
Separate, the corrosion rate of aluminum nitride buffer layer is most fast in chip semi-finished product.
Fig. 2 g are the structural representation of chip semi-finished product after step 102 performs.As shown in Figure 2 g, the quilt of silicon dioxide layer 20
Erode, the core that aluminum nitride buffer layer 12, n type gallium nitride layer 13, luminescent layer 14, p-type gallium nitride layer 15 and P-type electrode 16 form
Piece semi-finished product are etched into inverted cone, there was only a point connection between inverted cone and substrate 11, therefore separate.
Specifically, the step 102 can include：
Chip semi-finished product are immersed in etchant solution, etchant solution is to the titanium dioxide in P-type electrode in chip semi-finished product
Chip semi-finished product in silicon layer, isolation channel are corroded, and etchant solution is phosphoric acid solution, sulfuric acid solution or phosphoric acid and sulfuric acid
Mixed solution.
Preferably, the temperature of etchant solution can be 200 DEG C~250 DEG C.If the temperature of etchant solution is less than 200 DEG C,
Corrosion rate is slower, and production efficiency is relatively low；If the temperature of etchant solution is higher than 250 DEG C, excessive erosion is easily caused, can not be formed
The chip semi-finished product of cone shape.
In actual applications, as fruit chip semi-finished product become after inverted cone separates with substrate, also to retain in P-type electrode
There is silicon dioxide layer, then P-type electrode can be immersed in hydrofluoric acid, remove silicon dioxide layer.
Step 103：Setting and the one-to-one electrode fixed block of chip semi-finished product on substrate, electrode fixed block is magnetic
Body, the one end of P-type electrode away from p-type gallium nitride layer is in electrode fixed block one end and corresponding chip semi-finished product away from substrate
Synonyms pole.
For example, the one end of electrode fixed block away from substrate is north (English：North, referred to as：N) pole, electrode fixed block are corresponding
Chip semi-finished product in the one end of P-type electrode away from p-type gallium nitride layer for south (English：South, referred to as：S) pole；And for example, electrode
The one end of fixed block away from substrate is the South Pole, and P-type electrode is away from p-type gallium nitride layer in chip semi-finished product corresponding to electrode fixed block
One end be the arctic.
In the specific implementation, be provided with drive circuit on substrate, P-type electrode is being accessed into power supply just by electrode fixed block
Pole, N-type electrode connecting line (refer to the negative pole of step 106) access power supply.
Specifically, the step 103 can include：
The first step, the photoresist of second graph is formed on substrate using photoetching technique.
Fig. 3 a are the structural representation of the metacoxal plate of first step execution.Wherein, 21 be substrate, and 40 be the photoetching of second graph
Glue.As shown in Figure 3 a, the photoresist 40 of second graph is located on the region on substrate 21 in addition to electrode fixed block is set and (referred to
3rd step).
In actual applications, can first on substrate lay one layer of photoresist, then under the blocking of mask plate to photoresist
It is exposed, finally the photoresist after exposure is immersed in developer solution, part photoresist is dissolved in developer solution, leaves second
The photoresist of figure.
Second step, using physical gas phase deposition technology in the photoresist of second graph and the photoresist of second graph
Magnetic material is laid on the substrate exposed.
Fig. 3 b are the structural representation of the metacoxal plate of second step execution.Wherein, 50 be magnetic material.As shown in Figure 3 b, magnetic
Property material 50 simultaneously be arranged on the substrate 21 exposed in the photoresist 40 of second graph and the photoresist 40 of second graph, due to
It is highly different, the magnetic material 50 of the magnetic material 50 and setting being arranged on the photoresist 40 of second graph on the base plate (21
Do not link together.
3rd step, removes the photoresist of second graph, and the magnetic material on substrate forms electrode fixed block.
Fig. 3 c are the structural representation of the metacoxal plate of the 3rd step execution.Wherein, 22 be electrode fixed block.As shown in Figure 3 c,
With the removal of the photoresist 40 of second graph, the magnetic material 50 on the photoresist 40 of second graph is also gone in the lump
Remove, the magnetic material 50 left on substrate 21 turns into electrode fixed block 22.
4th step, electrode fixed block is put into the second magnetic field and magnetized, the direction in the second magnetic field and the first magnetic field
In the opposite direction, until electrode fixed block becomes magnet, P in electrode fixed block one end and corresponding chip semi-finished product away from substrate
The one end of type electrode away from p-type gallium nitride layer is synonyms pole.
It should be noted that the inside of magnetic material has magnetic domain, they confusedly accumulate as numerous small magnets, respectively
From magnetic cancel out each other, overall externally do not have magnetic.If magnetic material is put into the environment of external magnetic field, these small magnets
With magnetic field interaction, the magnetic moment of magnetic domain is rotated to the direction in magnetic field, and respective magnetic is no longer cancel out, and outwards shows magnetic.This
When leave magnetic field, magnetic will not also be disappeared, and the magnetic history of magnetic material is completed.The present embodiment by controlling the direction in magnetic field,
So that the one end of P-type electrode away from p-type gallium nitride layer in electrode fixed block one end and corresponding chip semi-finished product away from substrate
For synonyms pole.
Alternatively, magnetic material can be Al-Ni-Co series permanent-magnet alloy, it is siderochrome cobalt system permanent-magnet alloy, permanent-magnet ferrite, dilute
Native permanent-magnet material or composite permanent-magnetic material.By using permanent-magnet material so that the magnetic of magnet is constant, it can be ensured that electrode is solid
Determine the firm connection of block and P-type electrode.
Step 104：All chip semi-finished product and substrate are put into same solution, the P-type electrode of each chip semi-finished product
Absorption is on corresponding electrode fixed block in the presence of magnetic force.
Fig. 4 a are the structural representation of LED panel after step 104 performs.As shown in fig. 4 a, the P of each chip semi-finished product
Type electrode 16 is adsorbed on corresponding electrode fixed block 22.
In the specific implementation, solution can be contained in beaker container.
Alternatively, solution can be acetone soln.Acetone can volatilize, it is easy to remove totally, processing is more convenient.
Step 105：The insulating barrier that substrate is extended to from n type gallium nitride layer is set on each chip semi-finished product.
Fig. 4 b are the structural representation of LED panel after step 105 performs.Wherein, 17 be insulating barrier.As shown in Figure 4 b,
Insulating barrier 17, by luminescent layer 14, p-type gallium nitride layer 15, P-type electrode 16, reaches substrate 21 from n type gallium nitride layer 13.
Alternatively, the material of insulating barrier can use silica, and cost of implementation is low.
Specifically, the step 105 can include：
The photoresist of the 3rd figure is formed on chip semi-finished product and substrate；
Laid on the chip semi-finished product and substrate exposed in the photoresist of the 3rd figure and the photoresist of the 3rd figure
Insulating materials；
Remove the photoresist of the 3rd figure, the insulating materials on chip semi-finished product and substrate forms insulating barrier.
It is readily apparent that, the forming process of insulating barrier is similar with silicon dioxide layer, will not be described in detail herein.
Step 106：N-type electrode connecting line is set on the insulating layer, and the both ends of N-type electrode connecting line nitrogenize with N-type respectively
Gallium layer and substrate connection.
Fig. 4 c are the structural representation of LED panel after step 106 performs.Wherein, 18 be N-type electrode connecting line.Such as figure
Shown in 4c, N-type electrode connecting line 18 reaches substrate 21 from n type gallium nitride layer 13 by insulating barrier 17.
Specifically, the material of N-type electrode line can be the metal that electric conductivity is good and energy is reflective, such as silver.
Specifically, the step 106 can include：
The photoresist of the 4th figure is formed on chip semi-finished product, substrate and insulating barrier；
Chip semi-finished product, substrate and the insulation exposed in the photoresist of the 4th figure and the photoresist of the 4th figure
Electrode material is laid on layer；
Remove the photoresist of the 4th figure, the electrode material on chip semi-finished product, substrate and insulating barrier forms N-type electrode and connected
Wiring.
It is readily apparent that, the forming process of N-type electrode connecting line is similar with P-type electrode, will not be described in detail herein.
The embodiment of the present invention is extended by being set between the two neighboring chip semi-finished product that are formed on substrate from P-type electrode
To the isolation channel of substrate, and isolation channel wet etching chip semi-finished product are utilized, due to being layered in substrate at first in chip semi-finished product
On aluminum nitride buffer layer corrosion rate it is most fast, therefore chip semi-finished product are etched into inverted cone and separated with substrate, each
Chip semi-finished product become the individual being kept completely separate, and can avoid because splitting substrate separating chips cause fragmentation and luminescent layer to damage
Wound, substantially increases product yield, the industrial production for the Micro LED that are particularly suitable for use in.And electrode fixed block is away from substrate
The one end of P-type electrode away from p-type gallium nitride layer is synonyms pole in one end and corresponding chip semi-finished product, each chip semi-finished product
P-type electrode in the presence of magnetic force automatic absorbing on corresponding electrode fixed block, it is possible to achieve the flood tide of chip semi-finished product
Transfer, it is simple and convenient rapid, further greatly improve production efficiency.
Embodiment two
The embodiments of the invention provide a kind of LED panel, is made suitable for the preparation method provided using embodiment one, ginseng
See Fig. 5, the LED panel include substrate 21, some electrode fixed blocks 22 and with 22 one-to-one chip of electrode fixed block, it is some
Electrode fixed block 22 is separately positioned on substrate 21, and each chip includes aluminum nitride buffer layer 12, n type gallium nitride layer 13, lighted
Layer 14, p-type gallium nitride layer 15, P-type electrode 16, insulating barrier 17 and N-type electrode connecting line 18, P-type electrode 16, p-type in chip
Gallium nitride layer 15, luminescent layer 14, n type gallium nitride layer 13, aluminum nitride buffer layer 12 are sequentially laminated on corresponding electrode fixed block 22
Upper formation cone, insulating barrier 17 set on 1 cone and extend to substrate 21, N-type electrode connecting line from n type gallium nitride layer 13
18 are arranged on insulating barrier 17 and both ends are connected with n type gallium nitride layer 13 and substrate 21 respectively.
Alternatively, the ultimate range on the surface that chip contacts with substrate between 2 points can be 3 μm~15 μm.
Specifically, luminescent layer can include multiple indium gallium nitrogen layers and multiple gallium nitride layers, multiple indium gallium nitrogen layers and multiple nitrogen
Change the alternately laminated setting of gallium layer.
More specifically, the thickness of aluminum nitride buffer layer can be 200 nanometers, n type gallium nitride layer, luminescent layer and p-type nitridation
The thickness sum of gallium layer can be 5 microns, and the number of plies sum of indium gallium nitrogen layer and gallium nitride layer can be 16 layers in luminescent layer.
Alternatively, P-type electrode can include reflecting layer and the magnet layer being sequentially laminated on p-type gallium nitride layer.Reflecting layer
The direction of directive P-type electrode can be changed, increase the light extraction efficiency of chip.
Preferably, the material of magnet layer can use nickel or neodium magnet, and magnetic is preferable.
Further, when the material of magnet layer uses nickel, the material in reflecting layer can use silver-colored (Ag)；When magnet layer
When material uses neodium magnet, the material in reflecting layer can use silver, aluminium (Al), golden (Au) or platinum (Pt), with magnetospheric
With preferable.
Specifically, the thickness of P-type electrode can be 0.1 μm~1 μm.If the thickness of P-type electrode is less than 0.1 μm, can not
It is secured firmly on electrode fixed block；If the thickness of P-type electrode is more than 1 μm, the waste of material is caused.
Alternatively, the material of electrode fixed block can be Al-Ni-Co series permanent-magnet alloy, siderochrome cobalt system permanent-magnet alloy, permanent magnet
Oxysome, rare earth permanent-magnetic material or composite permanent-magnetic material.By using permanent-magnet material so that the magnetic of magnet is constant, can be true
Protect the firm connection of electrode fixed block and P-type electrode.
Specifically, the material of edge layer can use silica, and cost of implementation is low；The material of N-type electrode line can be to lead
The metal that electrical property is good and energy is reflective, such as silver.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent substitution and improvements made etc., it should be included in the scope of the protection.
Claims (10)
1. a kind of preparation method of LED panel, it is characterised in that the preparation method includes：
Some separate chip semi-finished product are formed on substrate, each chip semi-finished product are described including being sequentially laminated on
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and P-type electrode, the P-type electrode on substrate are magnetic
Body, the isolation channel that the substrate is extended to from the P-type electrode is provided between the two neighboring chip semi-finished product；
By chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become inverted cone with it is described
Substrate separates, and the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product；
It is magnet to be set on substrate with the one-to-one electrode fixed block of the chip semi-finished product, the electrode fixed block, institute
P-type electrode described in electrode fixed block one end and the corresponding chip semi-finished product away from the substrate is stated away from the p-type
One end of gallium nitride layer is synonyms pole；
All chip semi-finished product and the substrate are put into same solution, the P-type electrode of each chip semi-finished product
Absorption is on the corresponding electrode fixed block in the presence of magnetic force；
The insulating barrier that the substrate is extended to from the n type gallium nitride layer is set on each chip semi-finished product；
N-type electrode connecting line is set on the insulating barrier, and the both ends of the N-type electrode connecting line nitrogenize with the N-type respectively
Gallium layer and the substrate connection.
2. preparation method according to claim 1, it is characterised in that described that some separate cores are formed on substrate
Piece semi-finished product, each chip semi-finished product include stacking gradually aluminum nitride buffer layer, n type gallium nitride over the substrate
Layer, luminescent layer, p-type gallium nitride layer and P-type electrode, the P-type electrode are magnet, are set between the two neighboring chip semi-finished product
There is the isolation channel that the substrate is extended to from the P-type electrode, including：
Using metallo-organic compound chemical gaseous phase deposition technology on substrate growing aluminum nitride cushion, n type gallium nitride successively
Layer, luminescent layer, p-type gallium nitride layer；
The photoresist of the first figure is formed on the p-type gallium nitride layer using photoetching technique；
Exposed using physical gas phase deposition technology in the photoresist of first figure and the photoresist of first figure
P-type gallium nitride layer on form P-type electrode；
The P-type electrode is put into the first magnetic field and magnetized, the direction in first magnetic field and the stacking of the P-type electrode
Direction is parallel, until the P-type electrode becomes magnet；
Silicon dioxide layer is formed in the P-type electrode using physical gas phase deposition technology；
Remove the photoresist of first figure；
P-type gallium nitride layer, the luminescent layer and the n type gallium nitride layer described in dry etching, form isolation channel.
3. preparation method according to claim 2, it is characterised in that described to pass through core described in the isolation channel wet etching
Piece semi-finished product, separated until the chip semi-finished product become inverted cone with the substrate, aluminium nitride in the chip semi-finished product
The corrosion rate of cushion is most fast, including：
The chip semi-finished product are immersed in etchant solution, the etchant solution is in P-type electrode in the chip semi-finished product
Silicon dioxide layer, the chip semi-finished product in the isolation channel corroded, the etchant solution is that phosphoric acid solution, sulfuric acid are molten
The mixed solution of liquid or phosphoric acid and sulfuric acid.
4. preparation method according to claim 3, it is characterised in that the temperature of the etchant solution is 200 DEG C~250
℃。
5. according to the preparation method described in any one of claim 2~4, it is characterised in that the thickness of the silicon dioxide layer is
100nm~5000nm.
6. according to the preparation method described in any one of claim 2~4, it is characterised in that the P-type electrode includes stacking gradually
Reflecting layer and magnet layer on the p-type gallium nitride layer.
7. preparation method according to claim 6, it is characterised in that the material of the magnet layer uses nickel or neodymium magnetic
Iron.
8. preparation method according to claim 7, it is characterised in that described when the material of the magnet layer uses nickel
The material in reflecting layer is using silver；When the material of the magnet layer uses neodium magnet, the material in the reflecting layer using silver, aluminium,
Gold or platinum.
9. according to the preparation method described in any one of claim 2~4, it is characterised in that it is described on substrate set with it is described
The one-to-one electrode fixed block of chip semi-finished product, the electrode fixed block are magnet, and the electrode fixed block is away from the base
The one end of P-type electrode away from the p-type gallium nitride layer is different name magnetic described in one end of plate and the corresponding chip semi-finished product
Pole, including：
The photoresist of second graph is formed on substrate using photoetching technique；
Exposed using physical gas phase deposition technology in the photoresist of the second graph and the photoresist of the second graph
Substrate on lay magnetic material；
Remove the photoresist of the second graph, the magnetic material on the substrate forms electrode fixed block；
The electrode fixed block is put into the second magnetic field and magnetized, the direction in second magnetic field and first magnetic field
In the opposite direction, until the electrode fixed block becomes magnet, one end away from the substrate of the electrode fixed block and corresponding
The one end of P-type electrode away from the p-type gallium nitride layer described in the chip semi-finished product is synonyms pole.
A kind of 10. LED panel, it is characterised in that the LED panel include substrate, some electrode fixed blocks and with the electrode
The one-to-one chip of fixed block, some electrode fixed blocks are separately positioned on the substrate, and each chip includes
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer, P-type electrode, N-type electrode connecting line and insulating barrier, institute
State corresponding to the P-type electrode in chip, p-type gallium nitride layer, luminescent layer, n type gallium nitride layer, aluminum nitride buffer layer be sequentially laminated on
Cone is formed on the electrode fixed block, the insulating barrier sets on the cone and extended from the n type gallium nitride layer
To the substrate, the N-type electrode connecting line be arranged on the insulating barrier and both ends respectively with the n type gallium nitride layer and institute
State substrate connection.
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