CN107910405A - A kind of production method of light-emitting diode chip for backlight unit - Google Patents
A kind of production method of light-emitting diode chip for backlight unit Download PDFInfo
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- CN107910405A CN107910405A CN201710890555.1A CN201710890555A CN107910405A CN 107910405 A CN107910405 A CN 107910405A CN 201710890555 A CN201710890555 A CN 201710890555A CN 107910405 A CN107910405 A CN 107910405A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
Abstract
The invention discloses a kind of production method of light-emitting diode chip for backlight unit, belong to technical field of semiconductors.Including：Some mutually independent chips are formed on substrate, each chip includes n type semiconductor layer, luminescent layer, p type semiconductor layer, P-type electrode and N-type electrode, n type semiconductor layer, luminescent layer, p type semiconductor layer stack gradually on substrate, each chip is equipped with the groove that n type semiconductor layer is extended to from p type semiconductor layer, N-type electrode is arranged on the n type semiconductor layer in groove, P-type electrode is arranged on p type semiconductor layer, and the isolation channel that substrate is extended to from n type semiconductor layer is equipped between two neighboring chip；Protective film is formed in isolation channel, protective film is arranged on the substrate in isolation channel, and the material of protective film uses metal or metal oxide；The P-type electrode of each chip and N-type electrode are adhered on glued membrane respectively；Substrate is removed using laser lift-off technique；Remove protective film.The present invention can avoid damage from laser glued membrane.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of production method of light-emitting diode chip for backlight unit.
Background technology
Light emitting diode (English：Light Emitting Diode, referred to as：LED it is) that one kind can change into electric energy
The semiconductor diode of luminous energy, has the characteristics that small, brightness is high and energy consumption is small, is widely used in display screen, backlight
Source and lighting area.
Chip is the core component of LED, and the production method of existing LED chip includes：Sequentially form on substrate cushion,
N type semiconductor layer, luminescent layer and p type semiconductor layer；The groove for extending to n type semiconductor layer is opened up on p type semiconductor layer,
The isolation channel for extending to substrate is formed on n type semiconductor layer in groove；N-type electricity is formed on n type semiconductor layer in groove
Pole, forms P-type electrode on p type semiconductor layer；P-type electrode and N-type electrode are adhered on glued membrane；Using laser lift-off technique
Substrate is removed, forms some mutually independent LED chips.
In the implementation of the present invention, inventor has found that the prior art has at least the following problems：
When removing substrate using laser lift-off technique, formation direction directive substrate of the laser along LED chip, wherein directive
The laser of isolation channel can reach glued membrane and burnt glued membrane, cause glued membrane can not remove totally, or chip is damaged, LED chip
Make failure.
The content of the invention
In order to solve the problems, such as prior art glued membrane by laser it is burnt cause LED chip make failure, the embodiment of the present invention
Provide a kind of production method of light-emitting diode chip for backlight unit.The technical solution is as follows：
An embodiment of the present invention provides a kind of production method of light-emitting diode chip for backlight unit, the production method includes：
Some mutually independent chips are formed on substrate, and each chip includes n type semiconductor layer, luminescent layer, p-type
Semiconductor layer, P-type electrode and N-type electrode, the n type semiconductor layer, the luminescent layer, the p type semiconductor layer stack gradually
Over the substrate, each chip is equipped with the groove that the n type semiconductor layer is extended to from the p type semiconductor layer,
The N-type electrode is arranged on the n type semiconductor layer in the groove, and the P-type electrode is arranged on the p type semiconductor layer
On, the isolation channel that the substrate is extended to from the n type semiconductor layer is equipped between the two neighboring chip；
Protective film is formed in the isolation channel, the protective film is arranged on the substrate in the isolation channel, institute
The material for stating protective film uses metal or metal oxide；
The P-type electrode of each chip and N-type electrode are adhered on glued membrane respectively；
The substrate is removed using laser lift-off technique；
Remove the protective film.
Alternatively, the protective film is additionally arranged on the side wall of the n type semiconductor layer in the isolation channel.
Alternatively, the thickness of the protective film is 1nm~5000nm.
Alternatively, it is described to form protective film in the isolation channel, including：
Negative photoresist is formed using photoetching technique on the chip；
Metal film or metal oxide film are laid with the negative photoresist and the isolation channel；
The negative photoresist is removed, forms the protective film.
Preferably, it is described that metal film or metal oxide film, bag are laid with the negative photoresist and the isolation channel
Include：
Metal film or metal oxide film are laid with the negative photoresist and the isolation channel using sputtering technology.
Alternatively, the glued membrane includes polyvinyl chloride base material and acrylic system sticker.
Preferably, the removal protective film, including：
Concentration is used to remove the protective film for 3%~15% hydrochloric acid.
Alternatively, it is described to form some mutually independent chips on substrate, including：
Using metallo-organic compound chemical gaseous phase deposition technology on substrate successively grow n type semiconductor layer, luminescent layer,
P type semiconductor layer；
The photoresist of the first figure is formed on the p type semiconductor layer using photoetching technique；
Under the protection of the photoresist of first figure, dry method is carried out to the p type semiconductor layer and the luminescent layer
Etching, forms the groove that the n type semiconductor layer is extended to from the p type semiconductor layer；
Remove the photoresist of first figure；
Second graph is formed on the n type semiconductor layer in the p type semiconductor layer and the groove using photoetching technique
Photoresist；
Under the protection of the photoresist of the second graph, dry etching is carried out to the n type semiconductor layer, is formed from institute
State the isolation channel that n type semiconductor layer extends to the substrate；
Remove the photoresist of the second graph；
Using photoetching technique in the n type semiconductor layer and the isolation channel in the p type semiconductor layer, the groove
The photoresist of the 3rd figure is formed on substrate；
Metal layer is laid with the photoresist, the p type semiconductor layer and the n type semiconductor layer of the 3rd figure；
Remove the photoresist of the 3rd figure, the metal layer on the p type semiconductor layer forms P-type electrode, the N-type
Metal layer on semiconductor layer forms N-type electrode.
Preferably, each chip further includes transparency conducting layer, and the transparency conducting layer is partly led to be arranged on the p-type
Indium oxide tin film on body layer；
It is described to form some mutually independent chips on substrate, further include：
In the n type semiconductor layer using photoetching technique in the p type semiconductor layer, the groove and the isolation
Formed on substrate in groove before the photoresist of the 3rd figure, the N-type semiconductor in the p type semiconductor layer, the groove
Indium oxide tin film is laid with substrate in layer and the isolation channel；
The photoresist of the 4th figure is formed on the indium oxide tin film using photoetching technique；
Under the protection of the photoresist of the 4th figure, wet etching is carried out to the indium oxide tin film, described in formation
Transparency conducting layer；
Remove the photoresist of the 4th figure；
Anneal to the transparency conducting layer.
It is highly preferred that each chip further includes passivation layer, the passivation layer removes the P on the chip to set
The silicon dioxide layer in the region outside on the substrate in type electrode, the N-type electrode and the isolation channel；
It is described to form some mutually independent chips on substrate, further include：
After the photoresist for removing the 3rd figure, silicon dioxide layer is laid with the chip；
The photoresist of the 5th figure is formed in the silicon dioxide layer using photoetching technique；
Under the protection of the photoresist of the 5th figure, wet etching is carried out to the silicon dioxide layer, described in formation
Passivation layer；
Remove the photoresist of the 5th figure.
The beneficial effect that technical solution provided in an embodiment of the present invention is brought is：
It is used as protective film by forming metal film or metal oxide film on the substrate in isolation channel in advance, then using sharp
Photospallation technology removes substrate, and when formation direction directive substrate of the laser along chip, the major part of wherein directive isolation channel swashs
Light can be absorbed by protective film and can not reach glued membrane, therefore can be to avoid glued membrane by damage from laser, progress next step processing, completion
The making of LED chip.
Brief description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of flow chart of the production method of light-emitting diode chip for backlight unit provided in an embodiment of the present invention；
Fig. 2 a- Fig. 2 j are the structure diagrams of manufacturing process chips provided in an embodiment of the present invention；
Fig. 3 is curve map of the indium oxide tin film provided in an embodiment of the present invention to the light transmittance of different wave length light.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment
An embodiment of the present invention provides a kind of production method of light-emitting diode chip for backlight unit, miniature light-emitting diodes are particularly suitable for
Pipe (English：Micro LED) chip making.Referring to Fig. 1, which includes：
Step 101：Some mutually independent chips are formed on substrate, and each chip includes n type semiconductor layer, shines
Layer, p type semiconductor layer, P-type electrode and N-type electrode, n type semiconductor layer, luminescent layer, p type semiconductor layer are sequentially laminated on substrate
On, each chip is equipped with the groove that n type semiconductor layer is extended to from p type semiconductor layer, and N-type electrode is arranged on the N in groove
In type semiconductor layer, P-type electrode is arranged on p type semiconductor layer, is equipped with from n type semiconductor layer and is extended between two neighboring chip
To the isolation channel of substrate.
Specifically, which can include：
The first step, using metallo-organic compound chemical gaseous phase deposition technology (English：Metal Organic Chemical
Vapor Deposition, referred to as：MOCVD n type semiconductor layer, luminescent layer, p type semiconductor layer) are grown successively on substrate.
Fig. 2 a are the structure diagram of chip after the first step performs.Wherein, 11 be substrate, and 12 be n type semiconductor layer, 13
It is p type semiconductor layer for luminescent layer, 14.As shown in Figure 2 a, n type semiconductor layer 12, luminescent layer 13, p type semiconductor layer 14 be successively
Stacking is on the substrate 11.
In the concrete realization, high-purity hydrogen (H can be used2) or high pure nitrogen (N2) or high-purity H2And high-purity N2
Mixed gas as carrier gas, high-purity ammonia (NH3) nitrogen source is used as, trimethyl gallium (TMGa) and triethyl-gallium (TEGa) are used as gallium
Source, trimethyl indium (TMIn) are used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and silane (SiH4) is used as N type dopant, two cyclopentadienyls
Magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is controlled in 100~600torr.
Specifically, substrate can be Sapphire Substrate, and n type semiconductor layer can be the gallium nitride layer of n-type doping, and p-type is partly
Conductor layer can be the gallium nitride layer of p-type doping；Luminescent layer can include multiple quantum well layers and multiple quantum barrier layers, Duo Geliang
Sub- well layer and the alternately laminated setting of multiple quantum barrier layers, quantum well layer are indium gallium nitrogen layer, and quantum barrier layer is gallium nitride layer.
In practical applications, each chip can also include the cushion being layered between substrate and n type semiconductor layer, with
Alleviate the lattice mismatch between sapphire and gallium nitride material.Specifically, cushion can be gallium nitride layer or aln layer.
Correspondingly, in the first step, using MOCVD on substrate successively grown buffer layer, n type semiconductor layer, luminescent layer,
P type semiconductor layer.
Second step, forms the photoresist of the first figure using photoetching technique on p type semiconductor layer.
In practical applications, when forming the photoresist of certain figure, one layer of photoresist can be first laid with, then in mask plate
Block it is lower photoresist is exposed, finally by after exposure photoresist immersion in developer solution, part photoresist is dissolved in aobvious
In shadow liquid, the photoresist of required figure is left.
3rd step, under the protection of the photoresist of the first figure, dry etching is carried out to p type semiconductor layer and luminescent layer,
Form the groove that n type semiconductor layer is extended to from p type semiconductor layer.
In the concrete realization, inductively coupled plasma (English can be used：Inductive Coupled Plasma,
Referred to as：ICP) technology carries out dry etching to p type semiconductor layer and luminescent layer.
4th step, removes the photoresist of the first figure.
In the present embodiment, second step is used to form groove to the 4th step, wherein, the photoresist of the first figure is covered in P
Region in type semiconductor layer in addition to groove position, so that dry etching does not have the p type semiconductor layer of photoresist covering
Groove is formed with luminescent layer.
Fig. 2 b are the structure diagram of chip after the 4th step performs.Wherein, 21 be groove.As shown in Figure 2 b, groove 21
N type semiconductor layer 12 is extended to from p type semiconductor layer 14.
Specifically, the depth of groove is equal to the sum of thickness of p type semiconductor layer and luminescent layer.More specifically, the depth of groove
Degree can be 1 μm~1.5 μm.
5th step, second graph is formed using photoetching technique on the n type semiconductor layer in p type semiconductor layer and groove
Photoresist.
Implementing step can be similar with second step, the difference is that only that the shape of the mask plate of use is different, because
And the figure of the photoresist formed is different.
6th step, under the protection of the photoresist of second graph, carries out dry etching to n type semiconductor layer, is formed from N-type
Semiconductor layer extends to the isolation channel of substrate.
In the concrete realization, ICP technologies can be used to carry out dry etching to n type semiconductor layer.
7th step, removes the photoresist of second graph.
In the present embodiment, the 5th step to the 7th step is used to form isolation channel, wherein, the photoresist of second graph is covered in
Region on p type semiconductor layer and n type semiconductor layer in addition to isolation channel position, so that dry etching does not have photoresist to cover
The n type semiconductor layer of lid forms isolation channel.
Fig. 2 c are the structure diagram of chip after the 7th step performs.Wherein, 22 be isolation channel.As shown in Figure 2 c, isolate
Groove 22 extends to substrate 11 from n type semiconductor layer 12.
Specifically, the sum of depth of isolation channel and groove is equal to the thickness of p type semiconductor layer, luminescent layer and n type semiconductor layer
The sum of degree.More specifically, the sum of depth of isolation channel and groove can be 5 μm~10 μm.
Alternatively, each chip can also include transparency conducting layer, and transparency conducting layer is to be arranged on p type semiconductor layer
Tin indium oxide (English：Indium Tin Oxide, referred to as：ITO) film, so as to the electric current of P-type electrode extending transversely injection.
Correspondingly, which can also include：
Before the 8th step, it is laid with the substrate in n type semiconductor layer and isolation channel in p type semiconductor layer, groove
Indium oxide tin film；
The photoresist of the 4th figure is formed on indium oxide tin film using photoetching technique；
Under the protection of the photoresist of the 4th figure, wet etching is carried out to indium oxide tin film, forms transparency conducting layer；
Remove the photoresist of the 4th figure；
Anneal to transparency conducting layer.
In the present embodiment, the photoresist of the 4th figure is covered on p type semiconductor layer the position where transparency conducting layer,
To remove the indium oxide tin film in other regions, the transparency conducting layer of shape needed for formation.In addition, transparency conducting layer is moved back
Fire, can make to form Ohmic contact between transparency conducting layer and p type semiconductor layer.
Fig. 2 d are the structure diagram of chip after above-mentioned steps perform.Wherein, 15 be transparency conducting layer.Such as Fig. 2 d institutes
Show, transparency conducting layer 15 is arranged on p type semiconductor layer.
Specifically, the thickness of transparency conducting layer can be 20nm~200nm.
8th step, using substrate of the photoetching technique in the n type semiconductor layer and isolation channel in p type semiconductor layer, groove
The upper photoresist for forming the 3rd figure.
Implementing step can be similar with second step, the difference is that only that the shape of the mask plate of use is different, because
And the figure of the photoresist formed is different.
9th step, metal layer is laid with the photoresist, p type semiconductor layer and n type semiconductor layer of the 3rd figure.
Tenth step, removes the photoresist of the 3rd figure, and the metal layer on p type semiconductor layer forms P-type electrode, and N-type is partly led
Metal layer on body layer forms N-type electrode.
In the present embodiment, the 8th step to the tenth step is used to form electrode, wherein, the photoresist of the 3rd figure is covered in P
Except before N-type electrode position on region and n type semiconductor layer in type semiconductor layer in addition to P-type electrode position
Region, during subsequently to remove the photoresist of the 3rd figure, the metal layer on the photoresist of the 3rd figure is removed in the lump, is left
P-type electrode and N-type electrode.
Fig. 2 e are the structure diagram of chip after the tenth step performs.Wherein, 16 be P-type electrode, and 17 be N-type electrode.Such as
Shown in Fig. 2 e, P-type electrode 16 is arranged on p type semiconductor layer 14, and N-type electrode 17 is arranged on n type semiconductor layer 12.
Alternatively, the thickness of N-type electrode can be equal to from the sum of thickness of P-type electrode, p type semiconductor layer and luminescent layer,
Subsequently to remove on substrate, N-type electrode can be adhered on glued membrane together with P-type electrode, improves the fastness of adhesion and steady
It is qualitative.
Alternatively, each chip can also include passivation layer, and passivation layer includes being arranged on chip except P-type electrode, N-type electricity
The silicon dioxide layer in the region outside on the substrate in pole and isolation channel, is protected with being formed to chip, avoids damage to and leak
Electricity.
Correspondingly, which can also include：
After the tenth step, silicon dioxide layer is laid with chip；
The photoresist of the 5th figure is formed in silicon dioxide layer using photoetching technique；
Under the protection of the photoresist of the 5th figure, wet etching is carried out to silicon dioxide layer, forms passivation layer；
Remove the photoresist of the 5th figure.
In the present embodiment, the photoresist of the 5th figure is covered on chip the position where passivation layer, to remove it
The silicon dioxide layer in its region, the passivation layer of shape needed for formation.
Fig. 2 f are the structure diagram of chip after above-mentioned steps perform.Wherein, 18 be passivation layer.As shown in figure 2f, it is blunt
Change layer 18 is covered in all areas on chip in addition to P-type electrode 16 and N-type electrode 17, including transparency conducting layer 15, p-type half
Conductor layer 14, the side wall of groove 21, n type semiconductor layer 12, the side wall of isolation channel 22 and substrate 11.
Step 102：Protective film is formed in isolation channel, protective film is arranged on the substrate in isolation channel, protective film
Material use metal or metal oxide.
Fig. 2 g are the structure diagram of chip after step 102 performs.Wherein, 23 be protective film.As shown in Figure 2 g, protect
Film 23 is arranged in isolation channel 22.
Specifically, when the material of protective film uses metal, the material of protective film can specifically use aluminium (Al), gold
(Au), silver-colored (Ag), nickel (Ni), platinum (Pt) and a kind of simple substance or at least two alloy in titanium (Ti)；When the material of protective film
During using metal oxide, the material of protective film can specifically use tin indium oxide (English：Indium Tin Oxides, referred to as
ITO), the ZnO transparent conductive glass (AZO) of aluminium doping, ZnO transparent conductive glass (GZO), the indium gallium zinc oxygen of gallium doping
Compound (English：Indium Gallium Zinc Oxide, abbreviation IGZO), one kind in ZnO.
In the present embodiment, the material of protective film uses ITO.
Alternatively, protective film can also be arranged on the side wall of the n type semiconductor layer in isolation channel, avoid laser from reaching
Chip is damaged during glued membrane, prevents chip from failing due to damage.
It should be noted that the front of chip is no protective film, in case chip leaks electricity.Wherein, the front of chip is
Finger-type is into the surface of p type semiconductor layer etc..
Alternatively, the thickness of protective film can be 1nm~5000nm.If the thickness of protective film is less than 1nm, can not protect
Glued membrane；If the thickness of protective film is more than 5000nm, it will cause the waste of material.
Alternatively, which can include：
Negative photoresist is formed on chip using photoetching technique；
Metal film or metal oxide film are laid with negative photoresist and isolation channel；
Negative photoresist is removed, forms protective film.
Part metals film or metal oxide film are removed using above-mentioned lift-off technology, with removing part gold using lithographic technique
Belong to film or metal oxide film is compared, chip (the particularly side wall of groove) can be caused to damage to avoid in etching process.
Preferably, metal film or metal oxide film are laid with negative photoresist and isolation channel, can be included：
Metal film or metal oxide film are laid with negative photoresist and isolation channel using sputtering technology.
It should be noted that the metal oxide film do not annealed, such as indium oxide tin film, are very easy to by acid molten
Corrosion, usually can be corroded within several seconds completely, therefore the present embodiment after protective film is formed without anneal, so as to
Protective film is easily subsequently removed, the removal rate of protective film is improved 5 times.
Step 103：The P-type electrode of each chip and N-type electrode are adhered on glued membrane respectively.
Fig. 2 h are the structure diagram of chip after step 103 performs.Wherein, 24 be glued membrane.As shown in fig. 2h, glued membrane 24
It is adhered in the P-type electrode 16 and N-type electrode 17 of chip.
Specifically, glued membrane can include polyvinyl chloride base material and acrylic system sticker, i.e. described blue film in the industry, material
It is convenient to obtain, and cost of implementation is low.
Step 104：Substrate is removed using laser lift-off technique.
Fig. 2 i are the structure diagram of chip after step 104 performs.As shown in fig. 2i, substrate 11 has been removed.
In the concrete realization, by laser action in cushion, decompose gallium nitride using laser energy and sapphire has a common boundary
The cushion at place, so that Sapphire Substrate be separated from gallium nitride material.
Fig. 3 is curve map of the indium oxide tin film to the light transmittance of the light of different wave length.As shown in figure 3, it is in wavelength
In the range of 300nm~800nm, wavelength is shorter, and indium oxide tin film is lower to the transmitance of light, i.e., absorptivity is higher, and mesh
The wavelength of laser is 255nm used by preceding removal substrate, therefore indium oxide tin film can absorb most of laser (almost
100%).And the laser energy of this wavelength is big, substrate can be efficiently separated.
The present invention is used as protective film by forming metal film or metal oxide film on the substrate in isolation channel in advance, then
Substrate is removed using laser lift-off technique, when formation direction directive substrate of the laser along chip, wherein directive isolation channel is big
Fraction of laser light can be absorbed by protective film and can not reach glued membrane, therefore can be added in next step by damage from laser, progress to avoid glued membrane
Work, completes the making of LED chip.
Step 105：Remove protective film.
Fig. 2 j are the structure diagram of chip after step 105 performs.As shown in figure 2j, protective film 23 has been removed.
As it was previously stated, the metal oxide film (such as indium oxide tin film) do not annealed is very easy to by acid solution corruption
Erosion, can usually be corroded completely for several seconds, while acid solution does not act on glued membrane, therefore can be very using acid solution
Easily remove protective film.
Alternatively, which can include：
Concentration is used to remove protective film for 3%~15% hydrochloric acid.
On the one hand the etchant solution generally sold using in the market, procurement cost are low；On the other hand can be molten to avoid corroding
Damage of the liquid to other layers.
Preferably, the temperature of hydrochloric acid can be 25 DEG C~60 DEG C, easy to implement using room temperature.
In practical applications, after the step 105, it can be dried with chip, chip is fixed on substrate, form formal dress
Chip；Alternatively, first by adhesive die attachment on another glued membrane, then chip is fixed on substrate, forms flip-chip.In addition,
Before chip is fixed on substrate, expansion film can be carried out to glued membrane, to adjust the distance between adjacent chips.
The embodiment of the present invention is used as protective film by forming indium oxide tin film on the substrate in isolation channel in advance, then uses
Laser lift-off technique removes substrate, when formation direction directive substrate of the laser along chip, the wherein major part of directive isolation channel
Laser can be absorbed by the indium oxide tin film as protective film and can not reach glued membrane, thus can to avoid glued membrane by damage from laser,
Next step processing is carried out, completes the making of LED chip.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent replacement, improvement and so on, should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of production method of light-emitting diode chip for backlight unit, it is characterised in that the production method includes：
Some mutually independent chips are formed on substrate, and each chip, which includes n type semiconductor layer, luminescent layer, p-type, partly leads
Body layer, P-type electrode and N-type electrode, the n type semiconductor layer, the luminescent layer, the p type semiconductor layer are sequentially laminated on institute
State on substrate, each chip is equipped with the groove that the n type semiconductor layer is extended to from the p type semiconductor layer, the N
Type electrode is arranged on the n type semiconductor layer in the groove, and the P-type electrode is arranged on the p type semiconductor layer, adjacent
The isolation channel that the substrate is extended to from the n type semiconductor layer is equipped between two chips；
Protective film is formed in the isolation channel, the protective film is arranged on the substrate in the isolation channel, the guarantor
The material of cuticula uses metal or metal oxide；
The P-type electrode of each chip and N-type electrode are adhered on glued membrane respectively；
The substrate is removed using laser lift-off technique；
Remove the protective film.
2. production method according to claim 1, it is characterised in that the protective film is additionally arranged in the isolation channel
On the side wall of n type semiconductor layer.
3. production method according to claim 1 or 2, it is characterised in that the thickness of the protective film for 1nm~
5000nm。
4. production method according to claim 1 or 2, it is characterised in that it is described to form protective film in the isolation channel,
Including：
Negative photoresist is formed using photoetching technique on the chip；
Metal film or metal oxide film are laid with the negative photoresist and the isolation channel；
The negative photoresist is removed, forms the protective film.
5. production method according to claim 4, it is characterised in that described in the negative photoresist and the isolation channel
Interior laying metal film or metal oxide film, including：
Metal film or metal oxide film are laid with the negative photoresist and the isolation channel using sputtering technology.
6. production method according to claim 1 or 2, it is characterised in that the glued membrane includes polyvinyl chloride base material and Asia
Gram force system sticker.
7. production method according to claim 6, it is characterised in that the removal protective film, including：
Concentration is used to remove the protective film for 3%~15% hydrochloric acid.
8. production method according to claim 1 or 2, it is characterised in that it is described formed on substrate it is some independently of each other
Chip, including：
N type semiconductor layer, luminescent layer, p-type are grown using metallo-organic compound chemical gaseous phase deposition technology successively on substrate
Semiconductor layer；
The photoresist of the first figure is formed on the p type semiconductor layer using photoetching technique；
Under the protection of the photoresist of first figure, dry etching is carried out to the p type semiconductor layer and the luminescent layer,
Form the groove that the n type semiconductor layer is extended to from the p type semiconductor layer；
Remove the photoresist of first figure；
The light of second graph is formed on the n type semiconductor layer in the p type semiconductor layer and the groove using photoetching technique
Photoresist；
Under the protection of the photoresist of the second graph, dry etching is carried out to the n type semiconductor layer, is formed from the N
Type semiconductor layer extends to the isolation channel of the substrate；
Remove the photoresist of the second graph；
Using substrate of the photoetching technique in the n type semiconductor layer and the isolation channel in the p type semiconductor layer, the groove
The upper photoresist for forming the 3rd figure；
Metal layer is laid with the photoresist, the p type semiconductor layer and the n type semiconductor layer of the 3rd figure；
Remove the photoresist of the 3rd figure, the metal layer on the p type semiconductor layer forms P-type electrode, and the N-type is partly led
Metal layer on body layer forms N-type electrode.
9. production method according to claim 8, it is characterised in that each chip further includes transparency conducting layer, institute
It is the indium oxide tin film being arranged on the p type semiconductor layer to state transparency conducting layer；
It is described to form some mutually independent chips on substrate, further include：
In the n type semiconductor layer and the isolation channel using photoetching technique in the p type semiconductor layer, the groove
Substrate on formed before the photoresist of the 3rd figure, n type semiconductor layer in the p type semiconductor layer, the groove and
Indium oxide tin film is laid with substrate in the isolation channel；
The photoresist of the 4th figure is formed on the indium oxide tin film using photoetching technique；
Under the protection of the photoresist of the 4th figure, wet etching is carried out to the indium oxide tin film, is formed described transparent
Conductive layer；
Remove the photoresist of the 4th figure；
Anneal to the transparency conducting layer.
10. production method according to claim 9, it is characterised in that each chip further includes passivation layer, described blunt
Change layer to set on the chip in addition on the substrate in the P-type electrode, the N-type electrode and the isolation channel
Region silicon dioxide layer；
It is described to form some mutually independent chips on substrate, further include：
After the photoresist for removing the 3rd figure, silicon dioxide layer is laid with the chip；
The photoresist of the 5th figure is formed in the silicon dioxide layer using photoetching technique；
Under the protection of the photoresist of the 5th figure, wet etching is carried out to the silicon dioxide layer, forms the passivation
Layer；
Remove the photoresist of the 5th figure.
Priority Applications (1)
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| CN112582515A (en) * | 2020-12-11 | 2021-03-30 | 苏州芯聚半导体有限公司 | Light emitting diode and manufacturing method thereof |
| CN112713167A (en) * | 2019-10-25 | 2021-04-27 | 成都辰显光电有限公司 | Display panel and preparation method thereof |
| CN112968082A (en) * | 2020-10-13 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Manufacturing method of light-emitting device structure, display back plate and display device |
| CN113437185A (en) * | 2021-06-23 | 2021-09-24 | 南方科技大学 | Method and system for efficiently preparing Micro-LED chip |
| CN113539127A (en) * | 2021-07-09 | 2021-10-22 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
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