CN103117338A

CN103117338A - Production method of low-damage GaN-based LED (light-emitting diode) chip

Info

Publication number: CN103117338A
Application number: CN2013100677900A
Authority: CN
Inventors: 李璟; 王国宏; 孔庆峰; 詹腾
Original assignee: Institute of Semiconductors of CAS
Current assignee: Institute of Semiconductors of CAS
Priority date: 2013-03-04
Filing date: 2013-03-04
Publication date: 2013-05-22

Abstract

A production method of a low-damage GaN-based LED chip comprises the following steps: step 1, taking a semiconductor substrate; step 2, utilizing the metal organic chemical vapor deposition to sequentially grow a low-temperature GaN buffer layer, an undoped GaN layer, an N-GaN layer, an MQW (multiple quantum wells) luminous layer and a P-GaN layer to form a GaN epitaxial wafer; step 3, utilizing the PECVD (plasma enhanced chemical vapor deposition) to deposit a current barrier layer on the GaN epitaxial wafer; step 4, etching downward on one side of the upper surface of the current barrier layer until reaching the N-GaN layer to form a mesa on one side of the N-GaN layer; step 5, photoetching the current barrier layer to enable the area of the current carrier layer to be smaller than that of the P-GaN layer; step 6, evaporating an ITO (indium tin oxide) thin film on the upper surface of the etched GaN epitaxial wafer; step 7, photoetching the ITO thin film outside the P-GaN layer and the current barrier layer; and step 8, manufacturing a P electrode at a position on the ITO thin film, which corresponds to the current barrier layer, and manufacturing an N electrode on the mesa of one side of the N-GaN layer to complete the production.

Description

The manufacture method of low damage GaN base LED chip

Technical field

The present invention relates to field of photoelectric devices, be specifically related to a kind of manufacture method of low damage GaN base LED chip.

Background technology

Light-emitting diode (LED) is a kind of junction type electroluminescence semiconductor device that can convert the electrical signal to light signal.The advantages such as, long-life efficient with it, environmental protection are well received by the public GaN base LED once occurring just as solid state light emitter, will cause the revolution of Lighting Industry technology and application.

Usually the technical process of preparation GaN base LED chip is (consulting Fig. 5): 1. epitaxial growth LED material structure on substrate forms epitaxial wafer; 2. photoetching and ICP etching table top mesa on epitaxial wafer; 3.PECVD growth current barrier layer; 4. photoetching and corrosion current barrier layer; 5. evaporation ito thin film; 6. photoetching corrosion ito thin film; Photoetching PN electrode and evaporation metal, peel off.

In these techniques, for the impact of the photoelectric characteristic of GaN base LED chip larger be: the plasma during ICP (inductively coupled plasma) etching during to the damage of P-GaN and active area materials and PECVD growth current barrier layer plasma for the damage of P-GaN and active area.These damages can make the LED device voltage raise, and brightness descends.

Adopt ICP etching table top mesa, more than general etching depth 1.5um.Therefore, require masking layer material compactness good, select than good, there is good protective effect on the P-GaN surface.The mask of ICP dry etching commonly used is photoresist.The photoresist manufacture craft is simple, but the etching selection ratio of photoresist and GaN is 0.6: 1, needs thicker photoresist and the post bake higher temperature of coating to play a good protection to GaN.And through after the ICP etching, the photoresist that remains in the GaN surface is difficult to remove with organic solvent, needs use 02 plasma treatment, not only increased the complexity of technique, and plasma also can injury to the GaN material.

After the complete table top of etching, need to adopt PECVD growth current barrier layer, normally SiO ₂At deposition SiO ₂In process, the plasma in PECVD is again to P-GaN surface and exposed PN junction active area injury.So, in making the LED chip process, P-GaN and active area are effectively protected, alleviate it and suffer isoionic damage extremely important.By improving technique, make the attenuating of LED device voltage, luminance raising, form a kind of manufacture method of GaN base LED chip of low damage.

Summary of the invention

The object of the invention is to, a kind of manufacture method of low damage GaN base LED chip is provided, adopt the GaN base LED chip high-power chip (45mil) of this method preparation, its operating voltage (@350mA) is than the original 0.05v that reduces, and luminous power is than originally increasing more than 5%.

The invention provides a kind of manufacture method of low damage GaN base LED chip, comprise the steps:

Step 1: get semi-conductive substrate;

Step 2: adopt the method for metal organic chemical vapor deposition, growing low temperature GaN resilient coating, the GaN layer that undopes, N-GaN layer, multiple quantum well light emitting layer and P-GaN layer successively on Semiconductor substrate form the GaN epitaxial wafer;

Step 3: adopt the method for PECVD, deposition current barrier layer on the GaN epitaxial wafer;

Step 4: etching under the side direction on current barrier layer, etching depth arrives the N-GaN layer, at a side formation table top of N-GaN layer;

Step 5: current barrier layer is carried out photoetching, make the area of current barrier layer less than the area of P-GaN layer;

Step 6: the upper surface evaporation ito thin film of the GaN epitaxial wafer after etching;

Step 7: photoetching corrosion falls the ito thin film beyond P-GaN layer and current barrier layer;

Step 8: the corresponding position, position with current barrier layer on ito thin film makes the P electrode; Make the N electrode on the table top of a side of N-GaN layer, complete preparation.

Description of drawings

For further illustrating concrete technology contents of the present invention, be described in detail as follows below in conjunction with embodiment and accompanying drawing, wherein:

Fig. 1 is the preparation flow figure of the inventive method;

Fig. 2 is structural representation of the present invention;

Fig. 3 is conventional method and I-V curve comparison figure of the present invention;

Fig. 4 is conventional method and P-I curve comparison figure of the present invention;

Fig. 5 is the process chart of conventional method.

Embodiment

See also illustrated in figures 1 and 2ly, the invention provides a kind of manufacture method of low damage GaN base LED chip, comprise the steps:

Step 1: get semi-conductive substrate 1, the material of described Semiconductor substrate 1 is sapphire, silicon, carborundum or metal;

Step 2: the method that adopts metal organic chemical vapor deposition, growing low temperature GaN resilient coating 2 (thickness is 1 μ m), the GaN layer 3 that undopes (thickness is 1 μ m), N-GaN layer 4 (thickness is 3 μ m), multiple quantum well light emitting layer 5 (thickness is 150nm) and P-GaN layer 6 (thickness is 300nm) successively on Semiconductor substrate 1 form the GaN epitaxial wafer; The periodicity of described multiple quantum well light emitting layer 5 is 2-15, and the quantum well in each cycle comprises GaN and growth InGaN thereon;

Step 3: adopt the method for PECVD, deposition current barrier layer 7 on the GaN epitaxial wafer, the material of described current barrier layer 7 is SiO ₂Thickness is

Temperature is 300 ℃, power 40-70W, pressure 500-700mtorr, N ₂The flow of O is 800-1000sccm, SiH ₄Flow be 400-600sccm, N ₂Flow be 400-600sccm, time 5-10min.This moment, the GaN epitaxial wafer did not pass through mesa etch, there is no exposed PN junction and active area, and the plasma in PECVD can be to PN junction and the active area injury of LED;

Step 4: the side GaN to current barrier layer 7 carries out the ICP etching.Use table top mesa reticle, behind photoetching and corrosion current barrier layer 7, jointly as mask, the GaN epitaxial wafer is carried out the ICP etching with photoresist and current barrier layer 7, remove P-GaN, quantum well and the part N-GaN of a side, form table top 41, the etching depth 1500nm-2000nm of this table top 41.Use Cl ₂, BCl ₃, Ar ₂As etching gas,, Cl wherein ₂Flow be 30-100sccm, BCl ₃Flow be 10-20sccm, Ar ₂Flow be 15-25sccm; Etching power is 400-700W; Radio-frequency power is 100-200W; Etch period is 10-15min.Due to photoresist and SiO ₂Double protection, avoided the damage of plasma to the P-GaN surface;

Step 5: current barrier layer 7 is carried out photoetching, make the area of current barrier layer 7 less than the area of P-GaN layer 6.Owing to just having deposited SiO before the ICP mesa etch ₂As current barrier layer 7, so need not to re-use PECVD deposit SiO ₂, directly the figure of photoetching current barrier layer gets final product.SiO ₂Layer both as mask protection table top avoid plasma damage, again can be directly use as current barrier layer, need not to increase new processing step;

Step 6: the upper surface evaporation ito thin film 8 of the GaN epitaxial wafer after etching, thickness

Step 7: photoetching corrosion falls the ito thin film 8 beyond P-GaN layer 6 and current barrier layer 7.Select AZ6130 photoresist and little chloroazotic acid (3HCl:HNO ₃) photoetching corrosion goes out the ITO figure, removes the ito thin film on table top 41.ITO and P-GaN layer 6 can form good ohmic contact, can reduce touch voltage, thereby reduce the operating voltage of device;

Step 8: make P electrode 9 with the corresponding position, position of current barrier layer 7 on ito thin film 8, make N electrode 1O on the table top 41 of a side of N-GaN layer 4.Concrete method of making the PN electrode is: select negative photoresist L-300 photoetching P, N electrode on ito thin film 8 and N-GaN layer 41, adopt the electron-beam vapor deposition method evaporation metal

Peel off rear formation P electrode 9 and N electrode 10.The thickness of P, N electrode metal is thicker, routing test when being convenient to packaged chip.Complete preparation.

See also Fig. 3, Fig. 3 has provided the I-E characteristic comparison diagram of the LED device of technique of the present invention and the making of former technique.As can be seen from Figure 3, the operating voltage of the LED device of technique of the present invention reduces 0.05v (@350mA) than former technique.

See also Fig. 4, Fig. 4 has provided the luminous power of the LED device that technique of the present invention and former technique makes-current characteristics comparison diagram.As can be seen from Figure 4, the luminous power of the LED device of technique of the present invention increases by 5% (@350mA) than former technique.

The above; only embodiments of the invention; be not that the present invention is done any pro forma restriction; every any simple modification, equivalent variations and modification of above embodiment being done according to the technology of the present invention essence; within all still belonging to the technical solution of the present invention scope, so protection scope of the present invention is when being as the criterion with claims.

Claims

1. the manufacture method of one kind low damage GaN base LED chip, comprise the steps:

Step 1: get semi-conductive substrate;

2. the manufacture method of low damage GaN base LED chip according to claim 1, the material of wherein said Semiconductor substrate is sapphire, silicon, carborundum or metal.

3. the manufacture method of low damage GaN base LED chip according to claim 1, wherein the material of current barrier layer is SiO ₂, thickness is

4. the manufacture method of low damage GaN base LED chip according to claim 1, wherein the etching depth of table top arrives in the N-GaN layer.

5. the manufacture method of low damage GaN base LED chip according to claim 1, wherein the periodicity of multiple quantum well light emitting layer is 2-15.

6. the manufacture method of low damage GaN base LED chip according to claim 5, wherein the quantum well in each cycle comprises GaN and growth InGaN thereon.