CN106449922B - Manufacturing method of light emitting diode - Google Patents
Manufacturing method of light emitting diode Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000008569 process Effects 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims description 14
- 229910052757 nitrogen Inorganic materials 0.000 claims description 11
- 238000007788 roughening Methods 0.000 claims description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000013528 metallic particle Substances 0.000 claims 6
- 238000000137 annealing Methods 0.000 claims 2
- 239000002923 metal particle Substances 0.000 abstract description 26
- 238000005530 etching Methods 0.000 abstract description 7
- 238000004151 rapid thermal annealing Methods 0.000 abstract description 6
- 230000000717 retained effect Effects 0.000 abstract description 2
- 229910002601 GaN Inorganic materials 0.000 description 15
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 12
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 12
- 238000003892 spreading Methods 0.000 description 10
- 230000007480 spreading Effects 0.000 description 10
- 229910052698 phosphorus Inorganic materials 0.000 description 8
- 238000000605 extraction Methods 0.000 description 5
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- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
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- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 2
- BEQNOZDXPONEMR-UHFFFAOYSA-N cadmium;oxotin Chemical compound [Cd].[Sn]=O BEQNOZDXPONEMR-UHFFFAOYSA-N 0.000 description 2
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- NQBRDZOHGALQCB-UHFFFAOYSA-N oxoindium Chemical compound [O].[In] NQBRDZOHGALQCB-UHFFFAOYSA-N 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- YUWBVKYVJWNVLE-UHFFFAOYSA-N [N].[P] Chemical compound [N].[P] YUWBVKYVJWNVLE-UHFFFAOYSA-N 0.000 description 1
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- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
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- 238000000059 patterning Methods 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
- H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/816—Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
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Abstract
本发明公开了一种发光二极管的制作方法,包括工艺步骤:提供一衬底,外延生长发光外延层,由N型半导体层、发光层以及P型半导体层堆叠而成,定义发光外延层上表面分为P型区域与N型区域;在发光外延层上形成金属膜层;采用快速热退火处理,使得金属膜层发生球聚,形成金属颗粒;在发光外延层及金属颗粒上形成掩膜层,并对掩膜层进行图案化,使得N型区域裸露出来;采用金属颗粒及掩膜层作为掩膜结构,进行蚀刻工艺,使得N型区域蚀刻至N型半导体层裸露出来,并将N型半导体层的上表面粗化;去除掩膜层,并保留P型半导体层上的金属颗粒,进行芯片制程。
The invention discloses a method for manufacturing a light-emitting diode, which includes the following process steps: providing a substrate, epitaxially growing a light-emitting epitaxial layer, which is formed by stacking an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer, and defining the upper surface of the light-emitting epitaxial layer Divided into P-type area and N-type area; forming a metal film layer on the light-emitting epitaxial layer; adopting rapid thermal annealing treatment to make the metal film layer gather and form metal particles; forming a mask layer on the light-emitting epitaxial layer and metal particles , and pattern the mask layer to expose the N-type region; use metal particles and the mask layer as a mask structure to perform an etching process, so that the N-type region is etched until the N-type semiconductor layer is exposed, and the N-type The upper surface of the semiconductor layer is roughened; the mask layer is removed, and the metal particles on the P-type semiconductor layer are retained for chip manufacturing.
Description
技术领域technical field
本发明涉及半导体技术领域,更具体的是一种发光二极管的制作方法。The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a light emitting diode.
背景技术Background technique
发光二极管(LED)经过多年的发展,III-V族化合物是当前主流的用于制作发光二极管的半导体材料,其中以氮化镓基和铝镓铟磷基材料最为普遍。通常,氮化镓基LED的外部量子效率取决于其内部量子效率及光萃取效率,大多数的商业化的LED内量子效率已经接近100%,而其光萃取效率却只有3~30%左右,其最主要的因素是由于LED内部产生的光子损失于内部全反射。After years of development of light-emitting diodes (LEDs), III-V compounds are currently the mainstream semiconductor materials for making light-emitting diodes, among which gallium nitride-based and aluminum gallium indium phosphide-based materials are the most common. Generally, the external quantum efficiency of gallium nitride-based LEDs depends on its internal quantum efficiency and light extraction efficiency. The internal quantum efficiency of most commercial LEDs is close to 100%, but its light extraction efficiency is only about 3-30%. The most important factor is the loss of photons generated inside the LED due to internal total reflection.
LED界面的粗糙化可有效改善其光萃取效率。ICP干蚀刻及光刻技术结合用于p-GaN表面的粗化的方法就是其中之一。然而,由于p-GaN层本就比较薄(80~200nm),对p-GaN表面进行粗化容易导致LED光电性能的损失。The roughening of the LED interface can effectively improve its light extraction efficiency. One of them is the combination of ICP dry etching and photolithography for roughening the p-GaN surface. However, since the p-GaN layer is relatively thin (80~200nm), roughening the p-GaN surface will easily lead to the loss of LED optoelectronic performance.
发明内容Contents of the invention
为解决上述发光二极管的所存在的问题,本发明提供一种发光二极管的制作方法,采用金属颗粒作为半导体层粗化的掩膜,通过掩膜及半导体层的不同蚀刻比,从而得到不同粗化图案的半导体层表面。In order to solve the existing problems of the above-mentioned light-emitting diodes, the present invention provides a method for manufacturing a light-emitting diode, which uses metal particles as a mask for roughening the semiconductor layer, and obtains different roughening ratios through the different etching ratios of the mask and the semiconductor layer. Pattern the surface of the semiconductor layer.
本发明提供的技术方案包括:一种发光二极管的制作方法,包括工艺步骤:The technical solution provided by the present invention includes: a method for manufacturing a light-emitting diode, including process steps:
(1)提供一衬底,外延生长发光外延层,由N型半导体层、发光层以及P型半导体层堆叠而成,定义发光外延层上表面分为P型区域与N型区域;(1) Provide a substrate, epitaxially grow a light-emitting epitaxial layer, which is formed by stacking an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer, and define a P-type region and an N-type region on the upper surface of the light-emitting epitaxial layer;
(2)在发光外延层上形成金属膜层;(2) Forming a metal film layer on the light-emitting epitaxial layer;
(3)采用快速热退火处理,使得金属膜层发生球聚,形成金属颗粒;(3) Rapid thermal annealing treatment is used to cause the metal film layer to spheroidize and form metal particles;
(4)在发光外延层及金属颗粒上形成掩膜层,并对掩膜层进行图案化,使得N型区域裸露出来;(4) Form a mask layer on the light-emitting epitaxial layer and metal particles, and pattern the mask layer to expose the N-type region;
(5)采用金属颗粒及掩膜层作为掩膜结构,进行蚀刻工艺,藉由金属颗粒与半导体层的不同蚀刻速率比,使得N型区域蚀刻至N型半导体层裸露出来,并将N型半导体层的上表面粗化;(5) Using metal particles and mask layer as the mask structure, the etching process is carried out, and the N-type region is etched until the N-type semiconductor layer is exposed through the different etching rate ratios of the metal particles and the semiconductor layer, and the N-type semiconductor layer is exposed. roughening of the upper surface of the layer;
(6)去除掩膜层,并保留P型半导体层上的金属颗粒,进行芯片制程。(6) Remove the mask layer and retain the metal particles on the P-type semiconductor layer for chip manufacturing.
进一步地,所述步骤(2)中的金属膜层的材料选用Ag或Pt或前述组合。Further, the material of the metal film layer in the step (2) is selected from Ag or Pt or a combination of the foregoing.
进一步地,所述步骤(2)中的金属膜层的厚度为2~500Å。Further, the thickness of the metal film layer in the step (2) is 2-500Å.
进一步地,所述步骤(3)中的快速热退火处理条件包括:温度为300~1000℃,时间为10s~10min,气氛包括氮气、氩气惰性气体。Further, the rapid thermal annealing treatment conditions in the step (3) include: the temperature is 300-1000° C., the time is 10s-10 minutes, and the atmosphere includes nitrogen and argon as inert gases.
进一步地,所述步骤(4)中的掩膜层由光阻或氧化物或金属构成。Further, the mask layer in the step (4) is made of photoresist or oxide or metal.
进一步地,所述步骤(5)中的蚀刻工艺为ICP干法蚀刻。Further, the etching process in the step (5) is ICP dry etching.
进一步地,所述步骤(5)中的金属颗粒与半导体层的不同蚀刻速率比通过调整ICP干法蚀刻的气体比例实现。Further, the different etching rate ratios of the metal particles and the semiconductor layer in the step (5) are realized by adjusting the gas ratio of the ICP dry etching.
进一步地,所述步骤(5)中得到的N型半导体层的上表面粗化图形为锥状或者柱状。Further, the roughened pattern on the upper surface of the N-type semiconductor layer obtained in the step (5) is conical or columnar.
进一步地,所述步骤(6)中的芯片制程包括在P型半导体层上制作电流扩展层。Further, the chip manufacturing process in the step (6) includes manufacturing a current spreading layer on the P-type semiconductor layer.
进一步地,所述电流扩展层为氧化铟锡(ITO)或氧化锌(ZnO)或氧化镉锡(CTO)或氧化铟(InO)或铟(In)掺杂氧化锌(ZnO)或铝(Al)掺杂氧化锌(ZnO)或镓(Ga)掺杂氧化锌(ZnO)或前述任意组合之一。Further, the current spreading layer is indium tin oxide (ITO) or zinc oxide (ZnO) or cadmium tin oxide (CTO) or indium oxide (InO) or indium (In) doped zinc oxide (ZnO) or aluminum (Al ) doped zinc oxide (ZnO) or gallium (Ga) doped zinc oxide (ZnO) or any combination of the foregoing.
进一步地,所述步骤(6)中的芯片制程包括制作P电极和N电极。Further, the chip manufacturing process in the step (6) includes making P electrodes and N electrodes.
与现有技术相比,本发明至少包括以下技术效果:Compared with the prior art, the present invention at least includes the following technical effects:
(1)在不损伤P型半导体层的前提下,同时在发光二极管P、N发光面做图形粗化,保障发光二极管的电压以及抗击穿能力;(1) On the premise of not damaging the P-type semiconductor layer, at the same time, roughen the pattern on the P and N light-emitting surfaces of the light-emitting diodes to ensure the voltage and breakdown resistance of the light-emitting diodes;
(2)在金属颗粒上形成电流扩展层(TCL)有利于电流的扩散,电流扩展层也会由于金属颗粒的引入形成粗糙化图形,有利于提高LED的光萃取效率;(2) The formation of a current spreading layer (TCL) on the metal particles is conducive to the diffusion of the current, and the current spreading layer will also form a rough pattern due to the introduction of the metal particles, which is conducive to improving the light extraction efficiency of the LED;
(3)在发光二极管的图形粗化P、N发光面上制作P、N电极,P、N电极表面亦随之图案化,增强发光二极管封装时焊线的牢固性,从而降低LED芯片的失效几率。(3) P and N electrodes are made on the roughened P and N light-emitting surfaces of the light-emitting diode, and the surfaces of the P and N electrodes are also patterned to enhance the firmness of the bonding wire when the light-emitting diode is packaged, thereby reducing the failure of the LED chip probability.
附图说明Description of drawings
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In addition, the drawing data are descriptive summaries and are not drawn to scale.
图1为根据本发明实施的发光二极管芯片的流程示意图。FIG. 1 is a schematic flow diagram of a light emitting diode chip implemented according to the present invention.
图2~8为根据本发明实施的氮化镓基发光二极管制作工艺流程剖面示意图。2-8 are cross-sectional schematic diagrams of the manufacturing process flow of gallium nitride-based light-emitting diodes implemented according to the present invention.
图中各标号表示:100:衬底;200:发光外延层;201:N型半导体层;202:发光层;203:P型半导体层;204:粗化图形;300:金属膜层;301:金属颗粒;400:掩膜层;500:电流扩展层;600:N电极;700:P电极。The symbols in the figure indicate: 100: substrate; 200: light-emitting epitaxial layer; 201: N-type semiconductor layer; 202: light-emitting layer; 203: P-type semiconductor layer; 204: roughened pattern; 300: metal film layer; 301: Metal particle; 400: mask layer; 500: current spreading layer; 600: N electrode; 700: P electrode.
具体实施方式Detailed ways
下面将结合示意图对本发明进行更详细的描述,其中表示了本发明的优选实施例,应该理解本领域技术人员可以修改在此描述的本发明,而仍然实现本发明的有利效果。因此,下列描述应当被理解为对于本领域技术人员的广泛知道,而并不作为对本发明的限制。The present invention will be described in more detail below with reference to schematic diagrams, wherein preferred embodiments of the present invention are shown, and it should be understood that those skilled in the art can modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.
以下列举所述LED结构及其制作方法的实施例,以清楚说明本发明的内容,应当明确的是,本发明的内容并不限制于以下实施例,其他通过本领域普通技术人员的常规技术手段的改进亦在本发明的思想范围之内。The following lists the embodiments of the LED structure and its manufacturing method to clearly illustrate the content of the present invention. It should be clear that the content of the present invention is not limited to the following examples, other conventional technical means by those of ordinary skill in the art Improvements are also within the scope of the present invention.
实施例Example
本实施例提供一种氮化镓基发光二极管的制作方法,具体流程请参考图1,包括以下工艺步骤:This embodiment provides a method for manufacturing a gallium nitride-based light-emitting diode. Please refer to FIG. 1 for the specific process, including the following process steps:
步骤S11,提供一衬底,外延生长发光外延层。Step S11, providing a substrate, and epitaxially growing a light-emitting epitaxial layer.
步骤S12,在发光外延层上形成金属膜层。Step S12, forming a metal film layer on the light-emitting epitaxial layer.
步骤S13,采用快速热退火处理,使得金属膜层发生球聚,形成金属颗粒。In step S13 , a rapid thermal annealing treatment is adopted to cause the metal film layer to spheroidize to form metal particles.
步骤S14,发光外延层及金属颗粒上形成掩膜层,并对掩膜层进行图案化。Step S14 , forming a mask layer on the light-emitting epitaxial layer and the metal particles, and patterning the mask layer.
步骤S15,采用金属颗粒及掩膜层作为掩膜结构,进行蚀刻工艺,使得N型半导体层裸露出来,并将N型半导体层的上表面粗化。In step S15 , using the metal particles and the mask layer as a mask structure, an etching process is performed to expose the N-type semiconductor layer and roughen the upper surface of the N-type semiconductor layer.
步骤S16,去除所述掩膜层,并保留P型半导体层上的金属颗粒,进行芯片制程。In step S16, the mask layer is removed, and the metal particles on the P-type semiconductor layer are retained, and the chip manufacturing process is performed.
需要说明的是,发光二极管结构中的各层材料的选择为本领域技术人员的已知技术,可以根据需要灵活选择。本领域技术人员还可以根据需要加入以下可选步骤以进一步改善LED结构的发光效果:形成缓冲层(Buffer)、形成电子阻挡层(EBL)等等。此亦为本领域技术人员的已知技术,本文不赘述。It should be noted that the selection of materials for each layer in the light emitting diode structure is known to those skilled in the art, and can be flexibly selected according to needs. Those skilled in the art may also add the following optional steps to further improve the luminous effect of the LED structure as required: forming a buffer layer (Buffer), forming an electron blocking layer (EBL), and so on. This is also a known technology for those skilled in the art, and will not be described in detail herein.
为使本领域技术人员更好地理解本发明的发光二极管的制作方法,结合图2~图7介绍一个具体实施例。In order to enable those skilled in the art to better understand the manufacturing method of the light emitting diode of the present invention, a specific embodiment is introduced with reference to FIGS. 2 to 7 .
请参考图2所示,衬底100可以从以下一组材料中选出,该组材料包括:蓝宝石衬底、碳化硅衬底、硅衬底、氮化镓衬底及氧化锌衬底,在本实施例中,衬底100选取图形化蓝宝石衬底(PSS)。在衬底100上采用MOCVD沉积发光外延层200,材料可以包括氮化镓基材料、磷化镓基材料、镓氮磷基材料或氧化锌基材料。在本实施例中,发光外延层为氮化镓基材料,外延层包括自下至上依次层叠设置的N型半导体层201、发光层202和P型半导体层203,其中,N型半导体层201为N型氮化镓(GaN)层结构,发光层202为氮化铝镓(AlGaN)多量子阱有源层,P型半导体层203为P型AlGaN层,并定义发光外延层上表面分为P型区域与N型区域。本实施例中的发光外延层结构并不限于缓冲层-N型GaN层结构-AlGaN多量子阱有源层-P型AlGaN层,其它可以激发出光的外延层结构,如N型GaN层-(InGaN)/GaN多量子阱有源层-P型GaN层也在本发明的思想范围内。Please refer to FIG. 2, the substrate 100 can be selected from the following group of materials, the group of materials includes: sapphire substrate, silicon carbide substrate, silicon substrate, gallium nitride substrate and zinc oxide substrate, in In this embodiment, the substrate 100 is a patterned sapphire substrate (PSS). The light-emitting epitaxial layer 200 is deposited on the substrate 100 by MOCVD, and the material may include gallium nitride-based materials, gallium phosphide-based materials, gallium nitrogen phosphorus-based materials or zinc oxide-based materials. In this embodiment, the light-emitting epitaxial layer is a gallium nitride-based material, and the epitaxial layer includes an N-type semiconductor layer 201, a light-emitting layer 202, and a P-type semiconductor layer 203 that are sequentially stacked from bottom to top, wherein the N-type semiconductor layer 201 is N-type gallium nitride (GaN) layer structure, the light-emitting layer 202 is an aluminum gallium nitride (AlGaN) multi-quantum well active layer, the P-type semiconductor layer 203 is a P-type AlGaN layer, and the upper surface of the light-emitting epitaxial layer is divided into P Type region and N type region. The light-emitting epitaxial layer structure in this embodiment is not limited to the buffer layer-N-type GaN layer structure-AlGaN multi-quantum well active layer-P-type AlGaN layer, other epitaxial layer structures that can excite light, such as N-type GaN layer-( InGaN)/GaN multi-quantum well active layer-P-type GaN layer is also within the scope of the present invention.
请参考图3所示,在发光外延层200上形成金属膜层300,材料可以选用Ag或Pt,厚度介于2~500Å之间,沉积方法可以采用蒸镀或者溅镀或者原子层沉积或者其他镀膜方法,本实施例优选溅镀方法。Please refer to FIG. 3, a metal film layer 300 is formed on the light-emitting epitaxial layer 200, the material can be Ag or Pt, the thickness is between 2-500 Å, and the deposition method can be vapor deposition or sputtering or atomic layer deposition or other Coating method, sputtering method is preferred in this embodiment.
请参考图4所示,采用快速热退火处理(RTA熔合),使得金属膜层300发生球聚,形成金属颗粒301,金属颗粒的粒径为200~5000Å,可以通过快速热退火处理条件来调控,如处理温度为300~1000℃,时间为10s~10min,气氛包括氮气、氩气惰性气体。Please refer to Fig. 4, the rapid thermal annealing treatment (RTA fusion) is adopted to cause the metal film layer 300 to spheroidize to form metal particles 301. The particle size of the metal particles is 200~5000Å, which can be adjusted by the rapid thermal annealing treatment conditions. , such as the treatment temperature is 300 ~ 1000 ℃, the time is 10s ~ 10min, the atmosphere includes nitrogen, argon inert gas.
请参考图5所示,在发光外延层200及金属颗粒301上形成掩膜层400,并对掩膜层400进行图案化,使得N型区域裸露出来;掩膜层可以由光阻或氧化物或金属构成,本实施例优选光阻(PR)作为掩膜层。Please refer to FIG. 5, a mask layer 400 is formed on the light-emitting epitaxial layer 200 and the metal particles 301, and the mask layer 400 is patterned so that the N-type region is exposed; the mask layer can be made of photoresist or oxide or metal, this embodiment preferably uses photoresist (PR) as the mask layer.
请参考图6所示,采用Ag金属颗粒301及光阻掩膜层400作为掩膜结构,进行ICP干法蚀刻工艺,通过调节ICP气体比例(CF4、O2、Cl2、BCl3等)改变其对金属颗粒与半导体层的蚀刻速率,藉由金属颗粒与半导体层的不同蚀刻速率比,使得N型区域蚀刻至N型半导体层201裸露出来,并将N型半导体层201的上表面粗化,粗化图形204可以为锥状或者柱状或其他形状。Please refer to FIG. 6, using Ag metal particles 301 and photoresist mask layer 400 as a mask structure to perform ICP dry etching process, by adjusting the proportion of ICP gas (CF 4 , O 2 , Cl 2 , BCl 3 , etc.) Change its etch rate to the metal particles and the semiconductor layer, by the different etch rate ratios of the metal particles and the semiconductor layer, the N-type region is etched until the N-type semiconductor layer 201 is exposed, and the upper surface of the N-type semiconductor layer 201 is roughened. The roughening pattern 204 may be in the shape of a cone or a column or other shapes.
请参考图7所示,去除掩膜层,并保留P型半导体层上的金属颗粒301,接着在P型半导体层上制作电流扩展层500,电流扩展层(TCL)可以选择氧化铟锡(ITO)或氧化锌(ZnO)或氧化镉锡(CTO)或氧化铟(InO)或铟(In)掺杂氧化锌(ZnO)或铝(Al)掺杂氧化锌(ZnO)或镓(Ga)掺杂氧化锌(ZnO)或前述任意组合之一。Please refer to Figure 7, remove the mask layer, and keep the metal particles 301 on the P-type semiconductor layer, and then make a current spreading layer 500 on the P-type semiconductor layer, the current spreading layer (TCL) can choose indium tin oxide (ITO ) or zinc oxide (ZnO) or cadmium tin oxide (CTO) or indium oxide (InO) or indium (In) doped zinc oxide (ZnO) or aluminum (Al) doped zinc oxide (ZnO) or gallium (Ga) doped Zinc oxide (ZnO) or any combination of the foregoing.
请参考图8所示,制作金属电极层,即分别在粗化图形204上和电流扩展层500上制作N电极600和P电极700,完成常规的芯片制程。Referring to FIG. 8 , the metal electrode layer is fabricated, that is, the N electrode 600 and the P electrode 700 are respectively fabricated on the roughened pattern 204 and the current spreading layer 500 to complete the conventional chip manufacturing process.
通过上述制作工艺流程制作发光二极管,可以在不损伤P型半导体层的前提下,同时在发光二极管P、N发光面做图形粗化,保障发光二极管的电压以及抗击穿能力;在金属颗粒上形成电流扩展层(TCL)有利于电流的扩散,电流扩展层也会由于金属颗粒的引入形成粗糙化图形,有利于提高LED的光萃取效率;在发光二极管的图形粗化P、N发光面上制作P、N电极,P、N电极表面亦随之图案化,增强发光二极管封装时焊线的牢固性,从而降低LED芯片的失效几率。The light-emitting diode can be manufactured through the above-mentioned manufacturing process, and the pattern can be roughened on the P and N light-emitting surfaces of the light-emitting diode without damaging the P-type semiconductor layer, so as to ensure the voltage and breakdown resistance of the light-emitting diode; The current spreading layer (TCL) is conducive to the diffusion of current, and the current spreading layer will also form a roughened pattern due to the introduction of metal particles, which is conducive to improving the light extraction efficiency of the LED; it is made on the roughened P and N light-emitting surfaces of the light-emitting diode The P and N electrodes, and the surfaces of the P and N electrodes are also patterned to enhance the firmness of the bonding wires during the packaging of the light-emitting diode, thereby reducing the failure probability of the LED chip.
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.
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