CN107452840B - LED panel and manufacturing method thereof - Google Patents
LED panel and manufacturing method thereof Download PDFInfo
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- CN107452840B CN107452840B CN201710574667.6A CN201710574667A CN107452840B CN 107452840 B CN107452840 B CN 107452840B CN 201710574667 A CN201710574667 A CN 201710574667A CN 107452840 B CN107452840 B CN 107452840B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 118
- 239000011265 semifinished product Substances 0.000 claims abstract description 107
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 90
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 89
- 238000002955 isolation Methods 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 58
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 32
- 239000000243 solution Substances 0.000 claims description 32
- 239000000377 silicon dioxide Substances 0.000 claims description 23
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 22
- 239000000696 magnetic material Substances 0.000 claims description 22
- 235000012239 silicon dioxide Nutrition 0.000 claims description 20
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 16
- 238000005516 engineering process Methods 0.000 claims description 13
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 12
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 12
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- 229910052733 gallium Inorganic materials 0.000 claims description 12
- 239000007789 gas Substances 0.000 claims description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 239000012071 phase Substances 0.000 claims description 9
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 8
- 230000007797 corrosion Effects 0.000 claims description 8
- 238000005260 corrosion Methods 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 239000004332 silver Substances 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 8
- 238000001039 wet etching Methods 0.000 claims description 8
- 238000001259 photo etching Methods 0.000 claims description 7
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 6
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 239000004411 aluminium Substances 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910017083 AlN Inorganic materials 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 239000007792 gaseous phase Substances 0.000 claims description 3
- 239000011259 mixed solution Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims 2
- 229910052779 Neodymium Inorganic materials 0.000 claims 1
- 229910052742 iron Inorganic materials 0.000 claims 1
- 239000007788 liquid Substances 0.000 claims 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 10
- 239000000047 product Substances 0.000 abstract description 4
- 238000000926 separation method Methods 0.000 abstract description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 19
- 238000010586 diagram Methods 0.000 description 17
- 230000005389 magnetism Effects 0.000 description 10
- 229910052757 nitrogen Inorganic materials 0.000 description 9
- 238000000151 deposition Methods 0.000 description 8
- 229910052738 indium Inorganic materials 0.000 description 7
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 230000005381 magnetic domain Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000013467 fragmentation Methods 0.000 description 3
- 238000006062 fragmentation reaction Methods 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 238000009776 industrial production Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910017709 Ni Co Inorganic materials 0.000 description 2
- 229910003267 Ni-Co Inorganic materials 0.000 description 2
- 229910003262 Ni‐Co Inorganic materials 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000000306 component Substances 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 150000002910 rare earth metals Chemical class 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an LED panel and a manufacturing method thereof, and belongs to the technical field of semiconductors. The manufacturing method comprises the following steps: forming a plurality of chip semi-finished products on a substrate, wherein a P-type electrode in each chip semi-finished product is a magnet, and an isolation groove is formed between the chip semi-finished products; corroding the chip semi-finished product by an isolation groove wet method until the chip semi-finished product becomes an inverted cone and is separated from the substrate; arranging an electrode fixing block on the substrate, wherein one end of the electrode fixing block, which is far away from the substrate, and one end of the corresponding chip semi-finished product, which is far away from the P-type gallium nitride layer, of the P-type electrode are of unlike magnetic poles; putting all chip semi-finished products and the substrate into the same solution, and adsorbing the P-type electrode of each chip semi-finished product on the corresponding electrode fixing block under the action of magnetic force; arranging an insulating layer on each chip semi-finished product; and arranging an N-type electrode connecting wire on the insulating layer. The invention can avoid the damage of the chip breaking and the luminescent layer caused by the separation of the chip by the substrate splitting, and greatly improves the product yield.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of LED panel and preparation method thereof.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is that one kind can be converted to electric energy
The semiconductor diode of luminous energy has the characteristics that small in size, brightness is high and energy consumption is small, is widely used in display screen, backlight
Source and lighting area.The core component of LED is chip, and several chip proper alignments form LED panel on substrate.
The production method of existing LED panel include: sequentially form on substrate buffer layer, n type semiconductor layer, luminescent layer and
P type semiconductor layer；The groove for extending to n type semiconductor layer, the n type semiconductor layer in groove are opened up on p type semiconductor layer
It is upper to form the isolation channel for extending to substrate；N-type electrode is formed on n type semiconductor layer in groove, the shape on p type semiconductor layer
At P-type electrode；Substrate is adhered on blue film, the extending direction along isolation channel cleaves substrate, forms several mutually independent cores
Piece；Blue film is extended, mutually independent chip is separated；Chip after separation is separately fixed on substrate, LED panel is formed.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
Micro-led (English abbreviation: Micro LED) chip is that size reaches micron-sized LED chip, if
Micro LED chip is handled according to the production method of existing LED panel, fragmentation and luminescent layer is be easy to cause to damage when cleaving substrate
Wound, product yield is too low, can not carry out industrial production.
Summary of the invention
In order to solve problems in the prior art, the embodiment of the invention provides a kind of LED panels and preparation method thereof.It is described
Technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of production method of LED panel, the production method includes:
Several mutually independent chip semi-finished product are formed on the substrate, each chip semi-finished product include being sequentially laminated on
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and P-type electrode on the substrate, the P-type electrode
For magnet, the isolation channel that the substrate is extended to from the P-type electrode is equipped between the two neighboring chip semi-finished product；
By chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become inverted cone with
The substrate separates, and the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product；
Setting and the one-to-one electrode fixed block of the chip semi-finished product on substrate, the electrode fixed block are magnetic
Body, P-type electrode described in the electrode fixed block one end and the corresponding chip semi-finished product far from the substrate is far from institute
The one end for stating p-type gallium nitride layer is synonyms pole；
All chip semi-finished product and the substrate are put into same solution, the p-type of each chip semi-finished product
Electrode is adsorbed under the magnetic force on the corresponding electrode fixed block；
Setting extends to the insulating layer of the substrate from the n type gallium nitride layer on each chip semi-finished product；
On the insulating layer be arranged N-type electrode connecting line, the both ends of the N-type electrode connecting line respectively with the N-type
Gallium nitride layer is connected with the substrate.
Optionally, described that several mutually independent chip semi-finished product, each chip semi-finished product packet is formed on the substrate
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and the P-type electrode stacked gradually over the substrate is included,
The P-type electrode is magnet, is equipped between the two neighboring chip semi-finished product from the P-type electrode and extends to the substrate
Isolation channel, comprising:
Using metallo-organic compound chemical gaseous phase deposition technology successively growing aluminum nitride buffer layer, N-type nitrogen on substrate
Change gallium layer, luminescent layer, p-type gallium nitride layer；
The photoresist of the first figure is formed on the p-type gallium nitride layer using photoetching technique；
Using physical gas phase deposition technology in the photoresist of first figure and the photoresist of first figure
P-type electrode is formed on the p-type gallium nitride layer of exposing；
The P-type electrode is put into the first magnetic field and is magnetized, direction and the P-type electrode in first magnetic field
Stacking direction is parallel, until the P-type electrode becomes magnet；
Silicon dioxide layer is formed in the P-type electrode using physical gas phase deposition technology；
Remove the photoresist of first figure；
P-type gallium nitride layer, the luminescent layer described in dry etching and the n type gallium nitride layer form isolation channel.
Optionally, described by chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become
It is separated at inverted cone with the substrate, the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product, comprising:
The chip semi-finished product are immersed in etchant solution, the etchant solution is to p-type electricity in the chip semi-finished product
The chip semi-finished product in silicon dioxide layer, the isolation channel on extremely are corroded, and the etchant solution is phosphoric acid solution, sulfuric acid
The mixed solution of solution or phosphoric acid and sulfuric acid.
Optionally, the temperature of the etchant solution is 200 DEG C~250 DEG C.
Optionally, the silicon dioxide layer with a thickness of 100nm~5000nm.
Optionally, the P-type electrode includes the reflecting layer being sequentially laminated on the p-type gallium nitride layer and magnet layer.
Optionally, the material of the magnet layer uses nickel or neodium magnet.
Optionally, when the material of the magnet layer uses nickel, the material in the reflecting layer is using silver；When the magnet layer
Material when using neodium magnet, the material in the reflecting layer is using silver, aluminium, gold or platinum.
Optionally, the setting on substrate and the one-to-one electrode fixed block of the chip semi-finished product, the electrode
Fixed block is magnet, p-type described in the electrode fixed block one end and the corresponding chip semi-finished product far from the substrate
The one end of electrode far from the p-type gallium nitride layer is synonyms pole, comprising:
The photoresist of second graph is formed on substrate using photoetching technique；
Using physical gas phase deposition technology in the photoresist of the second graph and the photoresist of the second graph
Magnetic material is laid on the substrate of exposing；
The photoresist of the second graph is removed, the magnetic material on the substrate forms electrode fixed block；
The electrode fixed block is put into the second magnetic field and is magnetized, the direction in second magnetic field and first magnetic
It is contrary, until the electrode fixed block becomes magnet, one end far from the substrate of the electrode fixed block and right
The one end of P-type electrode described in the chip semi-finished product answered far from the p-type gallium nitride layer is synonyms pole.
On the other hand, the embodiment of the invention provides a kind of LED panel, the LED panel includes that substrate, several electrodes are solid
Determine block and with the one-to-one chip of electrode fixed block, several electrode fixed blocks are respectively set on the substrate,
Each chip includes aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer, P-type electrode, N-type electrode company
Wiring and insulating layer, P-type electrode, p-type gallium nitride layer, luminescent layer, n type gallium nitride layer, aluminum nitride buffer layer in the chip
It is sequentially laminated on the corresponding electrode fixed block and forms cone, the insulating layer is arranged on the cone and from described
N type gallium nitride layer extends to the substrate, the N-type electrode connecting line be arranged on the insulating layer and both ends respectively with it is described
N type gallium nitride layer is connected with the substrate.
Technical solution provided in an embodiment of the present invention has the benefit that
The isolation of substrate is extended to from P-type electrode by being arranged between two neighboring chip semi-finished product formed on a substrate
Slot, and isolation channel wet etching chip semi-finished product are utilized, it is slow since aluminium nitride on substrate is laminated in chip semi-finished product at first
The corrosion rate for rushing layer is most fast, therefore chip semi-finished product are etched into inverted cone and separate with substrate, and each chip semi-finished product become
At the individual being kept completely separate, fragmentation and luminescent layer can be caused to damage to avoid due to splitting substrate separating chips, substantially increased
Product yield is particularly suitable for the industrial production of Micro LED.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of flow chart of the production method for LED panel that the embodiment of the present invention one provides；
Fig. 2 a- Fig. 2 g is the structural schematic diagram of chip semi-finished product in the manufacturing process of the offer of the embodiment of the present invention one；
Fig. 3 a- Fig. 3 c is the structural schematic diagram for the substrate that the embodiment of the present invention one provides；
Fig. 4 a- Fig. 4 c is the structural schematic diagram for the LED panel that the embodiment of the present invention one provides；
Fig. 5 is a kind of structural schematic diagram of LED panel provided by Embodiment 2 of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
The embodiment of the invention provides a kind of production methods of LED panel, and referring to Fig. 1, which includes:
Step 101: several mutually independent chip semi-finished product are formed on the substrate, each chip semi-finished product include successively layer
Folded aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and P-type electrode on substrate, P-type electrode is magnetic
Body is equipped with the isolation channel that substrate is extended to from P-type electrode between two neighboring chip semi-finished product.
Optionally, the maximum distance on the surface of chip semi-finished product and substrate contact between two o'clock can be 3 μm~15 μm.
Specifically, which may include:
The first step, using metallo-organic compound chemical gaseous phase deposition technology (English: Metal Organic Chemical
Vapor Deposition, referred to as: MOCVD) successively growing aluminum nitride (AlN) buffer layer, n type gallium nitride (GaN) on substrate
Layer, luminescent layer, p-type gallium nitride layer.
Fig. 2 a is the structural schematic diagram of chip semi-finished product after the first step executes.Wherein, 11 be substrate, and 12 is slow for aluminium nitride
Layer is rushed, 13 be n type gallium nitride layer, and 14 be luminescent layer, and 15 be p-type gallium nitride layer.As shown in Figure 2 a, aluminum nitride buffer layer 12, N-type
Gallium nitride layer 13, luminescent layer 14, p-type gallium nitride layer 15 are sequentially laminated on substrate 11.
In the concrete realization, high-purity hydrogen (H can be used2) or high pure nitrogen (N2) or high-purity H2And high-purity N2Mixing
Gas is as carrier gas, high-purity N H3As nitrogen source, trimethyl gallium (TMGa) and triethyl-gallium (TEGa) are used as gallium source, trimethyl indium
(TMIn) it is used as indium source, trimethyl aluminium (TMAl) is used as silicon source, and silane (SiH4) is used as N type dopant, two luxuriant magnesium (CP2Mg) make
For P-type dopant.Chamber pressure is controlled in 100~600torr.
Specifically, substrate can be Sapphire Substrate, or silicon substrate.Luminescent layer may include multiple indium gallium nitrogen layers
With multiple gallium nitride layers, multiple indium gallium nitrogen layers and the alternately laminated setting of multiple gallium nitride layers.
More specifically, the thickness of substrate can be 400 microns, the thickness of aluminum nitride buffer layer can be 200 nanometers, N-type
The sum of thickness of gallium nitride layer, luminescent layer and p-type gallium nitride layer can be 5 microns, indium gallium nitrogen layer and gallium nitride layer in luminescent layer
The sum of the number of plies can be 16 layers.
Second step forms the photoresist of the first figure using photoetching technique on p-type gallium nitride layer.
Fig. 2 b is the structural schematic diagram of chip semi-finished product after second step executes.Wherein, 10 be the first figure photoresist.
As shown in Figure 2 b, the photoresist 10 of the first figure, which is arranged on the position where isolation channel, (is detailed in the 6th step).
In practical applications, a layer photoresist can be first laid on p-type gallium nitride layer, then to right under the blocking of mask plate
Photoresist is exposed, and finally impregnates the photoresist after exposure in developer solution, and part photoresist dissolves in developer solution, stays
The photoresist of lower first figure.
Third step, using physical gas phase deposition technology (English: Physical Vapor Deposition, abbreviation: PVD)
P-type electrode is formed on the p-type gallium nitride layer exposed in the photoresist of the first figure and the photoresist of the first figure.
Fig. 2 c is the structural schematic diagram of chip semi-finished product after third step executes.Wherein, 16 be P-type electrode.Such as Fig. 2 c institute
Show, the p-type gallium nitride exposed in the photoresist 10 of the first figure and the photoresist 10 of the first figure is arranged in simultaneously in P-type electrode 16
On layer 15, since height is different, the P-type electrode 16 on the photoresist 10 of the first figure is set and is arranged in p-type gallium nitride
P-type electrode 16 on layer 15 does not link together.
Optionally, P-type electrode may include the reflecting layer being sequentially laminated on p-type gallium nitride layer and magnet layer.Reflecting layer
The direction that can change directive P-type electrode increases the light extraction efficiency of chip.
Preferably, the material of magnet layer can use nickel or neodium magnet, magnetic preferable.
Further, when the material of magnet layer uses nickel, the material in reflecting layer can be using silver-colored (Ag)；When magnet layer
When material uses neodium magnet, the material in reflecting layer can be using silver, aluminium (Al), golden (Au) or platinum (Pt), with magnetospheric
With preferable.
Specifically, the thickness of P-type electrode can be 0.1 μm~1 μm.If the thickness of P-type electrode, can not less than 0.1 μm
It is secured firmly to (be detailed in step 104) on electrode fixed block；If the thickness of P-type electrode is greater than 1 μm, the waste of material is caused.
P-type electrode is put into the first magnetic field and magnetizes by the 4th step, the direction in the first magnetic field and the stacking of P-type electrode
Direction is parallel, until P-type electrode becomes magnet.
It should be noted that the inside of magnetic material has magnetic domain, they are confusedly accumulated as numerous small magnets, respectively
From magnetism cancel out each other, it is whole externally without magnetism.If magnetic material is put into the environment of external magnetic field, these small magnets
It is rotated with the magnetic moment of magnetic field interaction, magnetic domain to the direction in magnetic field, respective magnetism is no longer cancel out, and display is magnetic outward.This
When leave magnetic field, magnetism will not disappear, and the magnetic history of magnetic material is completed.The present embodiment first uses magnetic material to make P
Type electrode, then p-type is magnetized, P-type electrode can be made to become magnet.
5th step forms silica (SiO using physical gas phase deposition technology in P-type electrode2) layer.
Fig. 2 d is the structural schematic diagram of chip semi-finished product after the 5th step executes.Wherein, 20 be silicon dioxide layer.Such as Fig. 2 d
It is shown, also due to height is different, silicon dioxide layer 20 on the photoresist 10 of the first figure and it is located at p-type gallium nitride
Silicon dioxide layer 20 on layer 15 is also not attached to together.
Optionally, the thickness of silicon dioxide layer can be 100nm~5000nm.If the thickness of silicon dioxide layer is less than
100nm, then silicon dioxide layer not can avoid following P-type electrode progress wet etching and (be detailed in step 102), and then can not be formed
The chip semi-finished product of cone shape；If the thickness of silicon dioxide layer is greater than 5000nm, it will cause the waste of material, and also it is subsequent
It also needs individually to remove extra silicon dioxide layer, increases unnecessary step, increase production cost.
6th step removes the photoresist of the first figure.
Fig. 2 e is the structural schematic diagram of chip semi-finished product after the 6th step executes.As shown in Figure 2 e, with the first figure
The removal of photoresist 10, P-type electrode 16 and silicon dioxide layer 20 on the photoresist 10 of the first figure are also removed together,
Leave the P-type electrode 16 and silicon dioxide layer 20 being located on p-type gallium nitride layer 15.
In practical applications, the photoresist of the first figure can be immersed in glue, photoresist can be dissolved in
In glue.
7th step, dry etching p-type gallium nitride layer, luminescent layer and n type gallium nitride layer form isolation channel.
Fig. 2 f is the structural schematic diagram of chip semi-finished product after the 7th step executes.Wherein, 30 be isolation channel.Such as Fig. 2 f institute
Show, isolation channel 30 extends to substrate 11 from P-type electrode 16, and n type gallium nitride layer 12 etc. is divided into several mutually independent chips
The component part of semi-finished product.
Step 102: by isolation channel wet etching chip semi-finished product, until chip semi-finished product become inverted cone and substrate
It separates, the corrosion rate of aluminum nitride buffer layer is most fast in chip semi-finished product.
Fig. 2 g is the structural schematic diagram of chip semi-finished product after step 102 executes.As shown in Figure 2 g, 20 quilt of silicon dioxide layer
It erodes, the core that aluminum nitride buffer layer 12, n type gallium nitride layer 13, luminescent layer 14, p-type gallium nitride layer 15 and P-type electrode 16 form
Piece semi-finished product are etched into inverted cone, only one point connection between inverted cone and substrate 11, therefore separate.
Specifically, which may include:
Chip semi-finished product are immersed in etchant solution, etchant solution is to the titanium dioxide in P-type electrode in chip semi-finished product
Chip semi-finished product in silicon layer, isolation channel are corroded, and etchant solution is phosphoric acid solution, sulfuric acid solution or phosphoric acid and sulfuric acid
Mixed solution.
Preferably, the temperature of etchant solution can be 200 DEG C~250 DEG C.If the temperature of etchant solution is lower than 200 DEG C,
Corrosion rate is slower, and production efficiency is lower；If the temperature of etchant solution is higher than 250 DEG C, it is be easy to cause excessive erosion, can not be formed
The chip semi-finished product of cone shape.
In practical applications, as fruit chip semi-finished product become also to retain in P-type electrode after inverted cone separates with substrate
There is silicon dioxide layer, then P-type electrode can be immersed in hydrofluoric acid, removes silicon dioxide layer.
Step 103: setting and the one-to-one electrode fixed block of chip semi-finished product on substrate, electrode fixed block are magnetic
Body, the one end of P-type electrode far from p-type gallium nitride layer is in electrode fixed block one end and corresponding chip semi-finished product far from substrate
Synonyms pole.
For example, the one end of electrode fixed block far from substrate is north (English: North, abbreviation: N) pole, electrode fixed block is corresponding
Chip semi-finished product in P-type electrode far from p-type gallium nitride layer one end be south (English: South, referred to as: S) pole；For another example, electrode
The one end of fixed block far from substrate is the South Pole, and P-type electrode is far from p-type gallium nitride layer in the corresponding chip semi-finished product of electrode fixed block
One end be the arctic.
In the concrete realization, substrate is equipped with driving circuit, and P-type electrode is being accessed power supply just by electrode fixed block
Pole, N-type electrode connecting line (are detailed in the cathode of step 106) access power supply.
Specifically, which may include:
The first step forms the photoresist of second graph using photoetching technique on substrate.
Fig. 3 a is the structural schematic diagram of the metacoxal plate of first step execution.Wherein, 21 be substrate, and 40 be the photoetching of second graph
Glue.As shown in Figure 3a, the photoresist 40 of second graph is located on the region on substrate 21 in addition to electrode fixed block is arranged and (is detailed in
Third step).
In practical applications, can first be laid with a layer photoresist on substrate, then under the blocking of mask plate to photoresist
It is exposed, finally impregnates the photoresist after exposure in developer solution, part photoresist dissolves in developer solution, leaves second
The photoresist of figure.
Second step, using physical gas phase deposition technology in the photoresist of second graph and the photoresist of second graph
Magnetic material is laid on the substrate of exposing.
Fig. 3 b is the structural schematic diagram of the metacoxal plate of second step execution.Wherein, 50 be magnetic material.As shown in Figure 3b, magnetic
Property material 50 simultaneously be arranged on the substrate 21 exposed in the photoresist 40 of second graph and the photoresist 40 of second graph, due to
It is highly different, the magnetic material 50 of the magnetic material 50 on the photoresist 40 of second graph and setting on the base plate (21 is set
It does not link together.
Third step removes the photoresist of second graph, and the magnetic material on substrate forms electrode fixed block.
Fig. 3 c is the structural schematic diagram of the metacoxal plate of third step execution.Wherein, 22 be electrode fixed block.As shown in Figure 3c,
With the removal of the photoresist 40 of second graph, the magnetic material 50 on the photoresist 40 of second graph is also gone together
It removes, the magnetic material 50 left on substrate 21 becomes electrode fixed block 22.
Electrode fixed block is put into the second magnetic field and magnetizes by the 4th step, the direction in the second magnetic field and the first magnetic field
It is contrary, until electrode fixed block becomes magnet, P in electrode fixed block one end and corresponding chip semi-finished product far from substrate
The one end of type electrode far from p-type gallium nitride layer is synonyms pole.
It should be noted that the inside of magnetic material has magnetic domain, they are confusedly accumulated as numerous small magnets, respectively
From magnetism cancel out each other, it is whole externally without magnetism.If magnetic material is put into the environment of external magnetic field, these small magnets
It is rotated with the magnetic moment of magnetic field interaction, magnetic domain to the direction in magnetic field, respective magnetism is no longer cancel out, and display is magnetic outward.This
When leave magnetic field, magnetism will not disappear, and the magnetic history of magnetic material is completed.The present embodiment passes through the direction in control magnetic field,
So that the one end of P-type electrode far from p-type gallium nitride layer in electrode fixed block one end and corresponding chip semi-finished product far from substrate
For synonyms pole.
Optionally, magnetic material can be Al-Ni-Co series permanent-magnet alloy, siderochrome cobalt system permanent-magnet alloy, permanent-magnet ferrite, dilute
Native permanent-magnet material or composite permanent-magnetic material.By using permanent-magnet material, so that the magnetism of magnet is constant, it can be ensured that electrode is solid
Determine the secured connection of block and P-type electrode.
Step 104: all chip semi-finished product and substrate being put into same solution, the P-type electrode of each chip semi-finished product
It is adsorbed on corresponding electrode fixed block under the magnetic force.
Fig. 4 a is the structural schematic diagram of LED panel after step 104 executes.As shown in fig. 4 a, the P of each chip semi-finished product
Type electrode 16 is adsorbed on corresponding electrode fixed block 22.
In the concrete realization, solution can be contained in beaker container.
Optionally, solution can be acetone soln.Acetone can volatilize, it is easy to which removal is clean, handles more convenient.
Step 105: setting extends to the insulating layer of substrate from n type gallium nitride layer on each chip semi-finished product.
Fig. 4 b is the structural schematic diagram of LED panel after step 105 executes.Wherein, 17 be insulating layer.As shown in Figure 4 b,
Insulating layer 17 reaches substrate 21 by luminescent layer 14, p-type gallium nitride layer 15, P-type electrode 16 from n type gallium nitride layer 13.
Optionally, the material of insulating layer can use silica, and cost of implementation is low.
Specifically, which may include:
The photoresist of third figure is formed on chip semi-finished product and substrate；
It is laid on the chip semi-finished product and substrate exposed in the photoresist of third figure and the photoresist of third figure
Insulating materials；
The photoresist of third figure is removed, the insulating materials on chip semi-finished product and substrate forms insulating layer.
It is readily apparent that, the forming process of insulating layer is similar with silicon dioxide layer, and this will not be detailed here.
Step 106: N-type electrode connecting line is set on the insulating layer, and the both ends of N-type electrode connecting line are nitrogenized with N-type respectively
Gallium layer is connected with substrate.
Fig. 4 c is the structural schematic diagram of LED panel after step 106 executes.Wherein, 18 be N-type electrode connecting line.Such as figure
Shown in 4c, N-type electrode connecting line 18 reaches substrate 21 by insulating layer 17 from n type gallium nitride layer 13.
Specifically, the material of N-type electrode line can be the metal that electric conductivity is good and can be reflective, such as silver.
Specifically, which may include:
The photoresist of the 4th figure is formed on chip semi-finished product, substrate and insulating layer；
Chip semi-finished product, substrate and the insulation exposed in the photoresist of the 4th figure and the photoresist of the 4th figure
Electrode material is laid on layer；
The photoresist of the 4th figure is removed, the electrode material on chip semi-finished product, substrate and insulating layer forms N-type electrode and connects
Wiring.
It is readily apparent that, the forming process of N-type electrode connecting line is similar with P-type electrode, and this will not be detailed here.
The embodiment of the present invention is extended by being arranged between two neighboring chip semi-finished product formed on a substrate from P-type electrode
To the isolation channel of substrate, and isolation channel wet etching chip semi-finished product are utilized, due to being layered in substrate at first in chip semi-finished product
On aluminum nitride buffer layer corrosion rate it is most fast, therefore chip semi-finished product are etched into inverted cone and separate with substrate, each
Chip semi-finished product become the individual being kept completely separate, and fragmentation and luminescent layer can be caused to damage to avoid due to splitting substrate separating chips
Wound, substantially increases product yield, is particularly suitable for the industrial production of Micro LED.And electrode fixed block is far from substrate
The one end of P-type electrode far from p-type gallium nitride layer is synonyms pole, each chip semi-finished product in one end and corresponding chip semi-finished product
P-type electrode the flood tide of chip semi-finished product may be implemented on corresponding electrode fixed block in automatic absorbing under the magnetic force
Transfer, it is simple and convenient rapid, further greatly increase the production efficiency.
Embodiment two
The embodiment of the invention provides a kind of LED panels, suitable for the production method production provided using embodiment one, ginseng
See Fig. 5, the LED panel include substrate 21, several electrode fixed blocks 22 and with the one-to-one chip of electrode fixed block 22, it is several
Electrode fixed block 22 is respectively set on the base plate (21, and each chip includes aluminum nitride buffer layer 12, n type gallium nitride layer 13, shines
Layer 14, p-type gallium nitride layer 15, P-type electrode 16, insulating layer 17 and N-type electrode connecting line 18, P-type electrode 16, p-type in chip
Gallium nitride layer 15, luminescent layer 14, n type gallium nitride layer 13, aluminum nitride buffer layer 12 are sequentially laminated on corresponding electrode fixed block 22
Upper formation cone, insulating layer 17 are arranged on 1 cone and extend to substrate 21, N-type electrode connecting line from n type gallium nitride layer 13
18 settings are on insulating layer 17 and both ends are connect with n type gallium nitride layer 13 and substrate 21 respectively.
Optionally, the maximum distance on the surface that chip is in contact with substrate between two o'clock can be 3 μm~15 μm.
Specifically, luminescent layer may include multiple indium gallium nitrogen layers and multiple gallium nitride layers, multiple indium gallium nitrogen layers and multiple nitrogen
Change the alternately laminated setting of gallium layer.
More specifically, the thickness of aluminum nitride buffer layer can be 200 nanometers, n type gallium nitride layer, luminescent layer and p-type nitridation
The sum of thickness of gallium layer can be 5 microns, and the sum of number of plies of indium gallium nitrogen layer and gallium nitride layer can be 16 layers in luminescent layer.
Optionally, P-type electrode may include the reflecting layer being sequentially laminated on p-type gallium nitride layer and magnet layer.Reflecting layer
The direction that can change directive P-type electrode increases the light extraction efficiency of chip.
Preferably, the material of magnet layer can use nickel or neodium magnet, magnetic preferable.
Further, when the material of magnet layer uses nickel, the material in reflecting layer can be using silver-colored (Ag)；When magnet layer
When material uses neodium magnet, the material in reflecting layer can be using silver, aluminium (Al), golden (Au) or platinum (Pt), with magnetospheric
With preferable.
Specifically, the thickness of P-type electrode can be 0.1 μm~1 μm.If the thickness of P-type electrode, can not less than 0.1 μm
It is secured firmly on electrode fixed block；If the thickness of P-type electrode is greater than 1 μm, the waste of material is caused.
Optionally, the material of electrode fixed block can be Al-Ni-Co series permanent-magnet alloy, siderochrome cobalt system permanent-magnet alloy, permanent magnet
Oxysome, rare earth permanent-magnetic material or composite permanent-magnetic material.By using permanent-magnet material, so that the magnetism of magnet is constant, it can be true
Protect the secured connection of electrode fixed block and P-type electrode.
Specifically, the material of edge layer can use silica, and cost of implementation is low；The material of N-type electrode line can be to lead
The metal that electrical property is good and energy is reflective, such as silver.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of production method of LED panel, which is characterized in that the production method includes:
Several mutually independent chip semi-finished product are formed on the substrate, each chip semi-finished product are described including being sequentially laminated on
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer and P-type electrode on substrate, the P-type electrode are magnetic
Body is equipped with the isolation channel that the substrate is extended to from the P-type electrode between the two neighboring chip semi-finished product；
By chip semi-finished product described in the isolation channel wet etching, until the chip semi-finished product become inverted cone with it is described
Substrate separates, and the corrosion rate of aluminum nitride buffer layer is most fast in the chip semi-finished product；
Setting and the one-to-one electrode fixed block of the chip semi-finished product on substrate, the electrode fixed block are magnet, institute
P-type electrode described in electrode fixed block one end and the corresponding chip semi-finished product far from the substrate is stated far from the p-type
One end of gallium nitride layer is synonyms pole；
All chip semi-finished product and the substrate are put into same solution, the P-type electrode of each chip semi-finished product
It is adsorbed on the corresponding electrode fixed block under the magnetic force；
Setting extends to the insulating layer of the substrate from the n type gallium nitride layer on each chip semi-finished product；
N-type electrode connecting line is set on the insulating layer, and the both ends of the N-type electrode connecting line are nitrogenized with the N-type respectively
Gallium layer is connected with the substrate.
2. manufacturing method according to claim 1, which is characterized in that described that several mutually independent cores are formed on the substrate
Piece semi-finished product, each chip semi-finished product include aluminum nitride buffer layer, the n type gallium nitride stacked gradually over the substrate
Layer, luminescent layer, p-type gallium nitride layer and P-type electrode, the P-type electrode are magnet, are set between the two neighboring chip semi-finished product
There is the isolation channel that the substrate is extended to from the P-type electrode, comprising:
Using metallo-organic compound chemical gaseous phase deposition technology successively growing aluminum nitride buffer layer, n type gallium nitride on substrate
Layer, luminescent layer, p-type gallium nitride layer；
The photoresist of the first figure is formed on the p-type gallium nitride layer using photoetching technique；
Exposed in the photoresist of first figure and the photoresist of first figure using physical gas phase deposition technology
P-type gallium nitride layer on form P-type electrode；
The P-type electrode is put into the first magnetic field and is magnetized, the direction in first magnetic field and the stacking of the P-type electrode
Direction is parallel, until the P-type electrode becomes magnet；
Silicon dioxide layer is formed in the P-type electrode using physical gas phase deposition technology；
Remove the photoresist of first figure；
P-type gallium nitride layer, the luminescent layer described in dry etching and the n type gallium nitride layer form isolation channel.
3. production method according to claim 2, which is characterized in that described to pass through core described in the isolation channel wet etching
Piece semi-finished product are separated until the chip semi-finished product become inverted cone with the substrate, aluminium nitride in the chip semi-finished product
The corrosion rate of buffer layer is most fast, comprising:
The chip semi-finished product are immersed in etchant solution, the etchant solution is in P-type electrode in the chip semi-finished product
Silicon dioxide layer, the chip semi-finished product in the isolation channel corroded, the etchant solution is that phosphoric acid solution, sulfuric acid are molten
The mixed solution of liquid or phosphoric acid and sulfuric acid.
4. production method according to claim 3, which is characterized in that the temperature of the etchant solution is 200 DEG C~250
℃。
5. according to the described in any item production methods of claim 2~4, which is characterized in that the silicon dioxide layer with a thickness of
100nm~5000nm.
6. according to the described in any item production methods of claim 2~4, which is characterized in that the P-type electrode includes stacking gradually
Reflecting layer and magnet layer on the p-type gallium nitride layer.
7. production method according to claim 6, which is characterized in that the material of the magnet layer uses nickel or neodymium magnetic
Iron.
8. production method according to claim 7, which is characterized in that described when the material of the magnet layer uses nickel
The material in reflecting layer is using silver；When the material of the magnet layer uses neodium magnet, the material in the reflecting layer using silver, aluminium,
Gold or platinum.
9. according to the described in any item production methods of claim 2~4, which is characterized in that it is described on substrate setting with it is described
The one-to-one electrode fixed block of chip semi-finished product, the electrode fixed block are magnet, and the electrode fixed block is far from the base
The one end of P-type electrode described in one end of plate and the corresponding chip semi-finished product far from the p-type gallium nitride layer is different name magnetic
Pole, comprising:
The photoresist of second graph is formed on substrate using photoetching technique；
Exposed in the photoresist of the second graph and the photoresist of the second graph using physical gas phase deposition technology
Substrate on be laid with magnetic material；
The photoresist of the second graph is removed, the magnetic material on the substrate forms electrode fixed block；
The electrode fixed block is put into the second magnetic field and is magnetized, the direction in second magnetic field and first magnetic field
It is contrary, until the electrode fixed block becomes magnet, one end far from the substrate of the electrode fixed block and corresponding
The one end of P-type electrode described in the chip semi-finished product far from the p-type gallium nitride layer is synonyms pole.
10. a kind of LED panel, which is characterized in that the LED panel include substrate, several electrode fixed blocks and with the electrode
The one-to-one chip of fixed block, several electrode fixed blocks are respectively set on the substrate, and each chip includes
Aluminum nitride buffer layer, n type gallium nitride layer, luminescent layer, p-type gallium nitride layer, P-type electrode, N-type electrode connecting line and insulating layer, institute
State the P-type electrode in chip, p-type gallium nitride layer, luminescent layer, n type gallium nitride layer, aluminum nitride buffer layer be sequentially laminated on it is corresponding
Cone is formed on the electrode fixed block, the insulating layer is arranged on the cone and extends from the n type gallium nitride layer
To the substrate, the N-type electrode connecting line be arranged on the insulating layer and both ends respectively with the n type gallium nitride layer and institute
State substrate connection；The electrode fixed block and the P-type electrode are magnet, the electrode fixed block far from the substrate one
The one end of end with the P-type electrode far from the p-type gallium nitride layer is synonyms pole.
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| US11177154B2 (en) | 2017-12-19 | 2021-11-16 | Pixeled Display Co., Ltd. | Carrier structure and micro device structure |
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| TWI647742B (en) * | 2018-04-19 | 2019-01-11 | 友達光電股份有限公司 | Light emitting device and method of manufacturing same |
| CN108682312B (en) * | 2018-05-12 | 2020-11-06 | 汕头超声显示器技术有限公司 | Manufacturing method of LED array device |
| CN110739375A (en) * | 2018-07-18 | 2020-01-31 | 亿光电子工业股份有限公司 | Light emitting diode chip, light emitting diode display device and manufacturing method thereof |
| CN108962042B (en) * | 2018-07-23 | 2021-04-02 | 上海天马微电子有限公司 | Display panel and manufacturing method thereof |
| CN111129245B (en) * | 2018-10-31 | 2022-09-06 | 成都辰显光电有限公司 | LED chip, display panel and display panel's equipment |
| CN111162064B (en) * | 2018-11-08 | 2022-03-25 | 成都辰显光电有限公司 | LED unit, guide plate, LED display and manufacturing method thereof |
| CN113397502B (en) * | 2021-05-28 | 2022-11-08 | 北京理工大学 | Multimode data acquisition equipment based on neural feedback |
| CN113594339B (en) * | 2021-07-02 | 2023-08-01 | 深圳市华星光电半导体显示技术有限公司 | Panel and preparation method thereof |
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