CN106299073B - LED wafer and forming method thereof - Google Patents
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- CN106299073B CN106299073B CN201610876735.XA CN201610876735A CN106299073B CN 106299073 B CN106299073 B CN 106299073B CN 201610876735 A CN201610876735 A CN 201610876735A CN 106299073 B CN106299073 B CN 106299073B
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
Abstract
A kind of LED wafer and forming method thereof, technical solution of the present invention is by forming first electrode layer on the operation substrate floor；The first through hole through the operation substrate is formed at Cutting Road intersection location and forms conductive material on the first through hole side wall that separation layer exposes, to form the second electrode lay.In technical solution of the present invention, the connection of first semiconductor layer and second semiconductor layer and external circuit can be directly realized by the first electrode layer and the second electrode lay, so the LED wafer needs not move through scribing process and can be used, to simplify processing step, manufacturing cost is reduced.
Description
Technical field
The present invention relates to field of semiconductor illumination, in particular to a kind of LED wafer and forming method thereof.
Background technique
Light emitting diode (LED) is in response to electric current and is excited to generate the semiconductor devices of the light of various colors.Its
In, with gallium nitride (GaN) be representative Group III-V compound semiconductor due to wide with band gap, luminous efficiency is high, electronics saturation
The features such as drift velocity is high, chemical property is stablized is led in opto-electronic devices such as high brightness blue light-emitting diode, blue lasers
There is huge application potential in domain, causes the extensive concern of people.
It is distinguished from structural point, light emitting diode can be divided into positive assembling structure, inverted structure and vertical structure.Wherein,
It is excellent that the light emitting diode of vertical structure has that radiating efficiency is high, carrying electric current is big, luminous intensity is high, power consumption is small, the service life is long etc.
Point.So a kind of solution of the light emitting diode of vertical structure as large-power light-emitting diodes, increasingly by industry
More concerns and research.
Two electrodes of the light-emitting diode chip for backlight unit of vertical structure are located at the two sides of emitting diode epitaxial layer；Pass through
Patterned electrode, so that electric current almost flows vertically through the epitaxial layer of light emitting diode, the electric current of lateral flow is less, Ke Yiyou
The decrease electric current congestion problems of effect, are conducive to the raising of luminous efficiency.
The prior art generallys use multiple LED chips and is illuminated at light emitting diode matrix with realizing, but shape
At the method for light emitting diode matrix, there are complex process, problems with high costs.
Summary of the invention
Problems solved by the invention is to provide a kind of LED wafer and forming method thereof, to simplify technique, reduces
Cost.
To solve the above problems, the present invention provides a kind of forming method of LED wafer, comprising:
Growth substrates are provided；Form multiple tube cores in the growth substrates, the tube core include the first semiconductor layer and
The conduction type of second semiconductor layer, first semiconductor layer and second semiconductor layer is different；The shape on the tube core
At conductive layer, the conductive layer is electrically connected with first semiconductor layer, and the conductive layer and the tube core are used to form tube core
Structure；Operation substrate is provided, including functional surfaces and the bottom surface opposite with the functional surfaces；Make the conductive layer and the function
Face is opposite to be bonded；The growth substrates are removed, the multiple tube core structure is exposed, and there is Cutting Road between tube core structure；?
The first through hole through the operation substrate is formed at Cutting Road intersection location；In the conductive layer surface that first through hole is exposed
Form separation layer；Form the first electrode layer being located on the bottom surface of the operation substrate, the first electrode layer and the conduction
Layer electrical connection；Conductive material is formed on the first through hole side wall, to form the second electrode lay, the second electrode lay is located at
It the operation substrate floor and is electrically connected with second semiconductor layer.
Optionally, the step of forming the first through hole includes: that described is formed by way of laser boring or etching
One through-hole.
Optionally, in the step of forming the second electrode lay, the conformal covering first through hole side wall of conductive material；Or
Person, the conductive material fill the first through hole.
Optionally, in the step of providing operation substrate, the operation substrate is insulating substrate；Remove the growth substrates it
Afterwards, it is formed before first electrode layer, the forming method further include: formed at Cutting Road intersection location and served as a contrast through the operation
Second through-hole at bottom；In the step of forming separation layer, the separation layer also covers the die-side that the first through hole is exposed
Wall；In the step of forming conductive material, the conductive material also covers second through-hole side wall and connects with the conductive layer
Touching, to form first electrode layer；In the step of forming the second electrode lay, the behaviour of the conductive material and first through hole exposing
It is in contact as substrate surface.
Optionally, in the step of operation substrate is provided, the material of the operation substrate are as follows: titanium oxide, silica, polymerization
Object, glass, aluminium nitride, aluminium oxide, zirconium oxide, silicon nitride, YAG series ceramic, boron oxide, boron nitride or oxidation cymbal.
Optionally, the step of forming second through-hole includes: that described the is formed by way of laser boring or etching
Two through-holes.
Optionally, in the step of forming first electrode layer, conformal covering second through-hole side wall of conductive material；Or
Person, the conductive material fill second through-hole.
Optionally, in the step of providing operation substrate, the operation substrate is conductive substrates；The step of forming separation layer
In, the separation layer also covers the operation substrate surface that the first through hole is exposed；In the step of forming first electrode layer,
The first electrode layer is electrically connected with the operation substrate floor；In the step of forming the second electrode lay, the conductive material covers
Cover the insulation surface in the first through hole.
Optionally, provide operation substrate the step of in, it is described operation substrate material are as follows: Si, germanium, silicon carbide, copper, tungsten,
Molybdenum, tungsten-copper alloy or molybdenum-copper.
Optionally, the step of forming conductive material includes: by chemical vapor deposition, physical vapour deposition (PVD) or atomic layer
The method of deposition forms the first electrode layer and the second electrode lay.
Optionally, in the step of forming the conductive layer, the material of the conductive layer include: Cr, Pt, Au, TiW, Ti,
One of Ni, Cu, Ag, Al, W, zinc oxide or ITO or a variety of.
The present invention also provides a kind of LED wafers, comprising:
Operate substrate；Multiple tube core structures on the operation substrate and the cutting between tube core structure
Road, the tube core structure include conductive layer and the tube core on the conductive layer, and the tube core includes the first semiconductor layer
With the second semiconductor layer, the conduction type of first semiconductor layer and second semiconductor layer is different, the conductive layer with
The first semiconductor layer electrical connection；Through multiple first through hole of the operation substrate at Cutting Road intersection location；Position
In the first electrode layer of the operation substrate floor, it is electrically connected with the conductive layer；In the first through hole and the behaviour
The second electrode lay for making substrate floor is electrically connected with second semiconductor layer, the second electrode lay and the conductive layer it
Between be provided with separation layer.
Optionally, the first through hole side wall that the conformal covering separation layer of the second electrode lay exposes；Alternatively, described
Two electrode layers fill the first through hole.
Optionally, the operation substrate is insulating substrate；The LED wafer further include: be located at Cutting Road and intersect
Through multiple second through-holes of the operation substrate at position；The first electrode layer be also located in second through-hole and with institute
Conductive layer is stated to be in contact；The second electrode lay is in contact with the operation substrate surface that first through hole is exposed；The separation layer is also
Between the second electrode lay and the tube core.
Optionally, it is described operation substrate material are as follows: titanium oxide, silica, polymer, glass, aluminium nitride, aluminium oxide,
Zirconium oxide, silicon nitride, YAG series ceramic, boron oxide, boron nitride or oxidation cymbal.
Optionally, conformal covering second through-hole side wall of the first electrode layer；Alternatively, the first electrode layer filling
Second through-hole.
Optionally, the operation substrate is conductive substrates；The separation layer also covers the described of the first through hole exposing
Operate substrate surface；The first electrode layer is electrically connected with the operation substrate floor；The second electrode lay covering described the
Insulation surface in one through-hole.
Optionally, the material of the operation substrate are as follows: Si, germanium, silicon carbide, copper, tungsten, molybdenum, tungsten-copper alloy or molybdenum-copper.
Optionally, the material of the conductive layer includes: Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W, zinc oxide or ITO
One of or it is a variety of.
Compared with prior art, technical solution of the present invention has the advantage that
Technical solution of the present invention is by forming first electrode layer on the operation substrate floor；In Cutting Road intersection location
Place forms the first through hole through the operation substrate and forms conductive material on the first through hole side wall that separation layer exposes, from
And form the second electrode lay.In technical solution of the present invention, the setting of the first electrode layer and the second electrode lay is realized
The connection of first semiconductor layer and second semiconductor layer and external circuit, that is, realize the tube core and external circuit
Electrical connection, so the LED wafer needs not move through scribing process, can be used as light emitting diode matrix is made
With to simplify processing step, reducing manufacturing cost, be conducive to the realization of " exempting to encapsulate " technology.In addition, the present invention shines
Two pole piece pieces can be used directly, and by cooperating phosphor process, different colours demand may be implemented.
Detailed description of the invention
Fig. 1 and Fig. 2 is a kind of corresponding structural schematic diagram of each step of light-emitting diode chip for backlight unit manufacturing process；
Fig. 3 to Figure 10 is that the corresponding structure of each step of LED wafer forming method first embodiment of the present invention is shown
It is intended to；
Figure 11 to Figure 14 is the corresponding structure of each step of LED wafer forming method second embodiment of the present invention
Schematic diagram.
Specific embodiment
It can be seen from background technology that forming the method for light emitting diode matrix in the prior art, there are complex process, at high cost
High problem.The reason of analyzing its complex process, problem with high costs now in conjunction with a kind of light-emitting diode chip for backlight unit manufacturing process:
With reference to Fig. 1 and Fig. 2, a kind of corresponding structural representation of each step of light-emitting diode chip for backlight unit manufacturing process is shown
Figure.
The light-emitting diode chip for backlight unit manufacturing process includes:
Firstly, at manufacture end, forming multiple tube cores 11 on 10 surface of substrate with reference to Fig. 1；It is provided between adjacent tube core 11
Dicing lane 12.
With reference to Fig. 2, potted ends will be on the substrate 10 along the dicing lane 12 (as shown in Figure 1) by scribing process
Multiple tube cores 11 separate, obtain singulated die 11；After obtaining singulated die 11, by packaging technology to the single tube core
11 are packaged, wherein packaging technology includes: to form protective layer 13 in 11 side wall of tube core；In the protective layer 13 and institute
State formation fluorescence coating 14 on tube core 11；Electrode 15 is formed later.
Later, multiple LED chip arrays are arranged, light emitting diode matrix is constituted, to be illuminated.But
The light-emitting diode chip for backlight unit needs the scribing process etc. by potted ends, to cause the method to form light emitting diode matrix
It is complex process, with high costs, do not meet the technology trends for " exempting to encapsulate " now.
To solve the technical problem, the present invention provides a kind of forming method of LED wafer, comprising:
Growth substrates are provided；Form multiple tube cores in the growth substrates, the tube core include the first semiconductor layer and
The conduction type of second semiconductor layer, first semiconductor layer and second semiconductor layer is different；The shape on the tube core
At conductive layer, the conductive layer is electrically connected with first semiconductor layer, and the conductive layer and the tube core are used to form tube core
Structure；Operation substrate is provided, including functional surfaces and the bottom surface opposite with the functional surfaces；Make the conductive layer and the function
Face is opposite to be bonded；The growth substrates are removed, the multiple tube core structure is exposed, and there is Cutting Road between tube core structure；?
The first through hole through the operation substrate is formed at Cutting Road intersection location；In the conductive layer surface that first through hole is exposed
Form separation layer；Form the first electrode layer being located on the bottom surface of the operation substrate, the first electrode layer and the conduction
Layer electrical connection；Conductive material is formed on the first through hole side wall, to form the second electrode lay, the second electrode lay is located at
It the operation substrate floor and is electrically connected with second semiconductor layer.
Technical solution of the present invention is by forming first electrode layer on the operation substrate floor；In Cutting Road intersection location
Place forms the first through hole through the operation substrate and forms conductive material on the first through hole side wall that separation layer exposes, from
And form the second electrode lay.In technical solution of the present invention, it can directly pass through the first electrode layer and the second electrode lay
The connection of first semiconductor layer and second semiconductor layer and external circuit is realized, so the LED wafer
Needing not move through scribing process can be used, to simplify processing step, reduce manufacturing cost.
To make the above purposes, features and advantages of the invention more obvious and understandable, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.
With reference to Fig. 3 to Figure 10, each step pair of LED wafer forming method first embodiment of the present invention is shown
The structural schematic diagram answered.
With reference to Fig. 3, growth substrates 109 are provided.
The growth substrates 109 form LED core offer operating platform for providing.
Since the growth substrates 109 need to provide growing surface to form the LED core, so this reality
It applies in example, the growth substrates 109 can be Sapphire Substrate, Si substrate or SiC substrate.In other embodiments of the invention,
The material of the growth substrates is also selected from the other materials for being suitable for epitaxial growth.
With continued reference to Fig. 3, multiple tube cores 120 are formed in the growth substrates 109, the tube core 120 includes the first half
Conductor layer 121 and the second semiconductor layer 123, the conduction type of first semiconductor layer 121 and second semiconductor layer 123
It is different.
The tube core 120 shines for realizing Carrier recombination.
The first different semiconductor layer 121 of conduction type and the second semiconductor layer 123 constitute pn-junction structure, the pn-junction knot
It is compound that electron-hole occurs in structure, and extra energy is launched in the form of luminous energy, is shone with realizing.
Specifically, the photodiode chip is the light emitting diode of GaN base.The tube core includes p-type GaN layer, N-shaped
GaN layer and the quantum well layer between the p-type GaN layer and the n-type GaN layer.
First semiconductor layer 121 is p-type GaN layer, and second semiconductor layer 123 is n-type GaN layer, the tube core
120 further include the quantum well layer 122 between first semiconductor layer 121 and second semiconductor layer 123.
With continued reference to Fig. 3, conductive layer 110 is formed on the tube core 120, the conductive layer 110 is led with described the first half
Body layer 121 is electrically connected, and the conductive layer 110 is used to form tube core structure 111 with the tube core 120.
The conductive layer 110 is electrically connected for realizing first semiconductor layer 121 and the external circuit；In addition,
The conductive layer 110 is also used to realize the bonding between subsequent operation substrate and the growth substrates 109.
The conductive layer 110 can be single layer structure or laminated construction.In the present embodiment, the conductive layer 110 is material
For the single layer structure of Au.In other embodiments of the invention, the material of first conductive layer can also selected from Cr, Pt, Au, TiW,
Ti, Ni, Cu, Ag, Al, W, zinc oxide or ITO etc. other are suitable for realizing the conductive material being electrically connected.Alternatively, the conductive layer
110 can also be the laminated construction including Au layers, the multilayers such as ITO layer and Al layers.In addition, each layer size of the laminated construction
Can be identical, alternatively, each layer size of the laminated construction be not identical, such as: in the conductive layer 110 of laminated construction, in
The size of interbed is less than the size of other layers.
In addition, the conductive layer may be that multilayer conductive material forms laminated construction in other embodiments of the invention.It is folded
The conductive layer of layer structure may include the metallic reflector for reflection light, the blocking for preventing conductive material atom from spreading
Layer operates substrate and conductive film with the various different function such as the adhesion layer of the tube core bonding strength with described for improving
Layer.
With reference to Fig. 4, operation substrate 100 is provided, including functional surfaces 101 and the bottom surface opposite with the functional surfaces 101
102。
The operation substrate 100 is used to provide operating platform to be subsequently formed first electrode layer and the second electrode lay.
In the present embodiment, the operation substrate 100 is conductive substrates.Specifically, the material of the operation substrate 100 is
Si.In other embodiments of the invention, it is described operation substrate material can with it is described operation substrate material can also for copper,
The metals such as tungsten, molybdenum and its alloy or semiconductor material, such as other good heat dispersion performances of silicon carbide, germanium and be suitable for as lining
The conductive material at bottom.
Light direction of the functional surfaces 101 of the operation substrate 100 towards the tube core 120；The bottom surface 102 with it is described
Functional surfaces 101 are disposed opposite to each other, backwards to the light direction of the tube core 120.
With continued reference to Fig. 4, make the conductive layer 110 is opposite with the functional surfaces 101 to be bonded.
The step of being bonded the conductive layer 110 relatively with the functional surfaces 101, is for making the operation substrate 100 and institute
It states growth substrates 109 and bonding is realized by the conductive layer 110, the subsequent removal growth substrates 109 are to realize that substrate shifts.
Specifically, alloing the conductive layer 110 is opposite with the functional surfaces 101 to be bonded and realize that the step of being bonded uses
Conventional wafer bonding technology realizes that details are not described herein by the present invention.
With reference to Fig. 5 and Fig. 6, the growth substrates 109 (as shown in Figure 4) are removed, the multiple tube core structure 111 is exposed,
And there is Cutting Road 112 between tube core structure 111, wherein Fig. 6 is overlooking structure diagram of the Fig. 5 along the direction A.
The step of removing growth substrates 109 is for realizing substrate transfer, to be subsequent first electrode layer and second
The formation of electrode layer provides Process ba- sis.
Specifically, the step of removing growth substrates 109 can be made by way of laser lift-off or chemical stripping
The growth substrates 109 are separated with the tube core structure 111.It should be noted that the method for specifically removing the growth substrates
It can be selected according to the material of the growth substrates, the present invention does not limit.
With reference to Fig. 7 and Fig. 8, the first through hole through the operation substrate 100 is formed at 112 intersection location of Cutting Road
151.Wherein, Fig. 8 is in embodiment illustrated in fig. 7 along the schematic diagram of the section structure of BB line.
The first through hole 151 is used to run through the operation substrate 100, so that the formation for subsequent the second electrode lay provides
Process ba- sis enables to be formed by the second electrode lay and is located at the bottom surface 102 of the operation substrate 100 and with described the second half
Conductor layer 123 is electrically connected.
Specifically, the step of forming first through hole 151 include: formed by way of laser boring or etching it is described
First through hole 151.The way that the first through hole 151 is formed by the way of laser boring or etching is conducive to simplify technique
Step reduces technology difficulty.
With continued reference to Fig. 8, separation layer 130 is formed on 110 surface of the conductive layer that first through hole 151 is exposed.
The separation layer 130 for realizing it is subsequent be formed by the first through hole 151 the second electrode lay with it is described
Electric isolution between conductive layer 110, so that it is short to avoid the second electrode lay from occurring by the conductive layer 110 with first electrode layer
Road.
Since the operation substrate 100 is conductive substrates, so the separation layer 130 also covers the first through hole 151
100 surface of operation substrate exposed, to realize the second electrode lay and the operation substrate in the first through hole 151
Electric isolution between 100 avoids the second electrode lay that short circuit, Neng Goubao occurs with first electrode layer by the operation substrate 100
Demonstrate,prove the normal work of formed LED wafer.
It should be noted that it is remote that second semiconductor layer 123 is located at first semiconductor layer 121 in the present embodiment
Side from the operation substrate 100, so that the light for issuing the tube core 120 is emitted through second semiconductor layer 123,
Be conducive to improve the performance of formed LED wafer.So the separation layer 130 also covers the first through hole 151 and reveals
120 side wall of the tube core out, to realize the second electrode lay and first semiconductor layer in the first through hole 151
Electric isolution between 121 guarantees the normal work of formed LED wafer.
But in other embodiments of the invention, when second semiconductor layer is located at first semiconductor layer and the behaviour
When making between substrate, the separation layer can also be only located at the conductive layer surface, and the present invention is defined this.
With reference to Fig. 9 and Figure 10, the first electrode layer 140 being located on the bottom surface 102 of the operation substrate 100 is formed, it is described
First electrode layer 140 is electrically connected with the conductive layer 110；It is formed on 151 side wall of first through hole that separation layer 130 exposes conductive
Material, to form the second electrode lay 150, the second electrode lay 150 be located at 100 bottom surface 102 of operation substrate and with it is described
The electrical connection of second semiconductor layer 123.
Wherein, Fig. 9 is overlooking structure diagram corresponding to Fig. 7, and Figure 10 is to illustrate in Fig. 9 along the cross-section structure of CC line
Figure.
The first electrode layer 140 is electrically connected for realizing the first semiconductor layer 121 and external circuit.The present embodiment
In, first semiconductor layer 121 is p-type GaN layer, so the first electrode layer 140 is for making first semiconductor layer
121 are connected with power cathode.
The material of the first electrode layer 140 can be one in Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W or ITO
Kind is a variety of.In other embodiments of the invention, the material of the first electrode layer can also be suitable for forming electrode for other
Conductive material.
In the present embodiment, the operation substrate 100 is conductive substrates, so in the step of forming first electrode layer 140, institute
First electrode layer 140 is stated to be electrically connected with 100 bottom surface 102 of operation substrate.Specifically, the first electrode layer 140 covers institute
State the portion bottom surface 102 of operation substrate 100.
So the operation substrate 100 is also used to realize being electrically connected between the first electrode 140 and the conductive layer 110
It connects.Specifically, the first electrode layer 140 is realized and described the first half by the operation substrate 100 and the conductive layer 110
The electrical connection of conductor layer 121.Since the operation substrate 100 and 110 area of the conductive layer are larger, this way is conducive to subtract
Low current density increases the current carrying capacity of the LED wafer, is conducive to improve formed light emitting diode crystalline substance
Round performance.
The second electrode lay 150 is electrically connected for realizing the second semiconductor layer 123 and external circuit.The present embodiment
In, second semiconductor layer 123 is n-type GaN layer, so the second electrode lay 150 is for making second semiconductor layer
123 are connected with voltage cathode.
The material of the second electrode lay 150 can for Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W, zinc oxide or
One of ITO or a variety of.In other embodiments of the invention, the material of the second electrode lay can also be suitable for shape for other
At the conductive material of electrode.
The separation layer 130 covers 110 surface of the conductive layer that the first through hole 151 is exposed and described first logical
In the step of surface for the operation substrate 100 that hole 151 is exposed, formation the second electrode lay 150, the conductive material covers institute
It states 130 surface of separation layer in first through hole 151 and is in contact with the surface of second semiconductor layer 123, to make described
The second electrode lay 150 can be realized with second semiconductor layer 123 be electrically connected and with first semiconductor layer 121 and
It realizes and is electrically isolated between the first electrode layer 140.
It should be noted that it is remote that second semiconductor layer 123 is located at first semiconductor layer 121 in the present embodiment
Side from the operation substrate 100, so the second electrode lay 150 passes through the surface with second semiconductor layer 123
The mode being in contact realizes being electrically connected between second semiconductor layer 123.In other embodiments of the invention, described second
Electrode layer can also be by including that the conductive structure of plug and conductive layer is realized and being electrically connected between second semiconductor layer.
Specifically, in the present embodiment, the step of forming conductive material includes: heavy by chemical vapor deposition, physical vapor
The film depositions modes such as long-pending or atomic layer deposition form the first electrode layer 140 and the second electrode lay 150.
It should be noted that in the present embodiment, in the step of forming the second electrode lay 150, the conductive material is protected
Shape covers the first through hole side wall, to keep the dimensional homogeneity for being formed by the second electrode lay 150 preferable, current distribution is equal
Evenness is higher, is conducive to the stability for improving formed LED wafer.
The first electrode layer 140 passes through the operation substrate 100 and the conductive layer 110 and first semiconductor layer
121 realize electrical connection, and the second electrode lay 150 is located in the first through hole 151, and with second semiconductor layer 123
It is in contact to realize electrical connection, the LED wafer passes through the first electrode layer 140 and the second electrode lay 150
Setting, realize the connection of first semiconductor layer 121 and second semiconductor layer 123 and external circuit, that is, realize
The tube core 120 is electrically connected with external circuit, so the LED wafer needs not move through scribing process, Ji Kezuo
It carries out for light emitting diode matrix using reducing process costs to simplify processing step.
With reference to figures 11 to Figure 14, each step pair of LED wafer forming method second embodiment of the present invention is shown
The structural schematic diagram answered.
The present embodiment is identical with the first embodiment the place present invention, and details are not described herein, and the present embodiment and previous embodiment are not
It is with place, in the present embodiment, the operation substrate 200 (as shown in figure 12) is insulating substrate.
Specifically, the operation substrate 200 is insulating substrate.Specifically, the material of the operation substrate 200 is AlN.This
In invention other embodiments, the material of the operation substrate can also be Al2O3, the good heat dispersion performances such as ceramics and be suitable for making
For the insulating materials of substrate.(other embodiments include: titanium oxide, silica, polymer, glass, aluminium nitride, aluminium oxide, oxidation
Zirconium, silicon nitride, YAG series ceramic, boron oxide, boron nitride or oxidation cymbal etc..)
With reference to Figure 11 and Figure 12, after removing the growth substrates, formed before first electrode layer, the forming method
Further include: the second through-hole 241 through the operation substrate 200 is formed at 212 intersection location of Cutting Road.Wherein Figure 12 is figure
Along the schematic diagram of the section structure of DD line in 11.
Since the operation substrate 200 is insulating substrate, thus the operation substrate 200 can not make it is subsequent positioned at the behaviour
The first electrode made on substrate floor is electrically connected with the conductive layer 210 realization, so second through-hole 241 is used to run through institute
Operation substrate 200 is stated, so that the formation for subsequent first electrode layer provides technique, enables to be formed by first electrode layer and covers
It is described operation substrate 200 bottom surface and be electrically connected with first semiconductor layer 221.
Specifically, the step of forming the second through-hole 241 include: formed by way of laser boring or etching it is described
Second through-hole 241.The way that second through-hole 241 is formed by the way of laser boring or etching is conducive to simplify technique
Step reduces technology difficulty.
It should be noted that continuing to refer to figure 12, in the present embodiment, second semiconductor layer 223 is located at described first
Side of the semiconductor layer 221 far from the operation substrate 200, so in the step of forming separation layer 230, the separation layer
230 also cover 220 side wall of the tube core that the first through hole 251 is exposed, to realize second in the first through hole 251
Electric isolution between electrode layer and first semiconductor layer 221 guarantees the normal work of formed LED wafer.
But in other embodiments of the invention, when second semiconductor layer is located at first semiconductor layer and the behaviour
When making between substrate, the separation layer can also be only located at the conductive layer surface, and the present invention is defined this.
Later, with reference to Figure 13 and Figure 14, conductive material is formed on first through hole 251 (as shown in figure 12) side wall.
Wherein Figure 13 is overlooking structure diagram corresponding to Figure 11；Figure 14 is the schematic diagram of the section structure of EE line in Figure 13.
Specifically, the conductive material also covers described second through-hole, 241 (such as Figure 12 in the step of forming conductive material
It is shown) it side wall and is in contact with the conductive layer 210, to form first electrode layer 240.So being formed by first electrode layer
240 are located in second through-hole 241, run through the operation substrate 200 by second through-hole 241, with the conductive layer
210 are in contact.
Since the operation substrate 200 is insulating substrate, so can be realized described second by the operation substrate 200
Being electrically insulated between electrode layer 250 and the first electrode layer 240 and the conductive layer 210, so forming the second electrode lay
In 250 the step of, the conductive material is in contact with 200 surface of operation substrate that the first through hole 251 is exposed, i.e., it is described every
Absciss layer 230 is only located between the second electrode lay 250 and the conductive layer 210.
It should be noted that as described in Figure 14, in the present embodiment, formed the second electrode lay 250 the step of in, the conduction
Material fills the first through hole 251, that is, is formed by the second electrode lay 250 and is filled in the first through hole 251.In addition,
In the step of forming first electrode layer 240, the conductive material fills second through-hole 241, that is, is formed by first electrode
Layer 240 is also filled in second through-hole 241.
The first electrode layer 240 and the second electrode lay 250 are formed in this way, advantageously reduce technique hardly possible
Degree improves yield, and is formed by first electrode layer 240 in this way and the second electrode lay 250 is relatively large sized,
It is also beneficial to reduce the resistance of first electrode layer 240 and the second electrode lay 250, is conducive to improve first electrode layer 240 and second
Bearing capacity of the electrode layer 250 to high current.
It should be noted that in the present embodiment, in the step of forming first electrode layer 240, the conductive material fills institute
The way for stating the second through-hole 241 is only an example.It is electric with forming described second in first embodiment in other embodiments of the invention
The process of pole layer is similar, and the conductive material conformal can also cover second through-hole side wall, that is, is formed by first electrode
Conformal covering second through-hole side wall of layer improves the light emitting diode to keep formed first electrode layer of uniform size
The stability of wafer.
Correspondingly, the present invention also provides a kind of LED wafers.
With reference to Fig. 9 and Figure 10, the structural schematic diagram of LED wafer first embodiment of the present invention is shown, wherein scheming
9 be the overlooking structure diagram of the LED wafer, and Figure 10 is in Fig. 9 along the schematic diagram of the section structure of CC line.
As shown in Figure 9 and Figure 10, the LED wafer includes:
Operate substrate 100；Positioned at it is described operation substrate 100 on multiple tube core structures 111 and be located at tube core structure it
Between Cutting Road 112, the tube core structure 111 include conductive layer 110 and the tube core 120 on the conductive layer 110, institute
Stating tube core 120 includes the first semiconductor layer 121 and the second semiconductor layer 123, first semiconductor layer 121 and described the second half
The conduction type of conductor layer 123 is different, and the conductive layer 110 is electrically connected with first semiconductor layer 121；Positioned at Cutting Road
Through multiple first through hole 151 of the operation substrate 100 at 112 intersection locations；Positioned at 100 bottom surface 102 of operation substrate
First electrode layer 140, be electrically connected with the conductive layer 110；In the first through hole 151 and the operation substrate 100
The second electrode lay 150 of bottom surface 102 is electrically connected with second semiconductor layer 123, and the second electrode lay 123 is led with described
Separation layer 130 is provided between electric layer 110.
The operation substrate 100 is used to provide operating platform to be subsequently formed first electrode layer and the second electrode lay.
In the present embodiment, the operation substrate 100 is conductive substrates.Specifically, the material of the operation substrate 100 is
Si.In other embodiments of the invention, the material of the operation substrate can also be metals and its alloys such as copper, tungsten, molybdenum, or partly lead
Body material, such as other good heat dispersion performances of silicon carbide, germanium and it is suitable for conductive material as substrate
The operation substrate 100 includes functional surfaces 101 and the bottom surface 102 opposite with the functional surfaces 101.The function
Light direction of the face 101 towards the tube core 120；The bottom surface 102 is disposed opposite to each other with the functional surfaces 101, backwards to the pipe
The light direction of core 120.
The tube core structure 111 includes conductive layer 110 and tube core 120.
The conductive layer 110 is electrically connected for realizing first semiconductor layer 121 and the external circuit.
The conductive layer 110 can be single layer structure or laminated construction.In the present embodiment, the conductive layer 110 is material
For the single layer structure of Au.In other embodiments of the invention, the material of the conductive layer 110 can also selected from Cr, Pt, Au, TiW,
Ti, Ni, Cu, Ag, Al, W, zinc oxide or ITO etc. other are suitable for realizing the conductive material being electrically connected.Alternatively, the conductive layer
110 can also be the laminated construction including Au layers, the multilayers such as ITO layer and Al layers.In addition, each layer size of the laminated construction
Can be identical, alternatively, each layer size of the laminated construction be not identical, such as: in the conductive layer 110 of laminated construction, in
The size of interbed is less than the size of other layers.
In addition, the conductive layer may be that multilayer conductive material forms laminated construction in other embodiments of the invention.It is folded
The conductive layer of layer structure may include the metallic reflector for reflection light, the blocking for preventing conductive material atom from spreading
Layer operates substrate and conductive film with the various different function such as the adhesion layer of the tube core bonding strength with described for improving
Layer.
The tube core 120 shines for realizing Carrier recombination.
The first different semiconductor layer 121 of conduction type and the second semiconductor layer 123 constitute pn-junction structure, the pn-junction knot
It is compound that electron-hole occurs in structure, and extra energy is launched in the form of luminous energy, is shone with realizing.
Specifically, the photodiode chip is the light emitting diode of GaN base.The tube core includes p-type GaN layer, N-shaped
GaN layer and the quantum well layer between the p-type GaN layer and the n-type GaN layer.
First semiconductor layer 121 is p-type GaN layer, and second semiconductor layer 123 is n-type GaN layer, the tube core
120 further include the quantum well layer 122 between first semiconductor layer 121 and second semiconductor layer 123.
The first through hole 151 is used to run through the operation substrate 100, and the second electrode lay 150 is enable to be located at institute
It states the bottom surface 102 of operation substrate 100 and is realized through the operation substrate 100 and is electrically connected with second semiconductor layer 123.
The first electrode layer 140 is electrically connected for realizing the first semiconductor layer 121 and external circuit.The present embodiment
In, first semiconductor layer 121 is p-type GaN layer, so the first electrode layer 140 is for making first semiconductor layer
121 are connected with power cathode.
The material of the first electrode layer 140 can for Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W, zinc oxide or
One of ITO or a variety of.In other embodiments of the invention, the material of the first electrode layer can also be suitable for shape for other
At the conductive material of electrode.
In the present embodiment, the operation substrate 100 is conductive substrates, so the first electrode layer 140 is located at the behaviour
Make 100 bottom surface 102 of substrate and is electrically connected with 100 bottom surface 102 of operation substrate.Specifically, the first electrode layer 140 covers
The portion bottom surface 102 of the operation substrate 100.
So the operation substrate 100 is also used to realize the first electrode 140 and the conductive layer in the present embodiment
Electrical connection between 110.Specifically, the first electrode layer 140 is real by the operation substrate 100 and the conductive layer 110
Now it is electrically connected with first semiconductor layer 121.Since the operation substrate 100 and 110 area of the conductive layer are larger, this
Kind way is conducive to reduce current density, increases the current carrying capacity of the LED wafer, is conducive to improve institute's shape
At the performance of LED wafer.
The separation layer 130 for realizing the electric isolution between the second electrode lay 150 and the conductive layer 110, from
And avoid the second electrode lay that short circuit occurs with first electrode layer 140 by the conductive layer 110.
Since the operation substrate 100 is conductive substrates, so the separation layer 130 also covers the first through hole 151
100 surface of operation substrate exposed, to realize the second electrode lay and the operation substrate in the first through hole 151
Electric isolution between 100 avoids the second electrode lay that short circuit occurs with first electrode layer 140 by the operation substrate 100, can
Guarantee the normal work of formed LED wafer.
It should be noted that it is remote that second semiconductor layer 123 is located at first semiconductor layer 121 in the present embodiment
Side from the operation substrate 100, so that the light for issuing the tube core 120 is emitted through second semiconductor layer 123,
Be conducive to improve the performance of formed LED wafer.So the separation layer 130 also covers the first through hole 151 and reveals
120 side wall of the tube core out, to realize the second electrode lay 150 and first semiconductor in the first through hole 151
Electric isolution between layer 121 guarantees the normal work of formed LED wafer.
But in other embodiments of the invention, when second semiconductor layer is located at first semiconductor layer and the behaviour
When making between substrate, the separation layer can also be only located at the conductive layer surface, and the present invention is defined this.
The second electrode lay 150 is electrically connected for realizing the second semiconductor layer 123 and external circuit.The present embodiment
In, second semiconductor layer 123 is n-type GaN layer, so the second electrode lay 150 is for making second semiconductor layer
123 are connected with voltage cathode.
The material of the second electrode lay 150 can for Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W, zinc oxide or
One of ITO or a variety of.In other embodiments of the invention, the material of the second electrode lay can also be suitable for shape for other
At the conductive material of electrode.
The second electrode lay 150 covers the separation layer 130 and connects with the surface of second semiconductor layer 123
Touching.Specifically, the second electrode lay 150 covers the separation layer 130 and described the on operation 100 bottom surface 102 of substrate
Separation layer 130 in one through-hole 151, thus realize it is described operation substrate 100 and the conductive layer 110 between electricity every
From；The second electrode lay 150 is in contact with second semiconductor layer 123, to realize and second semiconductor layer 123
Electrical connection.
It should be noted that in the present embodiment, in the step of forming the second electrode lay 150, the conductive material is protected
Shape covers the first through hole side wall, to keep the dimensional homogeneity for being formed by the second electrode lay 150 preferable, current distribution is equal
Evenness is higher, is conducive to the stability for improving formed LED wafer.
The first electrode layer 140 passes through the operation substrate 100 and the conductive layer 110 and first semiconductor layer
121 realize electrical connection, and the second electrode lay 150 is located in the first through hole 151, and with second semiconductor layer 123
It is in contact to realize electrical connection, the LED wafer passes through the first electrode layer 140 and the second electrode lay 150
Setting, realize the connection of first semiconductor layer 121 and second semiconductor layer 123 and external circuit, that is, realize
The tube core 120 is electrically connected with external circuit, so the LED wafer needs not move through scribing process, Ji Kezuo
It carries out for light emitting diode matrix using reducing process costs to simplify processing step.
With reference to Figure 13 and Figure 14, the structural schematic diagram of LED wafer first embodiment of the present invention is shown, wherein
Figure 13 is the overlooking structure diagram of the LED wafer, and Figure 14 is in Figure 13 along the schematic diagram of the section structure of EE line.
The present embodiment is identical with the first embodiment the place present invention, and details are not described herein, and the present embodiment and previous embodiment are not
It is with place, in the present embodiment, the operation substrate 200 (as shown in figure 12) is insulating substrate.
Specifically, the operation substrate 200 is insulating substrate.Specifically, the material of the operation substrate 200 is AlN.This
In invention other embodiments, the material of the operation substrate can also be Al2O3, the good heat dispersion performances such as ceramics and be suitable for making
For the insulating materials of substrate.(described in other embodiments operate substrate material include: titanium oxide, silica, polymer, glass,
Aluminium nitride, aluminium oxide, zirconium oxide, silicon nitride, YAG series ceramic, boron oxide, boron nitride or oxidation cymbal etc..)
Since the operation substrate 200 is insulating substrate, so the operation substrate 200 cannot achieve the first electrode
Being electrically connected between layer 240 and the conductive layer 210.So the LED wafer further include: be located at 212 phase of Cutting Road
It hands at position through multiple second through-holes 241 (as shown in figure 12) of the operation substrate 200.
Second through-hole 241 is used to run through the operation substrate 200, to enable the first electrode layer 240
It covers the bottom surface 202 of the operation substrate 200 and is electrically connected with first semiconductor layer 221.
The first electrode layer 240 is located in second through-hole 241 and is in contact with the conductive layer 210.Specifically,
The first electrode layer 240 is located at the bottom surface 202 of the operation substrate 200, and runs through the behaviour by second through-hole 241
Make substrate 200, with the contact of the conductive layer 210.
Since the operation substrate 200 is insulating substrate, so the second electrode can be realized in the operation substrate 200
Layer 250 with being electrically insulated between the first electrode layer 240 and the conductive layer 210, so the second electrode lay 250 can
To be in contact with 100 surface of operation substrate of the exposing (as shown in figure 12) of first through hole 251, i.e., the described separation layer 230 is only located at
Between the second electrode lay 250 and the conductive layer 210.
It should be noted that as described in Figure 14, in the present embodiment, it is logical that the second electrode lay 250 is filled in described first
In hole 251；The first electrode layer 240 is also filled in second through-hole 241.
The first electrode layer 240 and the second electrode lay 250 is set to fill second through-hole 241 and described respectively
The way of one through-hole 251 advantageously reduces technology difficulty, improves yield, and the first electrode layer 240 and second of this form
Electrode layer 250 it is relatively large sized, be also beneficial to reduce first electrode layer 240 and the second electrode lay 250 resistance, be conducive to
First electrode layer 240 and the second electrode lay 250 are improved to the bearing capacity of high current.
It should be noted that in the present embodiment, in the step of forming first electrode layer 240, the conductive material fills institute
The way for stating the second through-hole 241 is only an example.It is electric with forming described second in first embodiment in other embodiments of the invention
The process of pole layer is similar, and the conductive material conformal can also cover second through-hole side wall, that is, is formed by first electrode
Conformal covering second through-hole side wall of layer improves the light emitting diode to keep formed first electrode layer of uniform size
The stability of wafer.
It should be noted that it is remote that second semiconductor layer 223 is located at first semiconductor layer 221 in the present embodiment
Side from the operation substrate 200, so the separation layer 230 also covers the tube core that the first through hole 251 is exposed
220 side walls, to realize the electricity between the second electrode lay 250 and first semiconductor layer 221 in the first through hole 251
Isolation guarantees the normal work of formed LED wafer.
But in other embodiments of the invention, when second semiconductor layer is located at first semiconductor layer and the behaviour
When making between substrate, the separation layer can also be only located at the conductive layer surface, and the present invention is defined this.
Since the operation substrate 200 is insulating substrate, so can be realized described second by the operation substrate 200
Being electrically insulated between electrode layer 250 and the first electrode layer 240 and the conductive layer 210, so forming the second electrode lay
In 250 the step of, the conductive material is in contact with 200 surface of operation substrate that the first through hole 251 is exposed, i.e., it is described every
Absciss layer 230 is only located between the second electrode lay 250 and the conductive layer 210.
To sum up, technical solution of the present invention is by forming first electrode layer on the operation substrate floor；In Cutting Road phase
It hands over the first through hole formed at position through the operation substrate and is formed on the first through hole side wall that separation layer exposes conductive
Material, to form the second electrode lay.In technical solution of the present invention, the first electrode layer and the second electrode lay are set
It sets, realizes the connection of first semiconductor layer and second semiconductor layer and external circuit, that is, realize the tube core
It can be used as light emitting diode so the LED wafer needs not move through scribing process with being electrically connected for external circuit
Array is carried out using to simplify processing step, reducing manufacturing cost, be conducive to the realization of " exempting to encapsulate " technology.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (11)
1. a kind of forming method of LED wafer characterized by comprising
Growth substrates are provided；
Multiple tube cores are formed in the growth substrates, the tube core includes the first semiconductor layer and the second semiconductor layer, described
First semiconductor layer is different with the conduction type of second semiconductor layer；
Conductive layer is formed on the tube core, the conductive layer is electrically connected with first semiconductor layer, the conductive layer and institute
It states tube core and is used to form tube core structure；
Operation substrate is provided, including functional surfaces and the bottom surface opposite with the functional surfaces；
Make conductive layer fitting opposite with the functional surfaces；
The growth substrates are removed, the multiple tube core structure is exposed, and there is Cutting Road between tube core structure；
The first through hole through the operation substrate is formed at Cutting Road intersection location；
Separation layer is formed in the conductive layer surface that first through hole is exposed；
The first electrode layer being located on the bottom surface of the operation substrate is formed, the first electrode layer is electrically connected with the conductive layer
It connects；
Conductive material is formed on first through hole side wall, to form the second electrode lay, the second electrode lay is located at the operation
It substrate floor and is electrically connected with second semiconductor layer.
2. forming method as described in claim 1, which is characterized in that the step of forming the first through hole includes: by swashing
The mode of light punching or etching forms the first through hole.
3. forming method as described in claim 1, which is characterized in that in the step of forming the second electrode lay, the conduction material
Expect the conformal covering first through hole side wall；Alternatively, the conductive material fills the first through hole.
4. forming method as described in claim 1, which is characterized in that in the step of operation substrate is provided, the operation substrate
For insulating substrate；
It after removing the growth substrates, is formed before first electrode layer, the forming method further include: intersect position in Cutting Road
It sets place and forms the second through-hole through the operation substrate；
In the step of forming separation layer, the separation layer also covers the die sidewall that the first through hole is exposed；
In the step of forming conductive material, the conductive material also covers second through-hole side wall and connects with the conductive layer
Touching, to form first electrode layer；
In the step of forming the second electrode lay, the conductive material connects with the operation substrate surface that the first through hole is exposed
Touching.
5. forming method as claimed in claim 4, which is characterized in that in the step of operation substrate is provided, the operation substrate
Material are as follows: titanium oxide, silica, polymer, glass, aluminium nitride, aluminium oxide, zirconium oxide, silicon nitride, YAG series ceramic, oxygen
Change boron, boron nitride or oxidation cymbal.
6. forming method as claimed in claim 4, which is characterized in that the step of forming second through-hole includes: by swashing
The mode of light punching or etching forms second through-hole.
7. forming method as claimed in claim 4, which is characterized in that in the step of forming first electrode layer, the conduction material
Expect conformal covering second through-hole side wall；Alternatively, the conductive material fills second through-hole.
8. forming method as described in claim 1, which is characterized in that in the step of operation substrate is provided, the operation substrate
For conductive substrates；
In the step of forming separation layer, the separation layer also covers the operation substrate surface that the first through hole is exposed；
In the step of forming first electrode layer, the first electrode layer is electrically connected with the operation substrate floor；
In the step of forming the second electrode lay, the conductive material covers the insulation surface in the first through hole.
9. forming method as claimed in claim 8, which is characterized in that in the step of operation substrate is provided, the operation substrate
Material are as follows: Si, germanium, silicon carbide, copper, tungsten, molybdenum, tungsten-copper alloy or molybdenum-copper.
10. the forming method as described in claim 1,4 or 8, which is characterized in that the step of forming conductive material includes: to pass through
The method of chemical vapor deposition, physical vapour deposition (PVD) or atomic layer deposition forms the first electrode layer and the second electrode
Layer.
11. forming method as described in claim 1, which is characterized in that in the step of forming the conductive layer, the conductive layer
Material include: one of Cr, Pt, Au, TiW, Ti, Ni, Cu, Ag, Al, W, zinc oxide or ITO or a variety of.
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| CN108281532B (en) * | 2018-01-25 | 2020-11-17 | 扬州乾照光电有限公司 | Flexible LED chip and manufacturing method and packaging method thereof |
| CN112151368A (en) * | 2019-06-28 | 2020-12-29 | 长鑫存储技术有限公司 | Wafer, manufacturing method thereof and semiconductor device |
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|---|---|---|---|---|
| CN1399352A (en) * | 2001-07-23 | 2003-02-26 | 连勇科技股份有限公司 | Light-emitting semiconductor device capable of being surface mounted and with composite packing structure |
| CN103890914A (en) * | 2011-09-28 | 2014-06-25 | Bbsa有限公司 | Semiconductor element and method of manufacturing same |
| CN104393137A (en) * | 2014-09-30 | 2015-03-04 | 厦门市三安光电科技有限公司 | Upside-down mounted luminescent device and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1399352A (en) * | 2001-07-23 | 2003-02-26 | 连勇科技股份有限公司 | Light-emitting semiconductor device capable of being surface mounted and with composite packing structure |
| CN103890914A (en) * | 2011-09-28 | 2014-06-25 | Bbsa有限公司 | Semiconductor element and method of manufacturing same |
| CN104393137A (en) * | 2014-09-30 | 2015-03-04 | 厦门市三安光电科技有限公司 | Upside-down mounted luminescent device and manufacturing method thereof |
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