CN107251255B - 用于电容性结构的导电穿聚合物通孔 - Google Patents

用于电容性结构的导电穿聚合物通孔 Download PDF

Info

Publication number
CN107251255B
CN107251255B CN201680012146.5A CN201680012146A CN107251255B CN 107251255 B CN107251255 B CN 107251255B CN 201680012146 A CN201680012146 A CN 201680012146A CN 107251255 B CN107251255 B CN 107251255B
Authority
CN
China
Prior art keywords
holes
polymer
insulating
terminal
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201680012146.5A
Other languages
English (en)
Chinese (zh)
Other versions
CN107251255A (zh
Inventor
马修·D·罗米格
弗兰克·斯特普尼克
苏米亚·甘地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CN107251255A publication Critical patent/CN107251255A/zh
Application granted granted Critical
Publication of CN107251255B publication Critical patent/CN107251255B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/692Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06Planarisation of inorganic insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/044Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroless plating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42Vias, e.g. via plugs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43Layouts of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496Capacitor integral with wiring layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0187Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0215Metallic fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29Bond pads specially adapted therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Ceramic Capacitors (AREA)
  • Dc-Dc Converters (AREA)
CN201680012146.5A 2015-03-25 2016-03-23 用于电容性结构的导电穿聚合物通孔 Active CN107251255B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/668,085 US9572261B2 (en) 2015-03-25 2015-03-25 Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips
US14/668,085 2015-03-25
PCT/US2016/023817 WO2016154339A1 (en) 2015-03-25 2016-03-23 Conductive through-polymer vias for capacitive structures

Publications (2)

Publication Number Publication Date
CN107251255A CN107251255A (zh) 2017-10-13
CN107251255B true CN107251255B (zh) 2020-06-26

Family

ID=56976000

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680012146.5A Active CN107251255B (zh) 2015-03-25 2016-03-23 用于电容性结构的导电穿聚合物通孔

Country Status (4)

Country Link
US (2) US9572261B2 (https=)
JP (1) JP6757737B2 (https=)
CN (1) CN107251255B (https=)
WO (1) WO2016154339A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9572261B2 (en) * 2015-03-25 2017-02-14 Texas Instruments Incorporated Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips
TWI653715B (zh) * 2016-05-13 2019-03-11 Murata Manufacturing Co., Ltd. 晶圓級封裝及電容器
US9865527B1 (en) 2016-12-22 2018-01-09 Texas Instruments Incorporated Packaged semiconductor device having nanoparticle adhesion layer patterned into zones of electrical conductance and insulation
US9941194B1 (en) 2017-02-21 2018-04-10 Texas Instruments Incorporated Packaged semiconductor device having patterned conductance dual-material nanoparticle adhesion layer
US20190051596A1 (en) * 2017-08-10 2019-02-14 Applied Materials, Inc. Method of increasing embedded 3d metal-insulator-metal (mim) capacitor capacitance density for wafer level packaging
US10867752B2 (en) 2017-09-28 2020-12-15 Samsung Electro-Mechanics Co., Ltd. Capacitor and method of manufacturing the same
US10566276B2 (en) 2017-11-08 2020-02-18 Texas Instruments Incorporated Packaged semiconductor system having unidirectional connections to discrete components
KR102785407B1 (ko) 2019-03-12 2025-03-21 교세라 에이브이엑스 컴포넌츠 코포레이션 고전력, 양면 박막 필터
CN115039190B (zh) * 2020-03-24 2023-08-25 株式会社村田制作所 电容器
DE102020119611A1 (de) 2020-07-24 2022-01-27 Infineon Technologies Ag Schaltungsanordnung und verfahren zum bilden einer schaltungsanordnung
US11315453B1 (en) * 2020-11-08 2022-04-26 Innolux Corporation Tiled display device with a test circuit
CN119732205A (zh) * 2022-07-29 2025-03-28 索尼半导体解决方案公司 半导体装置及其制造方法、电子装置
KR20240104602A (ko) * 2022-12-28 2024-07-05 삼성전기주식회사 복합 전자 부품

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6388207B1 (en) * 2000-12-29 2002-05-14 Intel Corporation Electronic assembly with trench structures and methods of manufacture
WO2008139392A2 (en) * 2007-05-10 2008-11-20 Nxp B.V. Dc-to-dc converter comprising a reconfigurable capacitor unit
JP2009188219A (ja) * 2008-02-07 2009-08-20 Fujitsu Ltd キャパシタの製造方法
CN201994181U (zh) * 2010-03-15 2011-09-28 日新电机株式会社 电容器装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08116030A (ja) * 1994-10-12 1996-05-07 Inter Nix Kk 半導体集積回路装置
EP0837504A3 (en) 1996-08-20 1999-01-07 Ramtron International Corporation Partially or completely encapsulated ferroelectric device
US5825628A (en) 1996-10-03 1998-10-20 International Business Machines Corporation Electronic package with enhanced pad design
JP2002057037A (ja) * 2000-08-09 2002-02-22 Fuji Electric Co Ltd 複合集積回路およびその製造方法
JP4795521B2 (ja) * 2000-10-16 2011-10-19 富士通株式会社 半導体装置及びその製造方法
US8174017B2 (en) 2005-08-17 2012-05-08 Georgia Tech Research Corporation Integrating three-dimensional high capacitance density structures
JP2008071935A (ja) * 2006-09-14 2008-03-27 Toshiba Corp 半導体装置
DE102006055576A1 (de) * 2006-11-21 2008-05-29 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen eines dehnbaren Schaltungsträgers und dehnbarer Schaltungsträger
JP4869991B2 (ja) * 2007-03-14 2012-02-08 富士通株式会社 キャパシタ内蔵ウェハレベルパッケージ及びその製造方法
US8084841B2 (en) 2009-05-05 2011-12-27 Georgia Tech Research Systems and methods for providing high-density capacitors
JP2011040602A (ja) * 2009-08-12 2011-02-24 Renesas Electronics Corp 電子装置およびその製造方法
CN102906835B (zh) * 2009-12-16 2016-08-17 艾普瑞特材料技术有限责任公司 具有三维高比表面积电极的电容器和制造方法
JP2011159856A (ja) * 2010-02-02 2011-08-18 Sanyo Electric Co Ltd コンデンサ用電極体、コンデンサおよびそれらの製造方法
JP2013207197A (ja) * 2012-03-29 2013-10-07 Denso Corp 多層基板の製造方法
US9572261B2 (en) * 2015-03-25 2017-02-14 Texas Instruments Incorporated Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6388207B1 (en) * 2000-12-29 2002-05-14 Intel Corporation Electronic assembly with trench structures and methods of manufacture
WO2008139392A2 (en) * 2007-05-10 2008-11-20 Nxp B.V. Dc-to-dc converter comprising a reconfigurable capacitor unit
JP2009188219A (ja) * 2008-02-07 2009-08-20 Fujitsu Ltd キャパシタの製造方法
CN201994181U (zh) * 2010-03-15 2011-09-28 日新电机株式会社 电容器装置

Also Published As

Publication number Publication date
US9572261B2 (en) 2017-02-14
US9852979B2 (en) 2017-12-26
JP2018515909A (ja) 2018-06-14
JP6757737B2 (ja) 2020-09-23
WO2016154339A1 (en) 2016-09-29
US20160286654A1 (en) 2016-09-29
US20170047283A1 (en) 2017-02-16
CN107251255A (zh) 2017-10-13

Similar Documents

Publication Publication Date Title
CN107251255B (zh) 用于电容性结构的导电穿聚合物通孔
US11177204B2 (en) Power electronics package and method of manufacturing thereof
CN110246807B (zh) 电子功率模块
CN101383340B (zh) 具有堆叠分立电感器结构的半导体功率器件
US10756013B2 (en) Packaged semiconductor system having unidirectional connections to discrete components
TWI455214B (zh) 用於資料處理系統之整合模組
US20130127030A1 (en) Semiconductor device packaging having substrate with pre-encapsulation through via formation
JP2018515909A5 (https=)
US12394697B2 (en) Method for fabricating a semiconductor device package comprising a pin in the form of a drilling screw
US9583413B2 (en) Semiconductor device
WO2022212619A1 (en) Isolated temperature sensor device package
US8728873B2 (en) Methods for filling a contact hole in a chip package arrangement and chip package arrangements
US9379050B2 (en) Electronic device
US20130001758A1 (en) Power Semiconductor Package
US20230282591A1 (en) Semiconductor package and a semiconductor device module including the same
CN114597190A (zh) 具有高电压隔离的模制半导体封装
US12538844B2 (en) Double-sided multichip packages
US20250183232A1 (en) Power stage package with half bridge-connected transistor chips and driver chip having through connection
WO2025250714A1 (en) Microelectronic device package with hybrid isolation laminate
EP4379771A1 (en) Package with component carrier and electronic component connected with direct physical contact at stress release layer
CN117059616A (zh) 热耦接至无源元件的半导体器件封装
EP3352212B1 (en) Power electronics package and method of manufacturing thereof
CN103855109B (zh) 芯片模块、绝缘材料和制造芯片模块的方法
KR20180092379A (ko) 전력 전자 패키지 및 그 제조 방법
CN103855109A (zh) 芯片模块、绝缘材料和制造芯片模块的方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant