CN107210237B - 半导体封装件 - Google Patents
半导体封装件 Download PDFInfo
- Publication number
- CN107210237B CN107210237B CN201580074691.2A CN201580074691A CN107210237B CN 107210237 B CN107210237 B CN 107210237B CN 201580074691 A CN201580074691 A CN 201580074691A CN 107210237 B CN107210237 B CN 107210237B
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- China
- Prior art keywords
- layer
- tin
- intermetallic
- silver
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 67
- 229910052751 metal Inorganic materials 0.000 claims abstract description 84
- 239000002184 metal Substances 0.000 claims abstract description 84
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 79
- 229910052709 silver Inorganic materials 0.000 claims abstract description 78
- 239000004332 silver Substances 0.000 claims abstract description 78
- 229910052718 tin Inorganic materials 0.000 claims abstract description 77
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 75
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910052802 copper Inorganic materials 0.000 claims abstract description 65
- 239000010949 copper Substances 0.000 claims abstract description 65
- 239000000758 substrate Substances 0.000 claims abstract description 60
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 44
- 239000010936 titanium Substances 0.000 claims abstract description 42
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 42
- 230000008018 melting Effects 0.000 claims abstract description 20
- 238000002844 melting Methods 0.000 claims abstract description 20
- 238000002161 passivation Methods 0.000 claims abstract description 13
- 229910000679 solder Inorganic materials 0.000 claims description 32
- QCEUXSAXTBNJGO-UHFFFAOYSA-N [Ag].[Sn] Chemical compound [Ag].[Sn] QCEUXSAXTBNJGO-UHFFFAOYSA-N 0.000 claims description 9
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims description 9
- 239000011651 chromium Substances 0.000 claims description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052804 chromium Inorganic materials 0.000 claims description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 108
- 238000000034 method Methods 0.000 abstract description 67
- 229910052759 nickel Inorganic materials 0.000 abstract description 54
- 229910000765 intermetallic Inorganic materials 0.000 description 48
- 238000000151 deposition Methods 0.000 description 22
- 239000000463 material Substances 0.000 description 15
- CLDVQCMGOSGNIW-UHFFFAOYSA-N nickel tin Chemical compound [Ni].[Sn] CLDVQCMGOSGNIW-UHFFFAOYSA-N 0.000 description 15
- 235000012431 wafers Nutrition 0.000 description 12
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 8
- 238000001465 metallisation Methods 0.000 description 8
- 239000000919 ceramic Substances 0.000 description 7
- 230000008021 deposition Effects 0.000 description 7
- 150000002739 metals Chemical class 0.000 description 7
- 238000010587 phase diagram Methods 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- 238000002679 ablation Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000011135 tin Substances 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- 238000000224 chemical solution deposition Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 229910018487 Ni—Cr Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000005137 deposition process Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000007790 solid phase Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- 238000009623 Bosch process Methods 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 238000000541 cathodic arc deposition Methods 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005274 electrospray deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000007737 ion beam deposition Methods 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000005289 physical deposition Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004549 pulsed laser deposition Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
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Abstract
提供了形成半导体封装件的方法。具体实施方式包括在管芯背面(16)形成具有多个子层(40‑46)的中间金属层(26),每个子层包含金属,所述金属选自钛、镍、铜、银、以及它们的组合。将锡层(48)沉积到所述中间金属层(26)上,然后与衬底(50)的银层(52)一起进行回流焊以形成熔融温度大于260摄氏度并包括银和锡组成的金属间化合物和/或铜和锡组成的金属间化合物的金属间化合物层(56)。形成半导体封装件的另一种方法包括在管芯(14)的顶侧(18)上的多个裸露焊盘(20)中的每个裸露焊盘上形成凸块(22),每个裸露焊盘(20)由钝化层(24)所包围,每个凸块(22)包括如上所述的中间金属层(36)和耦接到所述中间金属层(36)的锡层(48),锡层(48)然后被以衬底(50)的银层(52)回流焊以形成如上所述的金属间化合物层(64)。
Description
技术领域
本文件的各方面整体涉及半导体装置安装。更具体的实施方式涉及通过将金属或金属焊料进行回流焊来安装半导体装置。
背景技术
半导体装置的制造通常包括将一个或多个管芯和/或其它物体安装到印刷电路板(PCB)(母板)(板材)或其它衬底上。此耦接过程可通过将金属或金属焊料进行回流焊来实现,金属或金属焊料凝固后,在管芯(或其它元件)和板材或衬底之间形成粘结部。管芯和其它元件也可通过将金属或金属焊料进行回流焊来耦接到散热片。
发明内容
形成半导体封装件的方法的具体实施方式可包括:在管芯背面形成中间金属层,该中间金属层具有多个子层,每个子层包含金属,该金属选自钛、镍、铜、银、以及它们的任意组合;将锡层沉积中间金属层上;以及将锡层与衬底的银层一起回流焊,以形成熔融温度高于260摄氏度的金属间化合物层(intermetallic layer)。
形成半导体封装件的方法的实施方式可包括以下各项中的一项、全部或任一项:
衬底可包括铜层,在将锡层与衬底的银层一起回流焊之前,将铜层耦接到衬底的银层。
中间金属层的多个子层可包括含钛子层和含镍子层。
中间金属层的多个子层可包括含银子层。
多个子层可包括以下多个子层的布置方式:直接在管芯背面形成含钛子层,直接将含镍子层沉积到含钛子层上,以及直接将含银子层沉积到含镍子层上。
中间金属层的多个子层可包括含铜子层。
多个子层可包括以下多个子层的布置方式:直接在管芯背面形成含钛子层,直接将含镍子层沉积到含钛子层上,以及直接将含铜子层沉积到含镍子层上。
中间金属层的多个子层可包括含银子层。
多个子层可包括以下多个子层的布置方式:直接在管芯背面形成含钛子层,直接将含镍子层沉积到含钛子层上,直接将含铜子层沉积到含镍子层上,以及直接将含银子层沉积到含铜子层上。
中间金属层的多个子层可包括含钛子层和含铜子层。
多个子层可包括以下多个子层的布置方式:直接在管芯背面形成含钛子层,以及直接将含铜子层沉积到含钛子层上。
中间金属层的多个子层可包括含银子层。
多个子层可包括以下多个子层的布置方式:直接在管芯背面形成含钛子层,直接将含铜子层沉积到含钛子层上,以及直接将含银子层沉积到含铜子层上。
中间层可包括以下中的一者:银和锡组成的金属间化合物(intermetallic);以及铜和锡组成的金属间化合物。
在实施方式中,形成半导体封装件的方法没有使用任何焊膏和焊料预制件。
形成半导体封装件的方法的具体实施方式可包括:在管芯的顶侧上的多个裸露焊盘中的每个裸露焊盘上形成凸块,每个裸露焊盘在管芯顶侧由钝化层包围,每个凸块包括中间金属层和直接沉积到中间金属层上的锡层,每个中间金属层包括多个子层,每个子层包含金属,该金属选自钛、镍、铜、银、以及它们的任意组合;将每个锡层与衬底的银层一起进行回流焊,以形成多个金属间化合物层,每个金属间化合物层具有大于260摄氏度的熔融温度并包括银锡金属间化合物和铜锡金属间化合物中的一者。
半导体封装件的具体实施方式可包括:多个子层按以下顺序布置:管芯;含钛层,所述含钛层耦接到所述管芯上;金属间化合物层,所述金属间化合物层包括银锡金属间化合物和铜锡金属间化合物中的一者;衬底,所述衬底包括铜层;其中金属间化合物层的熔融温度大于260摄氏度。
半导体封装件的具体实施方式可包括以下各项中的一相、全部或任何一项:
在含钛层和金属间化合物层之间形成含镍层。
在含钛层和金属间化合物层之间形成含铜层。
可在管芯背面形成含钛层。
可在管芯的裸露焊盘上形成含钛层。
对于本领域的普通技术人员而言,通过具体实施方式以及附图并通过权利要求书,上述以及其他方面、特征和优点将会显而易见。
附图说明
将在下文中结合附图来描述各实施方式,其中类似标号表示类似元件,并且:
图1是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图2是由图1的元件形成的半导体装置封装件的实施方式的剖视图;
图3是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图4是由图3的元件形成的半导体装置封装件的具体实施方式的剖视图;
图5是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图6是由图5的元件形成的半导体装置封装件的实施方式的剖视图;
图7是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图8是由图7的元件形成的半导体装置封装件的实施方式的剖视图;
图9是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图10是由图9的元件形成的半导体装置封装件的实施方式的剖视图;
图11是用于形成半导体装置封装件的实施方式的管芯、多个金属层和衬底的剖视图;
图12是由图11的元件形成的半导体装置封装件的实施方式的剖视图;
图13是铜锡二元相图;
图14是银锡二元相图;
图15示出了处理步骤的示例,处理步骤可以在形成图2、图4、图6、图8和图10中任一项的半导体装置封装件的过程中执行;
图16示出了另一处理步骤的示例,另一处理步骤可以在形成图2、图4、图6、图8和图10中任一项的半导体装置封装件的过程中执行;
图17示出了另一处理步骤的示例,另一处理步骤可以在形成图2、图4、图6、图8和图10中任一项的半导体装置封装件的过程中执行;
图18示出了另一处理步骤的示例,另一处理步骤可以在形成图2、图4、图6、图8和图10中任一项的半导体装置封装件的过程中执行;
图19是管芯的剖视图,该管芯具有在管芯的顶侧上通过钝化层暴露在外的管芯焊盘;
图20示出了处理步骤的示例,处理步骤可以在形成图12的半导体装置封装件的过程中执行;
图21示出了另一处理步骤的示例,另一处理步骤可以在形成图12的半导体装置封装件的过程中执行;
图22示出了另一处理步骤的示例,另一处理步骤可以在形成图12的半导体装置封装件的过程中执行;
图23示出了另一处理步骤的示例,另一处理步骤可以在形成图12的半导体装置封装件的过程中执行。
具体实施方式
本公开、其各方面以及实施方式并不限于本文所公开的具体部件、组装工序或方法元素。本领域已知的与具有单个回流焊金属间化合物层的预期半导体封装件和相关方法相符的许多其它部件、组装工序和/或方法元素将显而易见地与本公开的特定实施方式一起使用。因此,例如,尽管本发明公开了特定实施方式,但此类实施方式和实施部件可包括符合预期操作和方法且针对具有单个回流焊金属间化合物层的此类半导体封装件的本领域已知的任何形状、尺寸、样式、类型、型号、版本、量度、浓度、材料、数量、方法元素、步骤等、和相关方法,以及实施部件和方法。
如本文所用,管芯“背面”定义为管芯的这样的侧面,该侧面上不具有电连接件或者该侧面上仅仅具有诸如焊盘或其它元件等电连接件,电子连接件预期作为管芯的电接地或电气布线。如本文所用,管芯“顶侧”定义为管芯的这样的侧面,该侧面上具有至少一个电连接件,诸如预期不仅仅作为管芯的电接地的焊盘或其它元件。如本文所用,“金属间化合物”是指两种或多种基本金属的化学计量固定的固态化合物,每种基本金属的原子在晶格结构内具有固定的而非任意的位置。如本文所用,更一般地来说,“金属间化合物层”是指包括一种或多种金属间化合物但是在一些情况下可能不完全由上文定义的金属间化合物所形成的层。
参见图1-图10,形成半导体装置封装件(封装件)的方法的各种实施方式涉及对晶圆背衬金属化件的采用,在管芯已经进行单切后,稍后将晶圆背衬金属化件锯穿或以其它方式进行分段。在图1-图10中,管芯已经进行单切,背衬金属化件已经锯穿或以其它方式进行分段。在实施方式中,在对晶圆进行单切之前,背衬金属化件,包括中间金属层(包括所有子层)和锡层,都通过晶圆背衬金属化技术来应用。
现在参见图1至图2,在形成半导体装置封装件(封装件)2的方法的各种实施方式中,该方法包括在管芯14的背面16上形成中间金属层26。中间金属层26包括多个子层38。包含钛的第一子层38(钛子层)40直接沉积到管芯14的背面16上。包含镍42的子层38(镍子层)直接沉积到钛子层40上。如本文所用,“直接沉积到”钛子层上的意思包括任何沉积到非氧化/非还原钛层上的过程、以及沉积到氧化或以其它方式进行还原的钛层40的膜上的过程,钛子层40是在沉积镍子层42之前形成的(每当一层“直接”沉积到另一层上时,相同的意思适用于本文件全文)。包含铜的子层38(铜子层)46直接沉积到镍子层42上。包含银的子层38(银子层)44直接沉积到铜子层46上。在各种实施方式中,本文公开的每个子层均由其所命名的金属的至少50重量%、至少80重量%、至少85重量%、至少90重量%、至少95重量%、至少96重量%、至少97重量%、至少98重量%、和/或至少99重量%形成。
每个子层38以及本文所述的所有其它金属层的沉积过程可使用任何薄膜化学和/或物理沉积技术来完成,作为非限制性示例,诸如镀敷、电镀、无电镀、化学溶液沉积(CSD)、化学浴沉积(CBD)、旋涂、化学气相沉积(CVD)、金属有机化学气相沉积(MOCVD)、等离子体增强型CVD(PECVD)、原子层沉积(ALD)、物理气相沉积(PVD)、热蒸发、电子束蒸发、分子束外延(MBE)、溅射、脉冲激光沉积、离子束沉积、阴极电弧沉积(电弧PVD)、电流体动力沉积(电喷雾沉积)、以及任何其它金属层沉积方法。
在通过任何如上所述的晶圆背衬金属化技术已经沉积了上述数层之后,可对晶圆进行单切,以形成如图1所示的随后可以附接到衬底50上的单个单元。在一些实施方式中,然而,可以在单切成单个单元之后对这些层进行沉积。在实施方式中,衬底50为陶瓷板的一部分。单切过程的一些代表性示例将在后文进行描述。衬底50包括在铜层54上的银层52,底部锡层48通过传统的260摄氏度回流焊曲线与银层52一起进行回流焊,使得银子层44和铜子层46也熔融或至少变得柔软或散开/混杂,使银子层44的银以及铜子层46的铜足以与锡层48的锡混合,以形成锡、银、和/或铜金属间化合物。锡层48为纯锡或部分为纯锡,并在231摄氏度下熔融,湿度对于衬底50而言正好,空洞最少。熔融的锡中存在银和铜,即使是少量,也会很快形成银、锡、和/或铜中一者或多者的金属间化合物,金属间化合物的熔融温度(即,液相线温度)高于锡的熔融温度,这防止了或有助于防止锡在衬底50上横向流动。
参见图13的铜/锡系统的二元相图,即使锡中只有少量的约2重量%-3重量%的铜,处于二元相图中的点66,也会使液相线温度从约232摄氏度升高至约260摄氏度。液相线温度是在此线之上仅存在液相的临界线,固相线温度是在此线之下仅存在固相的临界线。在液相线温度与固相线温度之间可能存在一些固相和一些液相。为了实现本公开的目的,液相线温度对应物质的熔点或熔融温度。参见图14的铜/锡系统的二元相图,即使锡中只有少量的约6重量%的银,处于二元相图中的点68,也会使液相线温度从约232摄氏度升高至约260摄氏度,而固相线温度保持在221摄氏度。银为10重量%且锡为90重量%时,液相线温度为295摄氏度,而固相线温度保持在221摄氏度。银为5重量%且锡为95重量%时,液相线温度为240摄氏度,并且固相线温度为221摄氏度。银为约27重量%且锡为约73重量%时,液相线温度为400摄氏度,并且固相线温度保持为221摄氏度。在各个实施方式中,在进行回流焊以形成73重量%的锡和27重量%的银结构期间,可以在回流焊之前初始通过1.793微米锡层和1.207微米银层来形成3微米的焊接点。
半导体封装件2的金属间化合物层56的熔融温度的升高因此导致形成这样的结构,该结构在随后的升温期间,当其它装置通过标准260摄氏度回流焊曲线进行回流焊或以其它方式附接到衬底50上时,将不进行回流焊和/或再熔融的结构。金属间化合物层56的这些特性由此生成了“单回流焊”封装件,或者换句话说,金属间化合物层56为“单回流焊”层,在标准260摄氏度回流焊曲线下将仅仅进行一次回流焊。这使管芯14在随后的回流焊期间当其它装置安装到板材上时保持在适当位置,衬底50是该板材的一部分。下文所述的更多的传统钛/镍/金-锡背衬金属层、以及其它传统背衬金属材料在第一次进行回流焊之后熔融温度并未升高,但是在经受相同的回流焊曲线温度时容易再次进行回流焊。
就真正的局部化组合物而言,金属间化合物层56内可能存在许多不同的金属间化合物,尽管金属间化合物层56也可部分为溶液的形式,其可包括任何包含银、锡、和/或铜中两者或多者的金属间化合物。换句话说,溶液中可存在一些纯锡、一些纯铜、一些纯银、一些纯镍等,其中散布了一些金属间化合物,诸如沉淀的固溶体形式的金属间化合物晶体,以及/或者尤其在边界点处(诸如金属间化合物层56与铜层54以及与铜子层46或在本文所述的其它示例中进行回流焊之后的最底层38的边界)存在平面金属间化合物层,而不是整个金属间化合物层56由银、锡、和/或铜中两者或多者的金属间化合物构成。然而,由于层56中金属间化合物的存在,金属间化合物层56最终的熔融温度大于260摄氏度,使得其在随后的高温处理中不进行回流焊,随后的高温处理将包括将衬底50和/或半导体封装件2的温度升高至或约260摄氏度。
金属间化合物层56中的金属间化合物的最终组合物变化范围很广,这是因为,如二元相图所示,仅仅需要将超过2重量%的铜或4重量%的银与锡混合以将总混合物的熔融温度升高至260摄氏度以上,并且添加更多的银或铜之后,熔融温度持续增加。利用下文进一步所述的传统钛/镍/金-锡背衬金属化件,由于金-锡层(在一些传统实施方式中,厚度为3微米)需要金为80+/-0.8重量%的组合物,热操作范围相当有限。
图1的结构的层可具有如下厚度,钛子层40的厚度可以为或可为约尽管可使用的厚度范围很广。此子层用于粘附到管芯14的硅上,并且可以用诸如钛-钨(TiW)、铬(Cr)、或镍-铬(NiCr)等的其它传统材料替换。镍子层42可以为或可为约至约在具体实施方式中,镍子层可以为此层可能更厚,以用于以下情况:更高温度下的应用(诸如,发光二极管(LED)越热,存储温度要求越高);或者当锡层48更厚,使得许多或大多数(或全部)镍被吸收到镍-锡金属间化合物中这一通常而言不期望的风险降低;以及/或者当衬底50不包括银层52时,银层用以使一些锡被吸收到银-锡金属间化合物中,从而降低镍-锡金属间化合物的形成率。镍子层42过厚可造成应力过大。铜子层46可为或可为约厚,并且在在实施方式中范围可以为至银子层44可以为或可为约厚,并且在实施方式中范围可以介于和之间、或介于和之间(在如本文所述的一些实施方式中,根据不存在银子层44)。在实施方式中,锡层48可以为或可以为约厚,并且在实施方式中范围可以为至
银与锡之比可根据应用进行调节。如果衬底50的表面粗糙的话,增加锡层48的厚度可以使衬底50具有附加或加强的湿度并减少空洞。增加银子层44的厚度可增强对镍的保护(即,防止镍被吸收到镍-锡金属间化合物中)。然而,可能期望一些镍而非全部镍被吸收到镍-锡金属间化合物中。因此,如果银子层44太厚,这会过度限制镍-锡金属间化合物的量,并会实际上降低半导体封装件2的剪切强度和硬度。因此可调节银锡之比,使得在回流焊期间形成所期望量的所需银-锡金属间化合物。铜锡之比也可根据具体应用进行调节。增加铜子层46的厚度可以使锡层48更厚,这是因为铜子层46越厚,越能减慢或抑制镍-锡金属间化合物的形成。
通过将图2与图1进行对比可以看出,锡层48、衬底50的银层52、银子层44、和铜子层46可以被金属间化合物层56吸收。使用子层38和锡层48也可实现将管芯14粘附到衬底50上,而不需使用焊膏或预制件。铜层54和铜子层46的剩余的部分可以为锡和金属间化合物以及金属间化合物层56的其它元素提供可焊性表面。在实施方式中,衬底50的铜层54中的铜也可以与锡层48中的锡形成金属间化合物,从而进一步提供了牢固的管芯附接,并且通过将一些锡吸收到锡-铜金属间化合物中而减少了镍-锡金属间化合物的量。
图3和图4示出了与图1和图2相似的材料系统,但是其中中间金属层28不包括银子层44。其余层可具有与上文所述相同的厚度。过程和结果与上文相似,除了:金属间化合物层58可包括从某种程度而言总体上不同的银、铜、和锡的百分比,因此可具有不同的金属间化合物和/或不同量的不同金属间化合物、不同量的沉淀或溶体的金属或化合物等。然而,金属间化合物层58的熔融温度大于260摄氏度,而半导体封装件4一般具有与上文关于半导体封装件2所述的相似的单回流焊特性。通过将图3与图4进行对比可以看出,铜子层46、衬底50的锡层48和银层52可完全或部分被金属间化合物层58吸收。
图5和图6示出了与图1和图2相似的材料系统,但是其中中间金属层30不包括镍子层42。其余层可具有上文所述的厚度,尽管在实施中,铜子层46的厚度范围可以介于和之间。过程和结果与上文相似,然而,除了:金属间化合物层60可具有从某种程度而言总体上不同的银、铜、和锡的百分比,因此可具有不同的金属间化合物和/或不同量的不同金属间化合物、不同量的沉淀或溶体的金属或化合物等。然而,金属间化合物层60的熔融温度大于260摄氏度,而半导体封装件6一般具有与上文关于半导体封装件2所述的相似的单回流焊特性。通过将图5与图6进行对比可以看出,锡层48、银子层44、一部分铜子层46、和衬底50的银层52可以被金属间化合物层60吸收。
图7和图8示出了与图1和图2相似的材料系统,但是其中中间金属层32不包括镍子层42或银子层44。其余层可具有上文所述的厚度。过程和结果与上文相似,然而,除了:金属间化合物层62可包括从某种程度而言总体上不同的银、铜、和锡的百分比,因此可具有不同的金属间化合物和/或不同量的不同金属间化合物、不同量的沉淀或溶体的金属或化合物等。然而,金属间化合物层62的熔融温度高于260摄氏度,而半导体封装件8一般具有与上文关于半导体封装件2所述的相似的单回流焊特性。通过将图7与图8进行对比可以看出,锡层48、一部分铜子层46、和衬底50的银层52可以完全或部分被金属间化合物层62吸收。
图9和图10示出了与图1和图2相似的材料系统,但是其中中间金属层34不包括铜子层46。其余层可具有上文所述的厚度,尽管在实施中,银子层44的厚度可以为并且厚度范围可以介于和之间。过程和结果与上文相似,然而,除了:金属间化合物层64可具有从某种程度而言总体上不同的银、铜、和锡的百分比,因此可具有不同的金属间化合物和/或不同量的不同金属间化合物、不同量的沉淀或溶体的金属或化合物等。具体来说,由于不存在铜子层46,尽管由衬底50的铜层54形成的金属间化合物层64中存在某些铜,但是金属间化合物层64的金属间化合物主要包含银锡金属间化合物。然而,铜锡金属间化合物可以在金属间化合物层64与衬底50的铜层54的界面处形成。金属间化合物层64的熔融温度也大于260摄氏度,并且半导体封装件10一般具有与上文关于半导体封装件2所述的相似的单回流焊特性。通过将图9与图10进行对比可以看出,锡层48、银子层44、和衬底50的银层52可以在回流焊期间被金属间化合物层64吸收。镍子层42与锡层48之间的银子层44抑制锡与镍的扩散,并且限制镍-锡金属间化合物的形成,这可以实现更牢固的管芯粘结接合或焊接接合。
图9和图11的材料系统在一些实施中可遭遇问题,其中如果所含的锡层48太厚,所有或基本上所有镍都被镍-锡金属间化合物所吸收。作为非限制性示例,在实施方式中,当衬底50不是陶瓷衬底的一部分时,当要求空洞更少时,或者当需要更高焊接合以提高可靠性时,为了回流焊到更粗糙的衬底50(诸如,更粗糙的陶瓷衬底)上,可能需要更厚的锡层48。在此类情形下,增加锡银之比,并且在此类情形下,可使用图1、图3、图5、或图7的实施方式,而不是不包括镍子层42或包括锡层48与镍子层42之间的铜子层46以(通过使一些锡吸收到锡-铜金属间化合物中)防止或抑制镍-锡金属间化合物的形成的实施方式。减少镍-锡金属间化合物可形成更牢固的管芯粘结接合/焊接接合。一些镍-锡金属间化合物是可能期望的并在回流焊期间显示出良好的湿润性和粘附性,但是当所有镍被锡吸收到镍-锡金属间化合物中时,如此则不再有任何纯镍存在,粘附性整体降低,并且半导体封装件的剪切强度下降。
此外,镍子层42为高应力金属化件,在单切期间,其比其它背衬金属更加难以分离。例如,取决于管芯尺寸,如果镍子层42的厚度超过1微米,则镍子层42可能难以通过射流消融工艺进行分离。在具体实施方式中,对于不同的管芯形状、或极小的管芯14诸如在侧面上小于180微米的管芯、或非常薄的管芯14诸如厚度低于100微米,可能期望不用镍即可形成半导体封装件。此类管芯可固有地具有很高的应力,这意味着镍并非可行的(或不可作为可行的)选项。另外,由于破坏厚的镍层所需的射流消融力可能会对管芯施加比管芯与胶带之间的吸引力更大的力,试图用射流来消融厚的镍可能将胶带上的管芯冲掉。在此类实施方式中,镍子层42可以用铜子层46替代。此类替代也可改善射流消融过程中的性能。
图11和图12示出了使用不同的方法实施方式所形成的半导体封装件12,其中为了形成凸块22用于倒装芯片封装,将中间金属层36施加到管芯14的顶侧18上而不是背面16上。在此类方法实施方式中,这些层仍可具有上述任一厚度。与上文关于背衬金属方法实施方式所述的情况相似,也可在单切之前对整个晶圆执行倒装芯片过程,现在参考图19-23和图11和图12对该过程的描述。单切之前,每个管芯14的顶侧18包括多个焊盘20(焊盘为电触件,并非预期首要作为接地件),其中每个焊盘20由钝化层24所包围,如图19所示。作为非限制性示例,钝化层可以是氧化物、氮化物、聚酰亚胺、或能够使硅表面钝化的其它材料,并且可通过用于沉积/形成此类材料的各种钝化工艺方法中任一者来形成。
中间金属层36的每个子层40依次进行沉积,如图20所示先直接将子层40沉积到焊盘20上。钝化层24(或稍后进行移除的钝化层24上方的掩蔽材料)防止在将子层40(通过电镀、溅射、蒸发等)沉积到焊盘20之间的空间期间形成电连接。因此,当沉积了子层40时以及当沉积了锡层48时,形成凸块22。作为代表性示例,图20-图22示出了直接沉积到每个焊盘20(图20)上的钛子层40,直接沉积到每个钛子层40(图21)上的镍子层42和直接沉积到每个镍子层42(图22)上的银子层44。锡层48直接沉积到每个银子层44(图23)上。然后将锡层48与衬底50的银层52一起进行回流焊,这也致使银子层44熔融或至少软化并变得分散,从而形成金属间化合物层64,每个金属间化合物层64均可吸收银子层44、锡层48、以及直接在凸块22下方的衬底50的银层52。作为非限制性示例,可使用电镀、无电镀法、以及其它金属层沉积法来完成将每个金属层仅仅选择性地沉积到没有钝化的部分。
尽管附图所示的中间金属层36与图9的中间金属层34相似,此仅仅作为代表性示例给出,相反,图11和图12的倒装芯片程序可能具有如图7所布置的中间金属层32、或如图5所述布置的中间金属层30、如图3所布置的中间金属层28、或如图1所布置的中间金属层26。在任何情况下,过程和结果与上文关于图1-10所示的背衬金属结构所述相似,其中所得的金属间化合物层具有整体上不同的银、铜、和锡的百分比,并因此根据所用的具体子层38,具有不同的金属间化合物和/或不同量的不同金属间化合物、不同量的沉淀或溶体的金属或化合物等。无论使用何种子层38,半导体封装件12的金属间化合物层64的熔融温度都大于260摄氏度,并因此半导体封装件12具有与上文关于半导体封装件2所述的相似的单回流焊特性。
参见图15-图18并回到图1-图10的背衬金属示例,在各种实施方式中,沉积到晶圆的背面16上的背衬金属70可包括本文所述的中间金属层26、28、30、32、34、36中一者以及锡层48。如图15所示,作为非限制性示例,在移除钝化层的所选部分之后,可以通过基于SF6等离子体的干法刻蚀来从顶侧18(在所示实施方式中,顶侧是包括预期不仅仅作为接地件的焊盘20的侧面)对晶圆进行刻蚀,该基于SF6等离子体的干法刻蚀采用Bosch工艺或时分多路复用(TDM)刻蚀法。钝化层在实施方式中可以是本文件公开的任何钝化层。等离子体刻蚀可导致厚度低至15微米的窄划线格,并且也不会对管芯边缘造成机械损坏(诸如,碎屑或裂纹)、各晶圆的管芯增大、成型管芯、带键管芯、圆角、以及管芯单切吞吐量增加。
如图16所示,在将第二胶带76施加到单切管芯14的顶侧18以及施加到边框72后,可移除在单切过程中将背衬金属70联接到边框72上的第一胶带74。作为非限制性示例,第一胶带74(以及第二胶带76和后文所述的第三胶带80也)可以是在对胶带进行UV辐照后更易于移除的紫外线(UV)胶带。可翻转膜边框72,使得水射流件78如图17所示进行定位,并且水射流件78用于在称为背衬金属射流消融的过程中将水喷射到背衬金属70上,以移除背衬金属的与上述划线格或划线槽对应的部分,从而单切背衬金属70并形成多个半导体封装件2、4、6、8、或10。在此过程中,膜边框72旋转,同时水射流件78喷嘴左右摆动以进行完全覆盖,因此移除所有与划线格或划线槽对应的背衬金属70。在各种实施方式中,可使用除了水以外的一种或多种其它液体。如图18所示,然后可再次翻转边框72,可将第三胶带80施加到每个管芯14的背衬金属70侧面,并且可移除第二胶带76用于进行进一步处理,诸如可选的晶圆清洗。单切单元,包括管芯14和中间金属层26、28、30、32、34、或36以及锡层48,然后准备好执行上述回流焊过程。当然,图11和图12所示的倒装芯片示例并不涉及此类背衬金属处理过程。通过晶圆清洗工具移除背面金属化件,实现了将采用如上所述的等离子体刻蚀的管芯干法单切用于窄划线槽以及实现其它益处,同时将另一工艺用于对背衬金属70进行单切。这一点在一些环境中是可用的,其中背衬金属70通过等离子体干法刻蚀工艺进行单切耗时较长,或者无法通过等离子体干法刻蚀工艺进行移除。即使在裸露锡存在且提供了合适的加工条件的情况下,也可使用射流消融。
在实施方式中,衬底50无需具有银层52,并且子层38本身可具有形成金属间化合物层56、58、60、62、或64的期望的金属间化合物所需的所有银和/或铜。
传统焊膏或焊料预制件工艺结果并不推荐使用背衬金属装置和本文公开的倒装芯片装置。绝大多数传统管芯附接工艺包括添加焊膏或焊料预制件,以在管芯与粘结表面之间添加焊料。一般来说,具有多种加工优势,包括:此类工艺仅要求管芯表面和粘结表面是可焊性表面(换句话说,用简单可焊性背衬金属来制作晶圆比用可焊性同时本身也是焊料的背衬金属来制作晶圆更简单);可以为管芯附接材料实现更高的柔性(即,如果需要的话,不同的焊盘可通过不同类型的焊膏或预制件进行焊接——这一点当整个晶圆上的焊盘铺设成背衬金属时将难以实现);并且一般来说,对于热致应力变成潜在问题的情况,可以用焊膏或预制件制作更厚的连接件(诸如,用塑料封装件)。同样地,试图用包括布置成业界所用的钛/镍/锡结构的多层的背衬金属结构来替代焊膏已经证明,由于镍层太厚,导致应力太高,这一点可以在沉积和/或包括稍后进行回流焊的高温时可以见到,这会在终端用户组装处导致掉线问题。在这些尝试中,需要使用厚的镍层,或换句话说,在此钛/镍/锡结构中,镍层厚度增加,以弥补扩散到镍层中的锡并保证镍-锡金属间化合物的形成。可以观察到,镍的完整性受到限制,这是因为镍被消耗以形成镍-锡金属间化合物,这削弱了管芯的剪切强度。其它观察结果表明,由于之前的镍背衬金属结构较厚,铺设多个层也需要很长的沉积过程,并且一般来说,与使用焊膏相比,成本更高。传统工艺的这些公认优点和缺点本领域普通技术人员已知,这将促使他们尝试非焊膏/焊料预制件工艺,非焊膏/焊料预制件工艺涉及镍和其它背衬金属的金属间化合物,仅仅将背衬金属或凸块材料用于焊接。
在实施方式中,封装件2、4、6、8、10、12进行特别设计,用于应力更小的应用场景,诸如衬底50为陶瓷单板的一部分的情况。本文件公开的封装件和方法可具有其它优点。本文公开的方法实施方式可实现对极小管芯的粘结。例如,如果通过传统分配体积的焊料进行粘结,面积约200微米×200微米(或约220微米×220微米)的管芯可导致管芯在管芯粘结期间发生倾斜,从目标位置发生位移(管芯浮动)等等。对于此类较小管芯而言,用本文公开的方法一般不会出现此类不利方面。
关于本文公开的倒装芯片结构与方法,传统的倒装芯片凸块结构通过焊膏安装到板材或衬底上,诸如,锡-铅或铜-锡-银焊膏,以助于将管芯与板材或衬底的应力隔绝开来。有时使用大量焊料。在回流焊过程中,通过此类焊膏形成金属间化合物,但是由于大量的焊料,倒装芯片凸块结构仍将在随后的回流焊过程中熔融。这实际上设计如此,使得倒装芯片装置可重新发挥作用,或者如果经发现这些装置发生故障,进行替换。因此,对于普通技术人员而言,通过焊膏进行传统的倒装芯片加工并不推荐用凸块材料自身将管芯附接到衬底上。
如上所述,可以将实施方式中的半导体封装件2、4、6、8、10、12用于发光二极管(LED)应用中。在实施方式中,也可将半导体封装件用于涉及将管芯安装到陶瓷衬底上(诸如,作为非限制性示例,将管芯安装到陶瓷衬底的衬底50上)的非LED应用中。在实施方式中,也可将半导体封装件用于涉及将管芯安装到非陶瓷衬底上的应用中,作为非限制性示例,所述非陶瓷衬底诸如引线框、有机衬底、以及任何其它不含陶瓷材料的衬底类型。
在实施方式中,本文所述的背衬金属示例可用于发光二极管(LED)半导体封装件,并且比传统的背衬金属材料成本更低,其可包括以钛/镍/金-锡层的顺序进行布置的背衬金属结构(在一些情况下,金-锡层的厚度为3微米),与传统晶圆背衬金属成本相比,这节省了超过77%的材料成本。使用本文公开的材料也可通过为多层涂敷实现成本更低的蒸发技术来替代成本高昂的喷射技术来降低加工成本。传统的钛/镍/金-锡示例中的金-锡层的金锡比率为80/20(重量比例),并且在280摄氏度时熔融,这比用于随后将装置添加到板材或衬底上的标准260摄氏度回流焊曲线更高。本文所述的倒装芯片示例也可用于LED半导体封装件,其中消除丝焊将防止光线被丝线挡住。
在以上描述涉及具有单个回流焊金属间化合物层的半导体封装件和相关方法以及实施部件、子部件、方法和子方法的具体实施方式的地方,应当易于显而易见的是,可在不脱离其实质的情况下做出多种修改,并且这些实施方式、实施部件、子部件、方法和子方法可应用于其它具有单个回流焊金属间化合物层的半导体封装件和相关方法。
Claims (6)
1.一种半导体封装件,包括:
管芯,所述管芯包括:
含钛层,所述含钛层耦接到所述管芯;和
直接耦接到所述含钛层的金属间化合物层,所述金属间化合物层包含银和锡组成的金属间化合物以及铜和锡组成的金属间化合物中的一者;以及
衬底,所述衬底包括直接耦接到所述衬底的仅银层,所述银层直接耦接到所述金属间化合物层;
其中所述金属间化合物层具有大于260摄氏度的熔融温度;
其中所述金属间化合物层不包括焊料。
2.根据权利要求1所述的半导体封装件,还包括位于所述含钛层和所述金属间化合物层之间的含铜层。
3.根据权利要求1所述的半导体封装件,其中所述含钛层位于所述管芯的背面。
4.一种半导体封装件,包括:
管芯,所述管芯耦接到第一子层,所述第一子层直接耦接到第二子层,其中所述第一子层和所述第二子层各自包含金属,所述金属选自钛、铜、铬、以及它们的任意组合;和
金属间化合物层,所述金属间化合物层直接耦接到所述第二子层,其中所述金属间化合物层仅在温度大于当所述金属间化合物第一次回流时施加的温度的情况下二次回流;
衬底,包括直接耦接到所述衬底的仅银层,所述银层直接耦接到所述金属间化合物层;
其中所述金属间化合物层包括多个子层;并且
其中所述金属间化合物层不包括焊料。
5.根据权利要求4所述的封装件,其中所述第一子层包含钛。
6.一种半导体封装件,包括:
多个裸露焊盘,所述多个裸露焊盘位于管芯的顶侧上;
钝化层,所述钝化层位于所述管芯的所述顶侧上围绕每个裸露焊盘;和
凸块,所述凸块耦接到所述多个裸露焊盘中的每个裸露焊盘;其中每个凸块包括钛子层、以及直接耦接到所述钛子层的银锡金属间化合物层和铜锡金属间化合物层中的一者,所述银锡金属间化合物层和所述铜锡金属间化合物层中的所述一者具有大于260摄氏度的熔融温度;
衬底,包括直接耦接到所述衬底的仅银层,所述银层与每个凸块的所述金属间化合物层直接耦接;
其中所述银锡金属间化合物层和所述铜锡金属间化合物层中的所述一者不包括焊料。
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-
2015
- 2015-01-27 US US14/606,667 patent/US9564409B2/en active Active
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- 2015-12-08 KR KR1020177020957A patent/KR102487140B1/ko active IP Right Grant
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Also Published As
Publication number | Publication date |
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US20160218074A1 (en) | 2016-07-28 |
US20170133341A1 (en) | 2017-05-11 |
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US20210327843A1 (en) | 2021-10-21 |
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US11049833B2 (en) | 2021-06-29 |
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