CN1071490C - 形成钨柱塞的方法 - Google Patents

形成钨柱塞的方法 Download PDF

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Publication number
CN1071490C
CN1071490C CN95119463A CN95119463A CN1071490C CN 1071490 C CN1071490 C CN 1071490C CN 95119463 A CN95119463 A CN 95119463A CN 95119463 A CN95119463 A CN 95119463A CN 1071490 C CN1071490 C CN 1071490C
Authority
CN
China
Prior art keywords
layer
forming
interlayer insulating
insulating film
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN95119463A
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English (en)
Chinese (zh)
Other versions
CN1135094A (zh
Inventor
松本明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CN1135094A publication Critical patent/CN1135094A/zh
Application granted granted Critical
Publication of CN1071490C publication Critical patent/CN1071490C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
CN95119463A 1994-12-20 1995-12-20 形成钨柱塞的方法 Expired - Fee Related CN1071490C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP316188/1994 1994-12-20
JP316188/94 1994-12-20
JP6316188A JP2758841B2 (ja) 1994-12-20 1994-12-20 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN1135094A CN1135094A (zh) 1996-11-06
CN1071490C true CN1071490C (zh) 2001-09-19

Family

ID=18074282

Family Applications (1)

Application Number Title Priority Date Filing Date
CN95119463A Expired - Fee Related CN1071490C (zh) 1994-12-20 1995-12-20 形成钨柱塞的方法

Country Status (5)

Country Link
US (1) US5893749A (enExample)
JP (1) JP2758841B2 (enExample)
KR (1) KR100228565B1 (enExample)
CN (1) CN1071490C (enExample)
TW (1) TW307021B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10172969A (ja) * 1996-12-06 1998-06-26 Nec Corp 半導体装置の製造方法
TW398065B (en) * 1997-07-16 2000-07-11 United Microelectronics Corp The manufacturing method of the integrated circuit metal wiring
TW362261B (en) * 1997-12-13 1999-06-21 United Microelectronics Corp Manufacturing method of contact plugs
US6319822B1 (en) * 1998-10-01 2001-11-20 Taiwan Semiconductor Manufacturing Company Process for forming an integrated contact or via
US6146991A (en) * 1999-09-03 2000-11-14 Taiwan Semiconductor Manufacturing Company Barrier metal composite layer featuring a thin plasma vapor deposited titanium nitride capping layer
CN100369329C (zh) * 2003-03-31 2008-02-13 住友电气工业株式会社 各向异性导电膜及其制造方法
US6989105B2 (en) * 2003-06-27 2006-01-24 International Business Machines Corporation Detection of hardmask removal using a selective etch
US7091085B2 (en) * 2003-11-14 2006-08-15 Micron Technology, Inc. Reduced cell-to-cell shorting for memory arrays
CN100395451C (zh) * 2006-07-27 2008-06-18 安东石油技术（集团）有限公司 抽油泵柱塞的制造方法
CN112992826B (zh) * 2021-02-01 2025-10-03 日月光半导体制造股份有限公司 半导体结构及其制造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4822753A (en) * 1988-05-09 1989-04-18 Motorola, Inc. Method for making a w/tin contact

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4960732A (en) * 1987-02-19 1990-10-02 Advanced Micro Devices, Inc. Contact plug and interconnect employing a barrier lining and a backfilled conductor material
US5167760A (en) * 1989-11-14 1992-12-01 Intel Corporation Etchback process for tungsten contact/via filling
US5225372A (en) * 1990-12-24 1993-07-06 Motorola, Inc. Method of making a semiconductor device having an improved metallization structure
JPH04293233A (ja) * 1991-03-22 1992-10-16 Sony Corp メタルプラグの形成方法
JP3116432B2 (ja) * 1991-06-28 2000-12-11 ソニー株式会社 半導体装置の製造方法
JPH0530426A (ja) * 1991-07-25 1993-02-05 Matsushita Electric Ind Co Ltd 文字表示装置
JP2655213B2 (ja) * 1991-10-14 1997-09-17 三菱電機株式会社 半導体装置の配線接続構造およびその製造方法
JPH05166944A (ja) * 1991-12-19 1993-07-02 Sony Corp 半導体装置の配線形成方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4822753A (en) * 1988-05-09 1989-04-18 Motorola, Inc. Method for making a w/tin contact

Also Published As

Publication number Publication date
CN1135094A (zh) 1996-11-06
TW307021B (enExample) 1997-06-01
JPH08172058A (ja) 1996-07-02
KR100228565B1 (ko) 1999-11-01
US5893749A (en) 1999-04-13
JP2758841B2 (ja) 1998-05-28

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