CN107146759A - 一种基于离子注入掺杂的氧化铪铁电栅制备方法 - Google Patents
一种基于离子注入掺杂的氧化铪铁电栅制备方法 Download PDFInfo
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Abstract
本发明提供一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，先采用标准清洗工艺对P‑Si或者n‑Si基片进行清洗，以去除硅表面的颗粒及其它污染物，随后在硅片上沉积适当厚度的HfO2并进行退火处理；之后使用离子注入机对HfO2进行掺杂，然后对掺杂后的HfO2进行退火处理；在掺杂后的HfO2上即氧化铪铁电薄膜上沉积顶电极，然后再次对电极快速热处理；最后采用反应离子刻蚀方法将MFIS多层薄膜结构刻蚀成与源、漏和沟道尺寸相匹配MFIS阵列单元。本发明能精确控制HfO2铁电薄膜掺杂浓度，且制备相对简单，薄膜制备温度低的成熟操作工艺。
Description
技术领域
本发明属于微电子器件制造领域，尤其涉及一种晶体管型铁电存储器栅极制备方法。
背景技术
铁电存储器是一种具有高读写速度、宽工作温度、低功耗、高抗辐射能力、抗疲劳性能好的新型非挥发性存储器，近几十年来受到产研界广泛的关注，市场规模逐年稳步增长。铁电存储器是利用铁电材料电滞回线剩余极化双稳态性质对应二进制信息的“0-1”信号的原理实现数据存储。目前，主流的铁电存储器有1T1C型(1个晶体管和1个铁电电容)和1T型(1个铁电晶体管)。其中，1T结构铁电存储器由于铁电薄膜位于晶体管栅极区域，能够大大减小存储单元面积，提高铁电存储器的存储容量，因而是未来的一个主流发展方向。晶体管型铁电存储器研制的难点和关键在于铁电栅结构的制作，即栅电极/铁电层/缓冲层/衬底(MFIS)结构。以往，由于铁电存储器通常采用较厚的传统钙钛矿材料如锆钛酸铅(PZT)，钽酸锶铋(SBT)等，而此类材料与标准CMOS工艺兼容性差，且与硅衬底的界面匹配性差，缺陷较多，退极化场大，从而导致性能差。氧化铪(HfO2)是一种制备技术非常成熟的微电子器件介电材料，常用于45nm以下工艺节点的high-k栅层。自2012年德国NaMLab实验室发现掺杂的HfO2具有铁电性后，迅速掀起了基于氧化铪铁电薄膜的铁电存储器研制的热潮。截至目前，科研工作者研究了不同元素(如硅、锆、铝、钇等)等掺杂氧化铪铁电薄膜的性能，发现铁电氧化铪薄膜的剩余极化值能达到40μC/Km以上，薄膜厚度只需几十个纳米，且与硅工艺兼容性优异。
目前，铁电晶体管用氧化铪铁电薄膜的主要制备方法为原子层沉积(ALD)、溅射(Sputtering)以及化学溶液法(CSD)等。然而上述沉积技术工艺仍有如制备条件苛刻，薄膜制备工艺复杂等诸多不足。为获取精确掺杂、性能优异且制备工艺相对简单的氧化铪铁电薄膜，改进现有成熟的薄膜制备工艺是获得性能优异薄膜和铁电栅结构的方式之一。
目前，基于掺杂HfO2的MFIS结构铁电栅制备工艺还存在以下不足：
(1)目前制备氧化铪铁电薄膜主要采用CVD、ALD等沉积技术。该技术一般是将所需沉积材料的液态前驱体进行汽化从而沉积在基片上，对沸点高的沉积材料工艺温度要求较高，且对两种或两种以上材料沉积时，为使几种材料混合沉积均匀，对加热腔的温度及反应气体要求苛刻，且该化学反应过程一般会产生副产物，使沉积薄膜的性能难以控制。
(2)制备基于铁电氧化铪的MFIS结构铁电栅时，工艺步骤相对繁琐，对于I层和F层的制备，应用相同氧化物HfO2时，需要对HfO2经过两次热处理，甚至需要两种不同结晶形态，增加了实验成本以及工艺步骤。
基于以上问题，亟需一种运用一种新型的基于掺杂HfO2的MFIS结构铁电栅制备工艺。
发明内容
本发明的目的在于改善基于HfO2铁电薄膜的MFIS铁电栅制备工艺的不足，使用一种既能精确控制HfO2铁电薄膜掺杂浓度，且制备相对简单，薄膜制备温度低的成熟操作工艺。为实现上述发明目的，本发明采取以下的技术方案：一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，包括以下步骤：
1)先采用标准清洗工艺对P-Si或者n-Si基片进行清洗，以去除硅表面的颗粒及其它污染物，随后在硅片上沉积适当厚度的HfO2并进行退火处理；
2)使用离子注入机对HfO2进行掺杂，然后对掺杂后的HfO2进行退火处理；
3)在掺杂后的HfO2上即氧化铪铁电薄膜上沉积顶电极，然后再次对电极快速热处理；
4)采用反应离子刻蚀方法将MFIS多层薄膜结构刻蚀成与源、漏和沟道尺寸相匹配MFIS阵列单元。
上述HfO2厚度为10nm-30nm，注入杂质深度为5nm-20nm，杂质为锆(Zr)、钇(Y)、镧(La)、硅(Si)、铝(Al)、钆(Gd)和钕(Nd)等，顶电极为Pt、TiN或TaN，顶电极厚度为12nm-22nm。
优选地，选择氧化铪厚度22nm。
本发明选择HfO2厚度为22nm，既能达到减少与硅衬底的界面效应的目的，也能使离子注入杂质保留足够的厚度；在MFIS结构铁电栅的制备工艺过程中使用离子注入技术对氧化铪掺杂形成氧化铪铁电薄膜，不仅可以精确控制杂质浓度和浓度分布，也可以仅对栅极F和I层进行一次退火，简化栅极工艺过程。
作为上述技术进一步的改进，所述步骤1)氧化铪的厚度为22nm。
作为上述技术方案进一步的改进，所述氧化铪采用ALD、PLD、Sputter等方式得到。
作为上述技术方案进一步的改进，所述步骤2)，使用离子注入技术对氧化铪进行掺杂。掺杂元素可为锆(Zr)、钇(Y)、镧(La)、硅(Si)、铝(Al)、钆(Gd)和钕(Nd)等。作为上述技术方案进一步的改进，对氧化铪进行掺杂时，可以通过注入剂量、束流密度和加速电压控制注入离子分布。
作为上述技术方案进一步的改进，上述步骤3)对顶电极进行快速热处理，处理的温度为450℃，保持时间30s，以减少界面态密度，降低漏电流。
作为上述技术方案进一步的改进，上述步骤4)对MFIS薄膜进行等反应离子刻蚀。通过改变曝光能量，显影时间，前烘后烘温度等光刻参数，以及反应离子刻蚀机相关参数对其进行刻蚀，形成铁电栅阵列。
本发明的有益效果在于：本发明提供了一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，即通过离子注入技术对氧化铪进行可控掺杂从而获得氧化铪铁电薄膜，掺杂元素可以是Si、Zr、Y、Nd等，使用该工艺可使HfO2铁电薄膜性能可控，杂质浓度、深度精确控制，且，采用成熟工艺连续不间断地形成单一特征氧化铪薄膜，而后通过离子注入掺杂将其分解为缓冲层和铁电层，降低了铁电栅工艺难度，工艺过程相对简单。
附图说明
图1为基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺流程图
图2为MFIS结构的剖面图
具体实施方式
以下实例将结合具体附图对本发明进一步说明：
参见图1为基于离子注入掺杂HfO2的MFIS铁电栅制备工艺流程图。
1.取P-Si(100)用HF对其进行清洗，以去除表面的氧化硅；
2.使用ALD在硅片上生长22nm的HfO2作缓冲层；
3.用离子注入技术对氧化铪掺Zr，深度为11nm，随后在快速退火炉中将离子注入后的样品在氧气中进行退火，退火温度550℃，退火时间为30s；
4.采用CVD在HZO薄膜上镀15nm顶电极TiN，随后在氮气中进行退火处理，退火温度450℃。退火时间30s。
5.最后对MFIS薄膜结构进行等离子体刻蚀，使用氩等离子体、氯气等离子体，离子束入射角度60°，氩离子束密度0.7mA/cm2
本发明如图2为基于氧化铪铁电的MFIS结构的栅结构剖面图，其中(1)为金属顶电极TiN，(2)离子注入层铁电氧化铪HZO,(3)为缓冲层HfO2。
综上所述，以上仅为本发明的一例而已，离子注入技术可以注入不同的杂质、不同浓度的杂质，不同厚度的杂质，从而改变应用本工艺所制备的MFIS栅结构的性能，凡是依本发明权利要求书和说明书所作的等效修改，均属于本发明专利涵盖的范围内。
Claims (10)
1.一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：包括以下步骤：
1)先用标准清洗工艺对P-Si或者n-Si基片进行清洗，以去除硅表面的SiO2氧化物，随后在硅片上长一定厚度的HfO2；
2)离子注入对HfO2进行掺杂，然后对掺杂后的HfO2进行一次退火处理；
3)在HfO2铁电薄膜形成顶电极，然后对电极进行快速热处理。
4)对MFI层进行刻蚀形成铁电栅阵列。
2.如权利要求1所述一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：所述步骤1)HfO2由原子层沉积或磁控溅射得到，其厚度为10-30nm。
3.如权利要求1或者2所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：对HfO2进行退火处理，其退火参数包括：退火速率为28-35℃/s，退火温度为500-800℃，退火时间保持18min。离子注入后的氧化铪退火参数：退火温度500-700℃，退火时间15-60s。
4.如权利要求1所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：所述步骤2)离子注入的杂质元素为Zr、Y、Si、Nd、La等。
5.如权利要求1或4所述一种基于离子注入掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：对掺杂后的HfO2退火，退火操作在氧气中进行，退火参数包括：退火温度480-590℃，退火时间为15-30s。
6.如权利要求1所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：所述步骤3)顶电极使用金属Pt、TiN、TaN，其厚度为10-22nm，采用CVD或PVD沉积技术得到，然后对其退火。
7.如权利要求1或6所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：TiN电极退火在氮气中进行。
8.如权利要求1或6所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：顶电极退火参数包括：退火温度700-850℃。退火时间15-35s。
9.如权利要求1所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：所述步骤4)使用氩等离子体。
10.如权利要求1或9所述一种基于离子注入的掺杂HfO2的MFIS铁电栅制备工艺，其特征在于：等离子体刻蚀时，氩离子束的入射角度为40-85°，氩离子束密度为0.4-0.8mA/cm。
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108441831A (zh) * | 2018-03-01 | 2018-08-24 | 大连理工大学 | 一种钇掺杂二氧化铪铁电薄膜的制备方法 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080164582A1 (en) * | 2007-01-05 | 2008-07-10 | Shrinivas Govindarajan | Semiconductor devices and methods of manufacture thereof |
| US20100323509A1 (en) * | 2006-07-27 | 2010-12-23 | Sang-Min Shin | Nonvolatile semiconductor memory device and method of manufacturing the same |
| CN104471702A (zh) * | 2012-06-05 | 2015-03-25 | 独立行政法人产业技术综合研究所 | 半导体铁电存储晶体管及其制造方法 |
| CN106558481A (zh) * | 2015-09-24 | 2017-04-05 | 中国科学院微电子研究所 | 半导体器件制造方法 |
-
2017
- 2017-05-04 CN CN201710306626.9A patent/CN107146759B/zh active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100323509A1 (en) * | 2006-07-27 | 2010-12-23 | Sang-Min Shin | Nonvolatile semiconductor memory device and method of manufacturing the same |
| US20080164582A1 (en) * | 2007-01-05 | 2008-07-10 | Shrinivas Govindarajan | Semiconductor devices and methods of manufacture thereof |
| CN104471702A (zh) * | 2012-06-05 | 2015-03-25 | 独立行政法人产业技术综合研究所 | 半导体铁电存储晶体管及其制造方法 |
| CN106558481A (zh) * | 2015-09-24 | 2017-04-05 | 中国科学院微电子研究所 | 半导体器件制造方法 |
Cited By (11)
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| CN108441830A (zh) * | 2018-03-01 | 2018-08-24 | 大连理工大学 | 一种采用反应磁控溅射制备二氧化铪基铁电薄膜的方法 |
| CN113948520A (zh) * | 2019-03-26 | 2022-01-18 | 湘潭大学 | 一种氧化铪基铁电电容及其制备方法 |
| US20210036024A1 (en) * | 2019-07-31 | 2021-02-04 | Samsung Electronics Co., Ltd. | Semiconductor device including ferroelectric material, neuromorphic circuit including the semiconductor device, and neuromorphic computing apparatus including the neuromorphic circuit |
| US11887989B2 (en) * | 2019-07-31 | 2024-01-30 | Samsung Electronics Co., Ltd. | Semiconductor device including ferroelectric material, neuromorphic circuit including the semiconductor device, and neuromorphic computing apparatus including the neuromorphic circuit |
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