JP7015011B2 - 強誘電性誘電材料の多段階堆積 - Google Patents
強誘電性誘電材料の多段階堆積 Download PDFInfo
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- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
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- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/56—Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
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Description
Claims (10)
- 強誘電性キャパシタを含む集積回路を製造する方法であって、
ボディの半導体表面の上に第1の導電膜を堆積することと、
有機金属化学気相成長によって前記第1の導電膜の上に強誘電性材料を堆積することであって、
前記ボディを含むチャンバを640℃を下回る第1のサセプタ温度に加熱することと、
第1の持続時間の間に前記第1のサセプタ温度で、鉛とジルコニウムとチタニウムとの前駆体と、溶剤とを第1の集合的流速で、及び酸化ガスを前記ボディを含むチャンバ内に導入することと、
その後、第2の持続時間の間に前記第1のサセプタ温度より高い第2のサセプタ温度で、鉛とジルコニウムとチタニウムとの前記前駆体と、溶剤とを前記第1の集合的流速より速い第2の集合的流速で、及び酸化ガスを前記チャンバ内に導入することと、
を含む、前記堆積することと、
前記強誘電性材料に重なる第2の導電膜を堆積することと、
前記強誘電性キャパシタを画定するように、選択された位置で、前記第1及び第2の導電膜と前記強誘電性材料との一部を除去することと、
を含む、方法。 - 請求項1に記載の方法であって、
前記第1の集合的流速が1.1ml/分であるか又はそれを下回る、方法。 - 請求項2に記載の方法であって、
前記第2の集合的流速が1.1ml/分を上回る、方法。 - 請求項3に記載の方法であって、
前記第2の集合的流速が1.5ml/分から2.5ml/分までの範囲である、方法。 - 請求項1に記載の方法であって、
前記第1の持続時間の間の前駆体の導入が、ジルコニウム前駆体とチタニウム前駆体との合計に対する鉛前駆体の第1のフロー比で行われ、
前記第2の持続時間の間の前駆体の導入が、前記第1のフロー比より高い、ジルコニウム前駆体とチタニウム前駆体との合計に対する鉛前駆体の第2のフロー比で行われる、方法。 - 請求項1に記載の方法であって、
前記第1の持続時間の間に導入される前記酸化ガスが第1の濃度の酸素を含み、
前記第2の持続時間の間に導入される前記酸化ガスが前記第1の濃度より高い第2の濃度の酸素を含む、方法。 - 請求項1に記載の方法であって、
前記第1のサセプタ温度が635℃である、方法。 - 請求項7に記載の方法であって、
前記第1の持続時間の間に前駆体と溶剤とをチャンバ内に導入することの後に、前記チャンバの温度を645℃のサセプタ温度に上昇させることを更に含む、方法。 - 請求項7に記載の方法であって、
前記第1の持続時間の間に前記前駆体を導入することの後に、前記チャンバにおける温度を640℃を上回るサセプタ温度まで上昇させることを更に含む、方法。 - 請求項1に記載の方法であって、
前記第1の集合的流速で堆積された強誘電性材料と前記第2の集合的流速で堆積された強誘電性材料とが異なる物理的属性を有する、方法。
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US201361763001P | 2013-02-11 | 2013-02-11 | |
US61/763,001 | 2013-02-11 | ||
US14/169,120 US8962350B2 (en) | 2013-02-11 | 2014-01-30 | Multi-step deposition of ferroelectric dielectric material |
US14/169,120 | 2014-01-30 |
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JP7015011B2 true JP7015011B2 (ja) | 2022-02-02 |
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JP2020055312A Active JP7015011B2 (ja) | 2013-02-11 | 2020-03-26 | 強誘電性誘電材料の多段階堆積 |
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Families Citing this family (5)
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US20160086960A1 (en) * | 2014-09-22 | 2016-03-24 | Texas Instruments Incorporated | Low-Temperature Passivation of Ferroelectric Integrated Circuits for Enhanced Polarization Performance |
WO2016079801A1 (ja) * | 2014-11-18 | 2016-05-26 | 三菱電機株式会社 | 空気調和装置 |
DE102018105953B4 (de) | 2017-10-30 | 2023-09-21 | Taiwan Semiconductor Manufacturing Co. Ltd. | Halbleiter-bauelement und verfahren zu dessen herstellung |
WO2019093471A1 (ja) * | 2017-11-13 | 2019-05-16 | アドバンストマテリアルテクノロジーズ株式会社 | 膜構造体及びその製造方法 |
KR20210155812A (ko) * | 2019-05-31 | 2021-12-23 | 어플라이드 머티어리얼스, 인코포레이티드 | 기판들 상에 막들을 형성하기 위한 방법들 및 시스템들 |
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WO2014124413A1 (en) | 2014-08-14 |
JP2016515162A (ja) | 2016-05-26 |
JP6719905B2 (ja) | 2020-07-08 |
JP2020123729A (ja) | 2020-08-13 |
US20140225226A1 (en) | 2014-08-14 |
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