CN107066003A - Low-power-consumptioreference reference voltage source - Google Patents

Low-power-consumptioreference reference voltage source Download PDF

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Publication number
CN107066003A
CN107066003A CN201611253412.1A CN201611253412A CN107066003A CN 107066003 A CN107066003 A CN 107066003A CN 201611253412 A CN201611253412 A CN 201611253412A CN 107066003 A CN107066003 A CN 107066003A
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reference voltage
source
transistor
grid
power
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CN201611253412.1A
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Inventor
杨赟秀
余丽波
姚志健
李坚
袁菲
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South West Institute of Technical Physics
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South West Institute of Technical Physics
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Priority to CN201611253412.1A priority Critical patent/CN107066003A/en
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters

Abstract

A kind of Low-power-consumptioreference reference voltage source proposed by the present invention, it is desirable to provide a kind of circuit structure is simple, and output reference voltage is adjustable, the reference voltage source with higher temperature stability.The technical scheme is that：In the main branch containing reference voltage generating circuit and bias current generating circuit composition, nmos fet MN2 is grounded between source electrode and PMOS transistor MP4 source electrodes and is electrically connected with feedback branch, the feedback branch is by enhanced nmos fet M5 in sequential series, divider resistance R1 and resistance R2 is constituted, wherein, MN5 grids electrically connect MP4 drain electrode, MN2 grid end is connected between divider resistance R1 and resistance R2, enhanced nmos pass transistor MN2 threshold voltage and depletion type nmos transistor MN1 threshold voltages are carried out by linear superposition by MP4, it is superimposed upon MN2 grid, obtain the reference voltage V exported from MN5 source electrodesREF。

Description

Low-power-consumptioreference reference voltage source
Technical field
The present invention relates to a kind of Analogous Integrated Electronic Circuits technical field, it is mainly used in simulation and turns with digital quantizer, power In the circuits such as parallel operation, power amplifier, the supply voltage with Low-voltage Low-power characteristic is less than 2.5V, and maximum consumption electric current is small In 1 μ A reference voltage source.
Background technology
Reference voltage source is the particularly important part of contemporary Analogous Integrated Electronic Circuits, can for serial voltage regulation circuit, The systems such as ADC and DAC provide a voltage reference not changed with temperature and supply voltage.In traditional design, Zener is utilized The Zener breakdown characteristic of diode can a reference source of the construction work near breakdown voltage, but there is that noise is big, Yi Shougong The shortcomings of skill influences.To maintain Zener breakdown, Zener diode needs larger quiescent current, limits it low in low-voltage Application in power digital circuit.Band gap reference is the reference voltage source being most widely used at present.Band gap reference utilizes three poles Pipe VBEThe negative temperature coefficient of knot is superimposed the V of different current densitiesBEVoltage difference, the reference voltage not varied with temperature.But band gap The output voltage of a reference source is generally 1.2V, is not suitable for being applied to low-voltage (VDD<1V) in circuit, and its power consumption is in ultralow work( Also it is difficult to further reduction in consumption application.
Under the conditions of CMOS technology, using the different temperature coefficients of the enhanced threshold voltage with depletion type NMOS, structure Build reference voltage source circuit.As shown in figure 4, ME1 is enhanced NMOS, MD1 is depletion type NMOS, and the two has identical electricity Stream.And MD1 grid link together with source.ME1 and MD1 electric current can be expressed as：
And ME1 gate source voltage, i.e. reference voltage VREF, can by ME1 current formula Solution is obtained：
WhereinWherein, VT,ME1For enhanced pipe threshold value Voltage, VT,MD1For the threshold voltage of depletion type pipe.Because the enhanced temperature coefficient with depletion type NMOS threshold voltages is Negative, and | VT,MD1| temperature coefficient be positive number, so regulation MD1 and ME1 the ratio between breadth length ratio, can cause MD1's and ME1 The temperature coefficient of threshold voltage is cancelled out each other, so as to obtain the output voltage V of zero-temperature coefficientREF.It is this to utilize enhanced, consumption The reference voltage source of type metal-oxide-semiconductor threshold voltage temperature characterisitic design to the greatest extent is referred to as E/D reference voltage sources.Compared to traditional bandgap benchmark Source, E/D reference voltage sources have big advantage.First, E/D reference voltage sources have low-down power consumption, and whole circuit is only There is a current path, in the absence of extra power consumption；Secondly, E/D reference voltage sources can be operated under lower operating voltage, overall The minimum power supply voltage, of circuit is VGS,ME1+VOV,MD1, it is significantly smaller than traditional bandgap reference voltage source circuit；Finally, E/D benchmark electricity Potential source does not need start-up circuit, enormously simplify complexity in circuits.However, the E/D structure reference voltage sources of classical architecture There is shortcoming：The reference voltage mainly exported is unadjustable.In VREFIn expression formula, it can be seen that VREFIt is attached in threshold voltage Closely.In large-scale production, regulation k is not only needed so that temperature coefficient is minimum, and needs regulation final output voltage, is obtained Expected magnitude of voltage.And original circuit structure adjustable parameter is very few, application during scale of mass production is limited.
The content of the invention
The purpose of the present invention is that the weak point existed for above-mentioned prior art is simple there is provided a kind of circuit structure, defeated Go out reference voltage adjustable, with higher temperature stability, the Low-power-consumptioreference reference voltage source based on NMOS threshold differences.
The present invention above-mentioned purpose can be reached by following measures, a kind of Low-power-consumptioreference reference voltage source, including：Benchmark The main branch that voltage generation circuit and bias current generating circuit are constituted, it is characterised in that：In the NMOS crystal of the main branch Pipe MN2 is grounded between source electrode and PMOS transistor MP4 source electrodes and is electrically connected with feedback branch, and the feedback branch is by increasing in sequential series Strong type nmos pass transistor MN5, divider resistance R1 and resistance R2 are constituted, wherein, MN5 grids electrically connect MP4 drain electrode, MN2 grid End is connected between divider resistance R1 and resistance R2, by MP4 by enhanced nmos pass transistor MN2 threshold voltage and depletion type Nmos pass transistor MN1 threshold voltages carry out linear superposition, are superimposed upon MN2 grid, obtain the reference voltage exported from MN5 source electrodes VREF。
The present invention has the advantages that compared to prior art：
Circuit structure is compact, it is easy to integrated.The present invention is added in the main branch for producing reference voltage enables reference voltage The feedback branch enough stablized, circuit structure is simple, for traditional bandgap benchmark, transistor pole used in this circuit structure It is few.
Output reference voltage is adjustable.The present invention can adjust output with reference to electricity simply by the ratio changed between resistance Size is pressed, the adjustment of reference voltage has greater flexibility, and after manufacturing can also be by divider resistance R1 and R2 Trim reset output reference voltage size, well adapted to the work requirements under without application scenario.Simultaneously Because divider resistance R1 and R2 addition enable output voltage to be applied in volume production by accomplishing to trimming for R1, R2 Without application.
Higher temperature stability.Threshold voltage and enhancing of the reference voltage of last gained of the invention by depletion type NMOS tube The threshold voltage of type NMOS tube carries out linear superposition, can be dropped as adjusting the temperature coefficient of superposition coefficient VREF voltages by obtained by To minimum, make it that there is good homogeneity within the scope of larger temperature.
Brief description of the drawings
Fig. 1 is the circuit theory schematic diagram in the Low-power-consumptioreference reference voltage source of the present invention.
Fig. 2 is circuit output reference voltage temperature characterisitic proof diagram of the present invention.
Fig. 3 circuit output reference voltage power supply rejection ratio characteristics proof diagrams of the present invention.
Fig. 4 is the classical E/D reference voltage source circuit figures of prior art.
Embodiment
The present invention is described in further detail with specific embodiment below in conjunction with the accompanying drawings.
Refering to Fig. 1.In embodiment described below, Low-power-consumptioreference reference voltage source, including：Reference voltage generating circuit and Main branch and make the stable feedback branch of reference voltage that bias current generating circuit is constituted.The feedback branch is connected electrically in master Between the nmos pass transistor MN2 ground connection source electrodes and PMOS transistor MP4 source electrodes of branch road.Feedback branch is by sequential series enhanced Nmos pass transistor MN5, divider resistance R1 and resistance R2 are constituted, wherein, MN5 grids electrically connect MP4 drain electrode, and MN2 grid end connects It is connected between divider resistance R1 and resistance R2, by MP4 by enhanced nmos pass transistor MN2 threshold voltage and depletion type NMOS Transistor MN1 threshold voltages carry out linear superposition, are superimposed upon MN2 grid, superposition coefficient by enhanced nmos pass transistor MN2 and The image ratio for the current mirror that the ratio between the channel width of depletion type nmos transistor and channel length and MP3 and MP4 are formed is determined It is fixed.
Reference voltage generating circuit includes, depletion type nmos transistor MN1 that grid end and source are shorted together, enhanced Nmos pass transistor MN2, diode type of attachment enhanced PMOS transistor MP3 and MP4, wherein, MN1 grid end and MN2 sources Hold short circuit on ground level, MP3 grid ends series connection MP4 grid end formation current mirrors, MN1 drain terminal connection MP3 drain terminal simultaneously passes through MP3 Drain terminal contact parallel connection MP3 grid ends and MP4 grid ends between connect on contact, MN2 drain terminal is connected MP4 drain terminal, MP4 source Termination power VDD formation reference voltage generating circuits.MP4 drain terminal connects MN5 grid end, and MN2 source ground connection, grid end is connected on Between divider resistance R1 and R2, divider resistance R2 one end is by MN2 source grounds, and the other end is connect point by MN2 gate series Piezoresistance R1, the R1 other end be connected MN5 source as reference voltage source circuit VREFOutput end, MN5 drain terminal meets VDD.
N-type mosfet transistor MN2 drain-source currentsWherein, μnFor electron mobility, COX For the unit-area capacitance value of gate oxide, W/L is the channel width-over-length ratio of transistor, VGSFor pressure difference, V between transistor gate sourceT For the threshold voltage of transistor.Because depletion type nmos transistor MN1 grid and source electrode are connected on ground potential GND simultaneously, therefore, Depletion type nmos transistor MN1 drain current can be tried to achieve：Wherein, ID1It is brilliant for depletion type NMOS Body pipe MN1 drain-source current, μDFor depletion type nmos transistor MN1 electron mobility, COXFor the unit area of gate oxide Capacitance, W1/L1For depletion type nmos transistor MN1 channel width-over-length ratio, VTDFor depletion type nmos transistor MN1 threshold value electricity Pressure.
PMOS transistor MP3 grid leak short circuit is connected with MP4 grid, and its drain electrode connects depletion type NMOS tube MN1's respectively Drain electrode and enhanced NMOS tube MN2 drain electrode composition current mirror, make enhanced NMOS tube MN2 drain current ID2With depletion type The drain current I of NMOS tubeD1Equal or multiple proportion.
If ID2=mID1, thenWherein m is PMOS MP4 and MP3 number in parallel The ratio between.Tried to achieve by the voltage-current characteristic of N-type MOS transistor：
Wherein k1、k2For MN1 and MN2 breadth length ratio, VGS2Poor, the V for enhanced NMOS tube MN2 grid and source electrode both end voltageTE For enhanced NMOS tube MN2 threshold voltage, VTDFor depletion type NMOS tube MN1 threshold voltage, μEFor enhanced NMOS crystal Pipe MN2 electron mobility, μDFor depletion type nmos transistor MN1 electron mobility.
Voltage VGS2Exported after the output stage partial pressure being made up of divider resistance R1, R2 of series connection, i.e. output reference voltage source Voltage VREF.Therefore, VREFReference voltage expression formula be：Wherein VREFFor output Reference voltage value, R1 and R2 are respectively resistance R1 and R2 resistance value.
Can be drawn by the above-mentioned derivation to output reference voltage expression formula, by depletion type NMOS tube MN1 with it is enhanced The linear relationship of NMOS tube MN2 drain current, it is enhanced to obtain the designed circuit output reference voltage of the last present invention NMOS tube MN2 and depletion type nmos transistor MN1 threshold voltages linear combination.
N-type MOSFET threshold voltage expression formula is：
Wherein VTFor threshold voltage, QOXFor silica The interior fixed positive charge density against interface, COXFor the capacitance of gate oxide unit area, ε is dielectric constant, and q is electronics electricity Amount, NATo mix the concentration of acceptor, VBSFor NMOS tube substrate and the potential difference of source, ΦMSIt is metal-semiconductor work function, ΦFpIt is the fermi potential of Semiconductor substrate.Within the scope of very wide temperature, QOXIt is temperature independent, ΦMSAlso it is temperature independent, then Above formula can be obtained to temperature differential.By carrying out seeking the local derviation of temperature to threshold voltage, it can obtain between threshold voltage temperature Relation：
Obtain final expression formula For：
Due to usual NCNV>>NA 2, so N-channel MOS FET starting voltages VTTemperature coefficient be negative value, i.e., with temperature Rise, VTMoved to negative direction, when foreign substrate biases VBSAfterwards, due to VBS<0, V will be madeTTemperature coefficient absolute value reduce. It is demonstrated experimentally that in the range of -55~125 DEG C, VTLinear with temperature T, the result of above formula meets fairly good.
Enhanced threshold voltage and temperature with depletion type nmos transistor is all linear relationship, and enhanced and depletion type NMOS The threshold voltage temperature coefficient of transistor is all negative value.So resulting reference voltage VREFIts temperature coefficient can be achieved intimate Equal to 0.It is a constant by the derivative of NMOS tube threshold voltage on temperature, its relation can be expressed as： Wherein, KTFor the temperature coefficient of NMOS threshold voltages, and KT<0, T is absolute temperature, T0For measurement KTWhen absolute temperature.Cause This, reference voltage VREFIt is to the derivative expressions of temperature：
Wherein KTEFor the temperature coefficient of enhanced NMOS tube MN2 threshold voltages, KTDFor depletion type NMOS tube MN1 threshold voltages Temperature coefficient.
Reference voltage to obtain high-temperature stability, then0 need to be set to, i.e.,：It is logical The ratio for the breadth length ratio that adjustment transistor MN1, MN2 are set is crossed, and adjusts transistor MP3, MP4 of composition current mirror breadth length ratio Ratio, to change the multiple proportion of the terminal circuit of current mirror two, it is possible to obtain the reference voltage of zero-temperature coefficient.
Comprehensive VREFExpression formula and MN1, MN2 temperature characterisitic relation can be obtained：
Reference voltageIn reference voltage VREFIn expression formula, KTE、KTD、VTE、VTDDetermine It is decided by resistance R1 and R2 ratio in the value of manufacturing process used, therefore output reference voltage, and this ratio is not by other The limitation of condition, allows output reference voltage freely to be set interior in a big way by changing divider resistance R1 and R2 ratio It is fixed.Therefore, it can according to different system, the parameter request of different circuits and change parameter and obtain different reference voltage levels.
Because when acceptor impurity doping concentration is smaller, the change that electron mobility changes with impurity concentration is not obvious, Therefore in analyzing and calculate more than, the ratio μ of electron mobility in enhanced NMOS and depletion type NMOSE/μDApproximately on behalf of 1.But Due to ratio μE/μDElectron mobility μ in slightly deviation and 1, and when temperature is higher, enhanced NMOS and depletion type NMOSEWith μDDifferent variation tendencies are presented because of the difference of doping concentration, reference voltage is varied with temperature and deviation theory value.Cause This adds the feedback loop of MN5, R1 and R2 composition to stablize output reference voltage V in the designREF。
Reference voltage VREFNegative feedback process is as follows：When the temperature is changed, if MN2 grid and source electrode both end voltage VGS2Rise Height, passes through resistance R1, R2 partial pressure, reference voltage VREFIncrease, and flow through MN2 drain current ID=VGS2/ R2 also with Rise, transistor MN5 gate source voltage VGS5Increase therewith, therefore MN5 grid potentials are increased, i.e. transistor MN2 drain electrode Current potential is raised, transistor MN2 drain potential and MN2 grid potential opposite in phase, so VGS2Reduce therewith.
Because the presence of feedback loop, the reference voltage of reference voltage source circuit reality output analyzes smaller than open loop, And because of the presence of feedback loop, when two resistance ratio R1/R2 are identical, output voltage has difference slightly.Because logical Feedback analysis is crossed, resistance R1, R2 resistance is bigger, and feedback factor is smaller, closed-loop gainVisual feedback coefficient Smaller, closed-loop gain is bigger, and the reference voltage of output is also bigger.Pass through analysis, it is known that when ratio R 1/R2 is true between resistance Regularly, by adjusting the R1 and R2 fine-tuning output reference voltage V of ratioREFMagnitude of voltage, while the temperature of reference voltage can be changed Coefficient is spent, to reach optimal temperature stability.
The design is based on 0.5 μm of E/D NMOS technique and carries out design of Simulation, by setup parameter by output reference voltage value 2.08V is arranged on, its temperature characterisitic and PSRR are checked using HSpice emulation.If Fig. 2 is the output obtained by the present invention Reference voltage variation with temperature curve, can therefrom draw the temperature drift characteristic of output reference voltage, and carrying out analysis to Fig. 2 can Know, the temperature coefficient of present invention gained reference voltage is 12ppm/ DEG C.
Such as Fig. 3 it is the output reference voltage obtained by the present invention to the suppression situation of power supply noise, the analysis to Fig. 3 can be obtained The PSRR for going out the reference voltage of institute of the invention is 47dB.

Claims (10)

1. a kind of Low-power-consumptioreference reference voltage source, including：The main branch that reference voltage generating circuit and bias current generating circuit are constituted Road, it is characterised in that：It is grounded between source electrode and PMOS transistor MP4 source electrodes and is electrically connected in the nmos pass transistor MN2 of the main branch Feedback branch is connected to, the feedback branch is by enhanced nmos pass transistor MN5, divider resistance R1 and resistance R2 structures in sequential series Into, wherein, transistor MN5 grids electrically connect MP4 drain electrode, and enhanced nmos pass transistor MN2 grid end is connected to divider resistance Between R1 and resistance R2, PMOS transistor MP4 is by enhanced nmos pass transistor MN2 threshold voltage and depletion type nmos transistor MN1 threshold voltages carry out linear superposition, are superimposed upon MN2 grid, obtain the reference voltage V exported from MN5 source electrodesREF。
2. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：Enhanced nmos pass transistor MN2 grids are obtained The threshold voltage arrived is superimposed channel width and ditch of the coefficient by enhanced nmos pass transistor MN2 and depletion type nmos transistor MN1 Road length ratio, and the image ratio of current mirror that MP3 and MP4 are formed are determined.
3. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：Reference voltage generating circuit includes, grid end The depletion type nmos transistor MN1 that is shorted together with source, enhanced nmos pass transistor MN2, the increasing of diode type of attachment Strong type PMOS transistor MP3 and MP4, MP3, wherein, MN1 grid end and MN2 sources short circuit is on ground level, and MP3 grid ends are connected MP4 grid ends formation current mirror, MN1 drain terminal connection MP3 drain terminal and drain terminal contact parallel connection MP3 grid ends and MP4 grid by MP3 On series connection contact between end, MN2 drain terminal series connection MP4 drain terminal, MP4 source connects power vd D-shaped and produced into reference voltage Circuit.
4. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：MP4 drain terminal connects MN5 grid end, MN2 Source ground connection, grid end is connected between divider resistance R1 and R2, and divider resistance R2 one end is led to by MN2 source grounds, the other end Cross MN2 gate series connect divider resistance R1, R1 the other end be connected MN5 source as reference voltage source circuit VREFIt is defeated Go out end, MN5 drain terminal meets VDD.
5. Low-power-consumptioreference reference voltage source as claimed in claim 2, it is characterised in that：PMOS transistor MP3 grid leak short circuit with MP4 grid is connected, and its drain connection depletion type NMOS tube MN1 drain electrode respectively and enhanced NMOS tube MN2 drain electrode are constituted Current mirror, makes enhanced NMOS tube MN2 drain current ID2With the drain current I of depletion type NMOS tubeD1Equal or multiple is closed System.
6. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：MN1 grid and source electrode is connected on ground simultaneously Current potential GND, depletion type nmos transistor MN1 drain current is：Wherein, μDFor depletion type NMOS Transistor MN1 electron mobility, COXFor the unit-area capacitance value of gate oxide, W1/L1For depletion type nmos transistor MN1 Channel width-over-length ratio, VTDFor depletion type nmos transistor MN1 threshold voltage.
7. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that N-type mosfet transistor MN2 drain-source currentsWherein, μnFor electron mobility, COXFor the unit-area capacitance value of gate oxide, W/L is crystalline substance The channel width-over-length ratio of body pipe, VGSFor pressure difference and V between transistor gate sourceTFor the threshold voltage of transistor.
8. Low-power-consumptioreference reference voltage source as claimed in claim 7, it is characterised in that：N-type mosfet transistor MN2 threshold value electricity Pressure expression formula be：Wherein VTFor threshold voltage, QOXFor The fixed positive charge density at interface, C are abutted in silicaOXFor the capacitance of gate oxide unit area, ε is dielectric constant, q For electron charge, NATo mix the concentration of acceptor, VBSFor NMOS tube substrate and the potential difference of source, ΦMSIt is metal-semiconductor work( Function, ΦFpIt is the fermi potential of Semiconductor substrate.
9. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：Electricity in enhanced NMOS and depletion type NMOS The ratio μ of transport factorE/μDIt is approximately 1, and it is defeated to stablize to add the feedback loop of MN5, R1 and R2 composition in the design Go out reference voltage.
10. Low-power-consumptioreference reference voltage source as claimed in claim 1, it is characterised in that：Described reference voltage VREFFor,Wherein, R1 and R2 are respectively resistance R1 and R2 resistance value, and m is PMOS MP4 The ratio between with MP3 number in parallel, k1、k2For MN1 and MN2 breadth length ratio, VTEFor the threshold voltage of enhanced nmos pass transistor, VTDFor The threshold voltage of depletion type nmos transistor.
CN201611253412.1A 2016-12-30 2016-12-30 Low-power-consumptioreference reference voltage source Pending CN107066003A (en)

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Cited By (10)

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CN107544602A (en) * 2017-09-29 2018-01-05 湖南国科微电子股份有限公司 Voltage modulator and analog circuit, digital system circuit
CN107831816A (en) * 2017-09-29 2018-03-23 上海华虹宏力半导体制造有限公司 Internal electric source generation circuit in reference current generating circuit
CN110274703A (en) * 2019-07-12 2019-09-24 广州芯世物科技有限公司 A kind of the CMOS temperature-sensitive circuit and temperature sensor of high sensitivity
CN112349333A (en) * 2020-11-25 2021-02-09 长江存储科技有限责任公司 CMOS circuit of memory
CN112462835A (en) * 2020-11-04 2021-03-09 昂维格(厦门)科技有限公司 Low-voltage linear voltage stabilizer
CN113541482A (en) * 2020-04-21 2021-10-22 圣邦微电子（北京）股份有限公司 Linear regulator and power supply device
CN114815954A (en) * 2022-04-20 2022-07-29 西安电子科技大学 Zero current loss single tube gate control circuit of preliminary voltage stabilization
CN115112941A (en) * 2022-08-24 2022-09-27 芯昇科技有限公司 Voltage detection circuit
CN116054797A (en) * 2022-12-28 2023-05-02 无锡迈尔斯通集成电路有限公司 Low-power-consumption reset circuit with voltage return difference
CN117170454A (en) * 2023-10-23 2023-12-05 天津智芯半导体科技有限公司 Reference voltage circuit, power management chip and electrical equipment

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Cited By (14)

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Publication number Priority date Publication date Assignee Title
CN107831816A (en) * 2017-09-29 2018-03-23 上海华虹宏力半导体制造有限公司 Internal electric source generation circuit in reference current generating circuit
CN107544602A (en) * 2017-09-29 2018-01-05 湖南国科微电子股份有限公司 Voltage modulator and analog circuit, digital system circuit
CN110274703A (en) * 2019-07-12 2019-09-24 广州芯世物科技有限公司 A kind of the CMOS temperature-sensitive circuit and temperature sensor of high sensitivity
CN113541482B (en) * 2020-04-21 2022-10-14 圣邦微电子（北京）股份有限公司 Linear regulator and power supply device
CN113541482A (en) * 2020-04-21 2021-10-22 圣邦微电子（北京）股份有限公司 Linear regulator and power supply device
CN112462835A (en) * 2020-11-04 2021-03-09 昂维格(厦门)科技有限公司 Low-voltage linear voltage stabilizer
CN112349333A (en) * 2020-11-25 2021-02-09 长江存储科技有限责任公司 CMOS circuit of memory
CN114815954A (en) * 2022-04-20 2022-07-29 西安电子科技大学 Zero current loss single tube gate control circuit of preliminary voltage stabilization
CN114815954B (en) * 2022-04-20 2023-02-24 西安电子科技大学 Pre-stabilized zero-current-loss single-tube grid control circuit
CN115112941A (en) * 2022-08-24 2022-09-27 芯昇科技有限公司 Voltage detection circuit
CN115112941B (en) * 2022-08-24 2023-01-03 芯昇科技有限公司 Voltage detection circuit
CN116054797A (en) * 2022-12-28 2023-05-02 无锡迈尔斯通集成电路有限公司 Low-power-consumption reset circuit with voltage return difference
CN117170454A (en) * 2023-10-23 2023-12-05 天津智芯半导体科技有限公司 Reference voltage circuit, power management chip and electrical equipment
CN117170454B (en) * 2023-10-23 2024-01-16 天津智芯半导体科技有限公司 Reference voltage circuit, power management chip and electrical equipment

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Application publication date: 20170818