CN107038109A - Interruption delay method of testing and device based on MIPS frameworks - Google Patents

Interruption delay method of testing and device based on MIPS frameworks Download PDF

Info

Publication number
CN107038109A
CN107038109A CN201610077709.0A CN201610077709A CN107038109A CN 107038109 A CN107038109 A CN 107038109A CN 201610077709 A CN201610077709 A CN 201610077709A CN 107038109 A CN107038109 A CN 107038109A
Authority
CN
China
Prior art keywords
interruption
high precision
time stamp
precision clock
timestamp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201610077709.0A
Other languages
Chinese (zh)
Other versions
CN107038109B (en
Inventor
王洪虎
胡佳林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Loongson Technology Corp Ltd
Original Assignee
Loongson Technology Corp Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Loongson Technology Corp Ltd filed Critical Loongson Technology Corp Ltd
Priority to CN201610077709.0A priority Critical patent/CN107038109B/en
Publication of CN107038109A publication Critical patent/CN107038109A/en
Application granted granted Critical
Publication of CN107038109B publication Critical patent/CN107038109B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3604Software analysis for verifying properties of programs
    • G06F11/3612Software analysis for verifying properties of programs by runtime analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention provides a kind of interruption delay method of testing and device based on MIPS frameworks, be related to interruption delay technical field, solve in the prior art in Vxworks systems carry out interruption delay test it is not convenient enough, be difficult implement the problem of.The interruption delay method of testing based on MIPS frameworks is applied to Vxworks systems, including:The high precision clock that the MIPS frameworks are carried is enabled in the Vxworks systems, the frequency of the high precision clock is obtained;The current time stamp when Vxworks systems enable interruption is obtained using the high precision clock, is stabbed as the very first time;The current time stamp when Vxworks systems produce the interruption is obtained using the high precision clock, the second timestamp is used as;According to the frequency of very first time stamp, second timestamp and the high precision clock, interruption delay is calculated.The embodiment of the present invention VxWorks system suitable for carrying out the interruption delay test based on MIPS frameworks.

Description

Interruption delay method of testing and device based on MIPS frameworks
Technical field
Surveyed the present invention relates to interruption delay technical field, more particularly to a kind of interruption delay based on MIPS frameworks Method for testing and device.
Background technology
It is to have very much side for the real-time performance for understanding an operating system to the browsing real-time data of operating system Help, especially in the higher embedded OS of the requirement of real-time to system.For example, Vxworks As a kind of embedded real-time operating system, the requirement of system real time is generally met by the way of interrupting. At present, in Vxworks systems, for the test of interruption delay, usually using in enable in a program It is disconnected, then by the method for software combination hardware, surveyed using the hardware testing equipment of the auxiliary such as logic analyser Examination enables the time for interrupting and arriving and entering and interrupt, and finally determines interruption delay.
During the present invention is realized, inventor has found at least there is following technical problem in the prior art:
In Vxworks systems, test interruption delay needs to use the hardware testing of the auxiliary such as logic analyser Equipment, if tester does not have hardware testing equipment at one's side, then the test for interruption delay just can not Go on, the method for testing is not convenient enough, be difficult to implement.
The content of the invention
The interruption delay method of testing and device based on MIPS frameworks that the present invention is provided, can be in Vxworks The interruption delay test based on MIPS frameworks is easily realized in system, it is easy to implement.
In a first aspect, the present invention provides a kind of interruption delay method of testing based on MIPS frameworks, it is applied to Vxworks systems, including:
The high precision clock that the MIPS frameworks are carried is enabled in the Vxworks systems, obtains described The frequency of high precision clock;
The current time stamp when Vxworks systems enable interruption is obtained using the high precision clock, is made Stabbed for the very first time;
The current time stamp when Vxworks systems produce the interruption is obtained using the high precision clock, It is used as the second timestamp;
According to the frequency of very first time stamp, second timestamp and the high precision clock, calculate Interruption delay.
Second aspect, the present invention provides a kind of interruption delay test device based on MIPS frameworks, is applied to Vxworks systems, including:
Enabling unit, for enabling the high accuracy that the MIPS frameworks are carried in the Vxworks systems Clock, obtains the frequency of the high precision clock;
First acquisition unit, interruption is enabled for obtaining the Vxworks systems using the high precision clock When current time stamp, stabbed as the very first time;
Second acquisition unit, it is described for obtaining the Vxworks systems generation using the high precision clock Current time stamp during interruption, is used as the second timestamp;
Computing unit, for according to the very first time stamp, second timestamp and it is described high-precision when The frequency of clock, calculates interruption delay.
Interruption delay method of testing and device provided in an embodiment of the present invention based on MIPS frameworks, The high precision clock that the MIPS frameworks are carried is enabled in Vxworks systems, the high precision clock is obtained Frequency, the current time stamp when Vxworks systems enable interruption is obtained using the high precision clock, Stabbed as the very first time, when obtaining the Vxworks systems generation interruption using the high precision clock Current time stamp, as the second timestamp, according to very first time stamp, second timestamp and The frequency of the high precision clock, calculates interruption delay.Compared with prior art, the present invention need not be used The hardware testing equipment of the auxiliary such as logic analyser, it is only necessary to MIPS frameworks are used in Vxworks systems The high precision clock carried just can carry out interruption delay test to Vxworks systems, test convenient, Yi Shi Apply.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to implementing The accompanying drawing used required in example or description of the prior art is briefly described, it should be apparent that, retouch below Accompanying drawing in stating only some embodiments of the present invention, for those of ordinary skill in the art, not On the premise of paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the flow chart of the interruption delay method of testing embodiment one of the invention based on MIPS frameworks;
Fig. 2 is the structural representation of the interruption delay test device embodiment one of the invention based on MIPS frameworks;
Fig. 3 is the structural representation of the interruption delay test device embodiment two of the invention based on MIPS frameworks.
Embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the present invention Accompanying drawing in embodiment, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that Described embodiment is only a part of embodiment of the invention, rather than whole embodiments.Based on this hair Embodiment in bright, the institute that those of ordinary skill in the art are obtained under the premise of creative work is not made There is other embodiment, belong to the scope of protection of the invention.
The present invention provides a kind of interruption delay method of testing based on MIPS frameworks, and Fig. 1 is based on for the present invention The flow chart of the interruption delay method of testing embodiment one of MIPS frameworks, as shown in figure 1, the side of the present embodiment Method is applied to Vxworks systems, including:
S11, the MIPS (Microprocessor without are enabled in the Vxworks systems Interlocked piped stages, the microprocessor of no inner interlocked pipelining-stage) high precision clock that carries of framework, Obtain the frequency of the high precision clock.
Current time when S12, Vxworks systems enable interruption described using high precision clock acquisition Stamp, is stabbed as the very first time.
S13, when obtaining using the high precision clock current when the Vxworks systems produce the interruption Between stab, be used as the second timestamp.
S14, the frequency according to very first time stamp, second timestamp and the high precision clock, Calculate interruption delay.
Interruption delay method of testing provided in an embodiment of the present invention based on MIPS frameworks, in Vxworks systems It is middle to enable the high precision clock that the MIPS frameworks are carried, the frequency of the high precision clock is obtained, institute is utilized Current time stamp when high precision clock obtains the Vxworks systems enable interruption is stated, the very first time is used as Stamp, the current time stamp when Vxworks systems produce the interruption is obtained using the high precision clock, As the second timestamp, according to very first time stamp, second timestamp and the high precision clock Frequency, calculate interruption delay.Compared with prior art, the present invention need not use logic analyser etc. auxiliary The hardware testing equipment helped, it is only necessary to the high precision clock carried in Vxworks systems using MIPS frameworks Can just interruption delay test be carried out to Vxworks systems, it is convenient to test, easily implemented.
Optionally, it is described to obtain working as when the Vxworks systems enable interruption using the high precision clock Preceding timestamp, may include as very first time stamp:The Vxworks is obtained respectively using the high precision clock System repeatedly enables current time stamp during interruption, using the average value of the multiple current time stamps got as The very first time stabs;
It is described when obtaining current when the Vxworks systems produce the interruption using the high precision clock Between stab, include as the second timestamp:Obtained respectively using the high precision clock with repeatedly enabling interruption pair Current time stamp when repeatedly producing the interruption answered, by the average value of the multiple current time stamps got It is used as the second timestamp.
So as to, because very first time stamp is obtained with the second timestamp by way of repeatedly measuring and averaging, The accuracy of data is higher, therefore, according to very first time stamp, second timestamp and the height The accuracy that the frequency of accuracy clock calculates the data of obtained interruption delay is also higher.
Optionally, it is described to obtain working as when the Vxworks systems enable interruption using the high precision clock Preceding timestamp includes:The Vxworks systems are obtained respectively using the high precision clock repeatedly enables interruption When current time stamp;
It is described when obtaining current when the Vxworks systems produce the interruption using the high precision clock Between stab and include:Obtained respectively described in multiple generation corresponding with repeatedly enabling interruption using the high precision clock Current time stamp during interruption;
The frequency according to very first time stamp, second timestamp and the high precision clock, Calculating interruption delay includes:According to each current time stamp enabled when interrupting, produce the interruption every time when Current time stamp and the high precision clock frequency, calculate each interruption delay, obtain it is multiple in Disconnected delay, regard the average value of the multiple interruption delay as final interruption delay.
So as to, because the interruption delay finally given is repeatedly measures the average value of obtained interruption delay, because This, the accuracy of data is higher.
Optionally, disappeared by enabling to interrupt to producing the action related with interruption carried out between the interruption The time of consumption is shorter, can be ignored.Therefore, it is described according to the very first time stamp, described second when Between stamp and the high precision clock frequency, calculate interruption delay be specifically as follows:By second time Stamp subtracts the difference that very first time stamp obtains divided by the frequency of the high precision clock, obtains interruption delay.
Optionally, in order to more be precisely calculated interruption delay, methods described may also include:
Progress between enabling interruption and producing the interruption is obtained optional, in order to more be precisely calculated interruption Delay, time for being consumed of the action related to interruptions, be designated as interruption elapsed time;
The frequency according to very first time stamp, second timestamp and the high precision clock, Calculating interruption delay includes:When second timestamp is subtracted into the very first time stamp and the interruption consumption Between obtained difference divided by the frequency of the high precision clock, obtain interruption delay.
Due to break in the calculation delay when, by enable interrupt with produce carry out between the interruption with interrupting phase The time that the action of pass is consumed gets rid of, so that, finally calculate obtained interruption delay more accurate.
Optionally, when described interrupt as Interruption, the acquisition, which is enabled, to be interrupted with producing the interruption Between time for being consumed of the action related to interruption that carries out, being designated as interrupting elapsed time includes:Described Interruption time interval is set in Vxworks systems, and the break period interval is designated as interrupting elapsed time;
It is described that second timestamp is subtracted to the difference that the very first time stamp and the interruption elapsed time are obtained The frequency of value divided by the high precision clock, obtaining interruption delay includes:Second timestamp is subtracted into institute State the frequency of very first time stamp and the obtained difference of the Interruption time interval divided by the high precision clock Rate, obtains interruption delay.
Wherein, the Interruption time interval set in the Vxworks systems is the smaller the better, the present invention The Interruption time interval set in embodiment can be 1us.
Optionally, when described interrupt as serial ports interruption, the acquisition, which is enabled, to be interrupted with producing the interruption Between time for being consumed of the action related to interruption that carries out, being designated as interrupting elapsed time includes:Using described High precision clock obtains the initial time stamp sent after the Vxworks systems enable is interrupted when data start And ending time stamp during transmission end of data, the ending time stamp is subtracted into the initial time stamp and obtained The difference divided by the frequency of the high precision clock arrived, obtains sending the time of data, when being designated as interrupting consumption Between;
It is described that second timestamp is subtracted to the difference that the very first time stamp and the interruption elapsed time are obtained The frequency of value divided by the high precision clock, obtaining interruption delay includes:Second timestamp is subtracted into institute State the very first time and stab the difference obtained with the time of the transmission data divided by the frequency of the high precision clock, Obtain interruption delay.
Optionally, interrupted described using the high precision clock acquisition Vxworks systems generation is described When current time stamp, after the second timestamp, methods described may also include:
Close described interrupt.
The embodiment of the present invention provides a kind of interruption delay test device based on MIPS frameworks, and Fig. 2 is the present invention The structural representation of interruption delay test device embodiment one based on MIPS frameworks, as shown in Fig. 2 this reality The device for applying example is applied to Vxworks systems, including:
Enabling unit 21, it is high-precision for enable that the MIPS frameworks carry in the Vxworks systems Clock is spent, the frequency of the high precision clock is obtained;
First acquisition unit 22, for being obtained using the high precision clock in the Vxworks systems enable Current time stamp when disconnected, is stabbed as the very first time;
Second acquisition unit 23, institute is produced for obtaining the Vxworks systems using the high precision clock Current time stamp during interruption is stated, the second timestamp is used as;
Computing unit 24, for according to very first time stamp, second timestamp and the high accuracy The frequency of clock, calculates interruption delay.
Interruption delay test device provided in an embodiment of the present invention based on MIPS frameworks, in Vxworks systems The high precision clock that the MIPS frameworks are carried is enabled in system, the frequency of the high precision clock is obtained, utilized The high precision clock obtains the current time stamp when Vxworks systems enable interruption, during as first Between stab, obtain the current time when Vxworks systems produce the interruption using the high precision clock Stamp, as the second timestamp, according to very first time stamp, second timestamp and the high accuracy The frequency of clock, calculates interruption delay.Compared with prior art, the present invention need not use logic analyser Etc. the hardware testing equipment of auxiliary, it is only necessary in Vxworks systems using MIPS frameworks carry it is high-precision Spend clock just can carry out interruption delay test to Vxworks systems, and it is convenient to test, and easily implements.
Optionally, the first acquisition unit 22, for obtaining described respectively using the high precision clock Vxworks systems repeatedly enable current time stamp during interruption, by being averaged for the multiple current time stamps got Value is stabbed as the very first time;
The second acquisition unit 23, is interrupted for being obtained respectively using the high precision clock with repeatedly enabling Corresponding current time stamp when repeatedly producing the interruption, by being averaged for the multiple current time stamps got Value is used as the second timestamp.
So as to, because very first time stamp is obtained with the second timestamp by way of repeatedly measuring and averaging, The accuracy of data is higher, therefore, according to very first time stamp, second timestamp and the height The accuracy that the frequency of accuracy clock calculates the data of obtained interruption delay is also higher.Optionally, described One acquiring unit 22, is repeatedly enabled for obtaining the Vxworks systems respectively using the high precision clock Current time stamp during interruption;
The second acquisition unit 23, is interrupted for being obtained respectively using the high precision clock with repeatedly enabling Corresponding current time stamp when repeatedly producing the interruption;
The computing unit 24, the current time stamp, each generation when enable is interrupted every time for basis is described The frequency of current time stamp and the high precision clock during interruption, calculates each interruption delay, obtains Multiple interruption delay, regard the average value of the multiple interruption delay as final interruption delay.
So as to, because the interruption delay finally given is repeatedly measures the average value of obtained interruption delay, because This, the accuracy of data is higher.
Optionally, disappeared by enabling to interrupt to producing the action related with interruption carried out between the interruption The time of consumption is shorter, can be ignored.Therefore, the computing unit 24, during available for by described second Between stamp subtract difference that very first time stamp obtains divided by the frequency of the high precision clock, obtain interruption and prolong Late.
Optionally, Fig. 3 is the structure of the interruption delay test device embodiment two of the invention based on MIPS frameworks Schematic diagram, in order to more be precisely calculated interruption delay, as shown in figure 3, described device may also include:
3rd acquiring unit 25, for obtain enable interrupt with produce carry out between the interruption with interrupting phase The time that the action of pass is consumed, it is designated as interrupting elapsed time;
The computing unit 24, for second timestamp to be subtracted into the very first time stamp and the interruption Difference divided by the frequency of the high precision clock that elapsed time is obtained, obtain interruption delay.
Due to break in the calculation delay when, by enable interrupt with produce carry out between the interruption with interrupting phase The time that the action of pass is consumed gets rid of, so that, finally calculate obtained interruption delay more accurate.
Optionally, when described interrupt as Interruption, the 3rd acquiring unit 25, for described Interruption time interval is set in Vxworks systems, and the break period interval is designated as interrupting elapsed time;
The computing unit 24, for second timestamp to be subtracted into the very first time stamp and the timing The frequency of the break period obtained difference in interval divided by the high precision clock, obtains interruption delay.
Wherein, the Interruption time interval set in the Vxworks systems is the smaller the better, the present invention The Interruption time interval set in embodiment can be 1us.
Optionally, when described interrupt as serial ports interruption, the 3rd acquiring unit 25, for described in High precision clock obtains the initial time stamp sent after the Vxworks systems enable is interrupted when data start And ending time stamp during transmission end of data, the ending time stamp is subtracted into the initial time stamp and obtained The difference divided by the frequency of the high precision clock arrived, obtains sending the time of data, when being designated as interrupting consumption Between;
The computing unit 24, for second timestamp to be subtracted into the very first time stamp and the transmission Difference divided by the frequency of the high precision clock that the time of data obtains, obtain interruption delay.
Optionally, as shown in figure 3, described device may also include:
Closing unit 26, for obtaining described using the high precision clock in the second acquisition unit 23 Vxworks systems produce the current time stamp during interruption, after the second timestamp, during closing is described It is disconnected.
Interruption delay method of testing and device of the embodiment of the present invention based on MIPS frameworks, go for The interruption delay test based on MIPS frameworks is carried out in VxWorks system, but is not limited only to this.
One of ordinary skill in the art will appreciate that all or part of flow in above-described embodiment method is realized, It can be by computer program to instruct the hardware of correlation to complete, described program can be stored in a calculating In machine read/write memory medium, the program is upon execution, it may include such as the flow of the embodiment of above-mentioned each method. Wherein, described storage medium can for magnetic disc, CD, read-only memory (Read-Only Memory, ) or random access memory (Random Access Memory, RAM) etc. ROM.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited to This, any one skilled in the art the invention discloses technical scope in, can readily occur in Change or replacement, should all be included within the scope of the present invention.Therefore, protection scope of the present invention It should be defined by scope of the claims.

Claims (16)

1. a kind of interruption delay method of testing based on MIPS frameworks, it is characterised in that applied to Vxworks System, including:
The high precision clock that the MIPS frameworks are carried is enabled in the Vxworks systems, obtains described The frequency of high precision clock;
The current time stamp when Vxworks systems enable interruption is obtained using the high precision clock, is made Stabbed for the very first time;
The current time stamp when Vxworks systems produce the interruption is obtained using the high precision clock, It is used as the second timestamp;
According to the frequency of very first time stamp, second timestamp and the high precision clock, calculate Interruption delay.
2. according to the method described in claim 1, it is characterised in that described to be obtained using the high precision clock Take the Vxworks systems to enable current time stamp when interrupting, include as very first time stamp:Using institute State high precision clock and obtain current time stamp when the Vxworks systems repeatedly enable interruption respectively, will obtain The average value for the multiple current time stamps got is stabbed as the very first time;
It is described when obtaining current when the Vxworks systems produce the interruption using the high precision clock Between stab, include as the second timestamp:Obtained respectively using the high precision clock with repeatedly enabling interruption pair Current time stamp when repeatedly producing the interruption answered, by the average value of the multiple current time stamps got It is used as the second timestamp.
3. according to the method described in claim 1, it is characterised in that described to be obtained using the high precision clock The current time stamp for taking the Vxworks systems to enable when interrupting includes:Distinguished using the high precision clock Obtain the current time stamp when Vxworks systems repeatedly enable interruption;
It is described when obtaining current when the Vxworks systems produce the interruption using the high precision clock Between stab and include:Obtained respectively described in multiple generation corresponding with repeatedly enabling interruption using the high precision clock Current time stamp during interruption;
The frequency according to very first time stamp, second timestamp and the high precision clock, Calculating interruption delay includes:According to each current time stamp enabled when interrupting, produce the interruption every time when Current time stamp and the high precision clock frequency, calculate each interruption delay, obtain it is multiple in Disconnected delay, regard the average value of the multiple interruption delay as final interruption delay.
4. according to the method in claim 2 or 3, it is characterised in that described according to the very first time The frequency of stamp, second timestamp and the high precision clock, calculating interruption delay includes:Will be described Second timestamp subtracts the difference that very first time stamp obtains divided by the frequency of the high precision clock, obtains Interruption delay.
5. according to the method in claim 2 or 3, it is characterised in that methods described also includes:
Obtain enable interrupt to produce that the action related with interruption carried out between the interruption consumed when Between, it is designated as interrupting elapsed time;
The frequency according to very first time stamp, second timestamp and the high precision clock, Calculating interruption delay includes:When second timestamp is subtracted into the very first time stamp and the interruption consumption Between obtained difference divided by the frequency of the high precision clock, obtain interruption delay.
6. method according to claim 5, it is characterised in that when described interrupt as Interruption, It is described obtain enable interrupt to produce that the action related with interruption carried out between the interruption consumed when Between, being designated as interruption elapsed time includes:Interruption time interval is set in the Vxworks systems, The break period interval is designated as interrupting elapsed time;
It is described that second timestamp is subtracted to the difference that the very first time stamp and the interruption elapsed time are obtained The frequency of value divided by the high precision clock, obtaining interruption delay includes:Second timestamp is subtracted into institute State the frequency of very first time stamp and the obtained difference of the Interruption time interval divided by the high precision clock Rate, obtains interruption delay.
7. method according to claim 5, it is characterised in that when described interrupt as serial ports interruption, It is described obtain enable interrupt to produce that the action related with interruption carried out between the interruption consumed when Between, being designated as interruption elapsed time includes:The Vxworks systems are obtained using the high precision clock to enable Ending time stamp when initial time stamp when data start is sent after interruption and end of data is sent, will The ending time stamp subtracts the difference that the initial time stamp obtains divided by the frequency of the high precision clock, Obtain sending the time of data, be designated as interrupting elapsed time;
It is described that second timestamp is subtracted to the difference that the very first time stamp and the interruption elapsed time are obtained The frequency of value divided by the high precision clock, obtaining interruption delay includes:Second timestamp is subtracted into institute State the very first time and stab the difference obtained with the time of the transmission data divided by the frequency of the high precision clock, Obtain interruption delay.
8. according to the method described in claim 1, it is characterised in that utilize the high precision clock described The current time stamp when Vxworks systems produce the interruption is obtained, after the second timestamp, Methods described also includes:
Close described interrupt.
9. a kind of interruption delay test device based on MIPS frameworks, it is characterised in that applied to Vxworks System, including:
Enabling unit, for enabling the high accuracy that the MIPS frameworks are carried in the Vxworks systems Clock, obtains the frequency of the high precision clock;
First acquisition unit, interruption is enabled for obtaining the Vxworks systems using the high precision clock When current time stamp, stabbed as the very first time;
Second acquisition unit, it is described for obtaining the Vxworks systems generation using the high precision clock Current time stamp during interruption, is used as the second timestamp;
Computing unit, for according to the very first time stamp, second timestamp and it is described high-precision when The frequency of clock, calculates interruption delay.
10. device according to claim 9, it is characterised in that the first acquisition unit, is used for The current time stamp when Vxworks systems repeatedly enable interruption is obtained respectively using the high precision clock, Stabbed the average value of the multiple current time stamps got as the very first time;
The second acquisition unit, for being obtained respectively using the high precision clock with repeatedly enabling interruption pair Current time stamp when repeatedly producing the interruption answered, by the average value of the multiple current time stamps got It is used as the second timestamp.
11. device according to claim 9, it is characterised in that the first acquisition unit, is used for The current time stamp when Vxworks systems repeatedly enable interruption is obtained respectively using the high precision clock;
The second acquisition unit, for being obtained respectively using the high precision clock with repeatedly enabling interruption pair Current time stamp when repeatedly producing the interruption answered;
The computing unit, for according to every time enable interrupt when current time stamp, produce every time it is described in The frequency of current time stamp and the high precision clock when disconnected, calculates each interruption delay, obtains many Individual interruption delay, regard the average value of the multiple interruption delay as final interruption delay.
12. the device according to claim 10 or 11, it is characterised in that the computing unit, is used In the frequency that second timestamp is subtracted to difference that very first time stamp obtains divided by the high precision clock Rate, obtains interruption delay.
13. the device according to claim 10 or 11, it is characterised in that described device also includes:
3rd acquiring unit, is interrupted to producing carry out between the interruption related with interruption for obtaining to enable Time for being consumed of action, be designated as interrupting elapsed time;
The computing unit, disappears for second timestamp to be subtracted into the very first time stamp and the interruption Difference divided by the frequency of the high precision clock that time-consuming is obtained, obtain interruption delay.
14. device according to claim 13, it is characterised in that when described interrupt as Interruption, 3rd acquiring unit, it is described for setting Interruption time interval in the Vxworks systems Break period interval be designated as interrupt elapsed time;
The computing unit, for second timestamp to be subtracted in the very first time stamp and the timing Difference divided by the frequency of the high precision clock that disconnected time interval is obtained, obtain interruption delay.
15. device according to claim 13, it is characterised in that when described interrupt as serial ports interruption, 3rd acquiring unit, interruption is enabled for obtaining the Vxworks systems using the high precision clock Ending time stamp when sending initial time stamp when data start afterwards and sending end of data, will be described Ending time stamp subtracts the difference that the initial time stamp obtains divided by the frequency of the high precision clock, obtains The time of data is sent, is designated as interrupting elapsed time;
The computing unit, for second timestamp to be subtracted into the very first time stamp and the transmission number According to time obtained difference divided by the high precision clock frequency, obtain interruption delay.
16. device according to claim 9, it is characterised in that described device also includes:
Closing unit, for obtaining the Vxworks using the high precision clock in the second acquisition unit System produces the current time stamp during interruption, after the second timestamp, closes described interrupt.
CN201610077709.0A 2016-02-03 2016-02-03 interrupt delay testing method and device based on MIPS framework Active CN107038109B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610077709.0A CN107038109B (en) 2016-02-03 2016-02-03 interrupt delay testing method and device based on MIPS framework

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610077709.0A CN107038109B (en) 2016-02-03 2016-02-03 interrupt delay testing method and device based on MIPS framework

Publications (2)

Publication Number Publication Date
CN107038109A true CN107038109A (en) 2017-08-11
CN107038109B CN107038109B (en) 2019-12-13

Family

ID=59533004

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610077709.0A Active CN107038109B (en) 2016-02-03 2016-02-03 interrupt delay testing method and device based on MIPS framework

Country Status (1)

Country Link
CN (1) CN107038109B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111831521A (en) * 2019-04-18 2020-10-27 深圳市汇顶科技股份有限公司 Test method of interrupt response time, processor and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125442A (en) * 1985-11-26 1987-06-06 Nec Corp Measurement system for program performance
CN1553336A (en) * 2003-05-30 2004-12-08 中兴通讯股份有限公司 Testing software timing method
CN102722434A (en) * 2012-05-24 2012-10-10 兰雨晴 Performance test method and tool aiming at Linux process scheduling

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125442A (en) * 1985-11-26 1987-06-06 Nec Corp Measurement system for program performance
CN1553336A (en) * 2003-05-30 2004-12-08 中兴通讯股份有限公司 Testing software timing method
CN102722434A (en) * 2012-05-24 2012-10-10 兰雨晴 Performance test method and tool aiming at Linux process scheduling

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
吴讯,马媛,董勤鹏: "实时操作系统实时性能测试技术研究", 《系统仿真学报》 *
小小鸟: "转载vxWorks中对时间的精确统计", 《新浪博客,[HTTP://BLOG.SINA.COM.CN/S/BLOG_BFD617530101DDW9.HTML]》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111831521A (en) * 2019-04-18 2020-10-27 深圳市汇顶科技股份有限公司 Test method of interrupt response time, processor and electronic equipment

Also Published As

Publication number Publication date
CN107038109B (en) 2019-12-13

Similar Documents

Publication Publication Date Title
CN101363896B (en) High precision voltage transient event detection and wave-recording method
CN106685566B (en) A kind of selection method and clock server of clock source
Zhang et al. The time skew problem in PMU measurements
CN103268289B (en) Record the method and system of application testing script on mobile terminals
CN106483866B (en) Guidance and control semi-matter simulating system timing method and system
CN104198977A (en) Accuracy detection method based on average power error for analog input combining unit
CN107239238A (en) A kind of I/O operation method and device of the storage based on distributed lock
CN110535551B (en) Method and system for synchronizing fault recording sampling data in power system
CN109633318B (en) Method and device for synchronizing electric signal and communication signal, storage medium and processor
CN107038109A (en) Interruption delay method of testing and device based on MIPS frameworks
CN111756593B (en) Self-testing method and testing method for synchronization precision of time synchronization system
CN104679583B (en) A kind of method and device of dynamic adjustment clock interrupt
US9882705B2 (en) Communication apparatus, communication method, and computer readable medium using propagation delay for time synchronization
CN107592177B (en) A kind of clock synchronizing method of helicopter avionics system test network
US20130044112A1 (en) Apparatus and method for providing frequency domain display with visual indication of fft window shape
CN113406436A (en) Traveling wave fault location method and system for alternating-current and direct-current transmission line based on 5G communication
CN109444537A (en) It is a kind of meter and out-of-band interference adaptive synchronicity phasor measurement method
CN107947886A (en) System calibration method based on time-code and quasi- second
WO2022127803A1 (en) Power grid clock synchronization method and device
CN109856583B (en) Measuring device and method for transmission delay of electronic current transformer
CN111130681B (en) Method and device for determining noise transfer characteristics
CN103425058A (en) Timing method, central processing unit and electronic device
US11206156B2 (en) Method and apparatus for storing data of transmission signal, and computer readable storage medium
CN102768633A (en) Method for testing start and stop of server mainboard based on time series monitoring
CN106645855B (en) A method of eliminating four-way digital three-dimensional waveform randomized jitter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: 100195 Building 2, Longxin Industrial Park, Zhongguancun environmental protection technology demonstration park, Haidian District, Beijing

Patentee after: Loongson Zhongke Technology Co.,Ltd.

Address before: 100195 Building 2, Longxin Industrial Park, Zhongguancun environmental protection technology demonstration park, Haidian District, Beijing

Patentee before: LOONGSON TECHNOLOGY Corp.,Ltd.

CP01 Change in the name or title of a patent holder