WO2022127803A1

WO2022127803A1 - Power grid clock synchronization method and device

Info

Publication number: WO2022127803A1
Application number: PCT/CN2021/138196
Authority: WO
Inventors: 张淼; 于希娟; 及洪泉; 于浩然; 宣振文; 李菁; 饶强; 赵贺; 张玉佳; 许琬昱
Original assignee: 国家电网有限公司; 国网北京市电力公司
Priority date: 2020-12-15
Filing date: 2021-12-15
Publication date: 2022-06-23
Also published as: CN112600638B; CN112600638A

Abstract

Disclosed in the present application are a power grid clock synchronization method and device. The method comprises: in a low-voltage line of a power supply and distribution system, determining whether a branch line exists in a target line segment; in the case that the branch line does not exist in the target line segment, performing time synchronization on nodes on the target line segment on the basis of the relationship between current phases of the nodes; in the case that the branch line exists in the target line segment, determining at least one bus corresponding to the branch line, and performing time synchronization on branch nodes on the basis of the relationship between voltage phases of the branch nodes on each bus; and performing time synchronization on sub-nodes on the basis of the relationship between current phases of the sub-nodes on a branch line segment corresponding to each branch node. According to the present application, the problems in the related art that the time synchronization precision of the power supply and distribution system is not high and a synchronization signal is susceptible to interference are solved.

Description

Power grid clock synchronization method and device

technical field

The present application relates to the technical field of time synchronization, and in particular, to a method and device for power grid clock synchronization.

Background technique

Accurate time synchronization is one of the key technologies of intelligent distribution network. Through accurate time synchronization, related application functions such as fault identification, impedance estimation, and power quality diagnosis can be realized.

In terms of time synchronization methods, there are currently methods of time synchronization through a network and a global navigation system. However, the current method has some shortcomings. Specifically, through the network time synchronization method, the time synchronization accuracy can reach the level of 10ms, but it is difficult to be further accurate, and it is difficult to meet the requirements of higher precision. The global navigation system time synchronization method, although The time can be accurate to within 100us, but it is easily affected by factors such as building occlusion, and it is difficult for some power distribution rooms or basements to receive the time synchronization signal, and the scope of use is limited.

Aiming at the problems in the related art that the time synchronization accuracy of the power supply and distribution system is not high and the synchronization signal is easily interfered, no effective solution has been proposed yet.

SUMMARY OF THE INVENTION

The present application provides a power grid clock synchronization method and device to solve the problems in the related art that the time synchronization accuracy of the power supply and distribution system is not high, and the synchronization signal is susceptible to interference.

According to one aspect of the present application, a method for synchronizing a power grid clock is provided. The method includes: in the low-voltage line of the power supply and distribution system, judging whether there is a branch line in the target line segment; if there is no branch line in the target line segment, based on the relationship between the current phases of each node, the target line Each node on the line segment is time synchronized; in the case of a branch line in the target line segment, at least one bus corresponding to the branch line is determined, and based on the relationship between the voltage phases of each branch node on each bus, Time synchronization is performed on each branch node; time synchronization is performed on each child node based on the relationship between the current phases of each child node on the branch line segment corresponding to each branch node.

Further, the method further includes: in the process of time synchronization, the time management terminal obtains the absolute time through one of the following modules: a communication timing module, a Beidou timing module or a GPS timing module.

Further, performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node includes: acquiring a current waveform diagram of each node on the target line segment; The current phase difference between the target node and the nodes other than the first target node; the time offset between the first target node and the nodes other than the first target node is determined according to the current phase difference; based on the clock of the first target node and the first target node Time offset between a target node and nodes other than the first target node, and time synchronization is performed on nodes other than the first target node.

Further, before performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node, the method further includes: determining a plurality of nodes on the target line segment; The node with the shortest distance from the current input terminal of the segment is determined as the first target node.

Further, performing time synchronization on each branch node of the target line segment based on the relationship between the voltage phases of each branch node includes: acquiring a voltage waveform diagram of the second target node in the target line segment, and each branch node of the second target node. Based on the voltage waveform diagram of the second target node and the voltage waveform diagram of each branch node of the second target node, determine the voltage phase difference between the second target node and each branch node of the second target node; according to The voltage phase difference determines the time offset between the second target node and each branch node of the second target node; based on the clock of the second target node and the time offset between the second target node and each branch node of the second target node time synchronization is performed on each branch node of the second target node.

Further, when there is a branch line in the target line segment, at least one bus corresponding to the branch line is determined, and based on the relationship between the voltage phases of each branch node on each bus, time synchronization is performed on each branch node. Including: acquiring the voltage waveform diagram of the second target node in the target line segment, and the voltage waveform diagram of each branch node on the bus where the second target node is located; based on the voltage waveform diagram of the second target node and the location of the second target node The voltage waveform diagram of each branch node on the bus, determine the voltage phase difference between the second target node and each branch node on the bus where the second target node is located; determine the second target node and the second target according to the voltage phase difference. The time offset between each branch node on the bus on which the node is located; based on the clock of the second target node and the time offset between the second target node and each branch node on the bus on which the second target node is located, for the first Each branch node on the bus where the two target nodes are located performs time synchronization.

Further, based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, performing time synchronization on each child node includes: acquiring the current waveform diagram of each child node on the branch line segment; Based on the current waveforms of each sub-node, determine the current phase difference between the first target sub-node and sub-nodes other than the first target sub-node, wherein the first target sub-node is the branch node of the branch line segment; according to the current phase The difference determines the time offset between the first target child node and the child nodes other than the first target child node; based on the clock of the first target child node and between the first target child node and the child nodes other than the first target child node time offset, and time synchronization is performed on child nodes other than the first target child node.

According to another aspect of the present application, a power grid clock synchronization apparatus is provided. The device includes: a judging unit for judging whether a branch line exists in a target line segment in a low-voltage line of an electric power supply and distribution system; a first time synchronization unit for judging whether there is a branch line in the target line segment , perform time synchronization on each node on the target line segment based on the relationship between the current phases of each node; the second time synchronization unit is used for determining at least one branch line corresponding to the branch line in the case of a branch line in the target line segment bus, and based on the relationship between the voltage phases of each branch node on each bus, time synchronization is performed on each branch node; a third time synchronization unit is used to separately base on the branch line segment corresponding to each branch node. The relationship between the current phases of each sub-node is time-synchronized for each sub-node.

Further, the device further includes: a transmission unit, configured to use the time management terminal to grant the synchronized time to each node through one of the following communication modules during the time synchronization process: a Beidou timing module or a GPS timing module.

In order to achieve the above object, according to another aspect of the present application, a storage medium is provided, the storage medium includes a stored program, wherein the program executes any one of the above-mentioned power grid clock synchronization methods.

In order to achieve the above object, according to another aspect of the present application, a processor is provided, and the processor is used for running a program, wherein any one of the above grid clock synchronization methods is executed when the program is running.

Through the present application, the following steps are adopted: in the low-voltage line of the power supply and distribution system, it is judged whether there is a branch line in the target line segment; if there is no branch line in the target line segment, based on the current phase difference of each node time synchronization of each node on the target line segment; in the case of a branch line in the target line segment, determine at least one bus bar corresponding to the branch line, and based on the voltage phase difference of each branch node on each bus line Time synchronization is performed on each branch node; based on the relationship between the current phases of each child node on the branch line segment corresponding to each branch node, time synchronization is performed on each child node, which solves the problem of electric power in the related art. The time synchronization accuracy of the power supply and distribution system is not high, and the synchronization signal is susceptible to interference. Through the relationship between the current phases of each node and the relationship between the voltage phases of each node, the clock synchronization of the low-voltage lines of the power supply and distribution system is performed, thereby improving the time synchronization accuracy and anti-interference of the power supply and distribution system. effect of ability.

Description of drawings

The accompanying drawings constituting a part of the present application are used to provide further understanding of the present application, and the schematic embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation of the present application. In the attached image:

1 is a flowchart of a method for synchronizing a power grid clock provided according to an embodiment of the present application;

FIG. 2 is a schematic diagram of time synchronization of low-voltage lines of a power supply and distribution system provided according to an embodiment of the present application; and

FIG. 3 is a schematic diagram of a power grid clock synchronization apparatus provided according to an embodiment of the present application.

Detailed ways

It should be noted that the embodiments in the present application and the features of the embodiments may be combined with each other in the case of no conflict. The present application will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

In order to make those skilled in the art better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only The embodiments are part of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the scope of protection of the present application.

It should be noted that the terms "first", "second", etc. in the description and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances for the embodiments of the application described herein. Furthermore, the terms "comprising" and "having" and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those expressly listed Rather, those steps or units may include other steps or units not expressly listed or inherent to these processes, methods, products or devices.

According to an embodiment of the present application, a method for synchronizing a power grid clock is provided.

FIG. 1 is a flowchart of a method for synchronizing clocks of a power grid according to an embodiment of the present application. As shown in Figure 1, the method includes the following steps:

Step S101, in the low-voltage line of the power supply and distribution system, determine whether there is a branch line in the target line segment.

It should be noted that the low-voltage lines of the power supply and distribution system are complex, there are no branch lines in some line sections, and there are branch lines in some line sections. way of time synchronization.

Step S102, in the case that there is no branch line in the target line segment, perform time synchronization on each node on the target line segment based on the relationship between the current phases of each node.

It should be noted that the distributed capacitance of the low-voltage line is very small and can be ignored. Therefore, when the distributed capacitance of the unbranched low-voltage line is negligible, it can be considered that the input current and the output current are in the same phase, so that the current phase value is used. The time synchronization of the nodes on the unbranched low-voltage wires can be realized by the simultaneous characteristic of the method, which can be recorded as the unbranched current timing method.

Optionally, in the power grid clock synchronization method provided in the embodiment of the present application, before performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node, the method further includes: in the target line segment Multiple nodes are determined on the above; the node with the shortest distance from the current input end of the target line segment among the multiple nodes is determined as the first target node.

Specifically, in each node of the unbranched target line, the clock of the node with the shortest distance from the current input terminal can be used as a reference to perform time synchronization on other nodes. Therefore, the node with the shortest distance from the current input terminal is determined as the first node. A target node, that is, a reference node.

Optionally, in the power grid clock synchronization method provided in the embodiment of the present application, performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node includes: acquiring the current of each node on the target line segment. Waveform diagram; based on the current waveform diagram of each node, determine the current phase difference between the first target node and nodes other than the first target node; determine the current phase difference between the first target node and nodes other than the first target node according to the current phase difference time offset; based on the clock of the first target node and the time offset between the first target node and nodes other than the first target node, perform time synchronization on nodes other than the first target node.

Specifically, the current waveform diagram of each node on the target line segment is acquired through the time management terminal, so that the zero point position in the current waveform diagram of the first target node can be determined, the coordinates of the zero point position are acquired, and then the node to be time synchronized can be acquired The coordinates of the zero point position in the current waveform diagram of the current waveform of The difference or sum of the clock of a target node and the time offset is the exact moment of the node to be time synchronized.

Step S103, in the case that there is a branch line in the target line segment, determine at least one bus bar corresponding to the branch line, and perform time synchronization on each branch node based on the relationship between the voltage phases of each branch node on each bus line respectively .

It should be noted that the target line segment can include multiple bus bars, each bus includes multiple branch nodes, and each branch node corresponds to a branch circuit. It can be ignored, so at each branch node of the same node, when the reactance is negligible, the time synchronization of different branches can be realized by using the simultaneous characteristics of the voltage phase, and this method can be recorded as the non-impedance voltage timing method.

Optionally, in the power grid clock synchronization method provided in the embodiment of the present application, in the case of a branch line in the target line segment, at least one bus bar corresponding to the branch line is determined, and based on the The relationship between the voltage phases, the time synchronization of each branch node includes: acquiring the voltage waveform diagram of the second target node in the target line segment, and the voltage waveform diagram of each branch node on the bus where the second target node is located; The voltage waveform diagram of the second target node and the voltage waveform diagram of each branch node on the bus where the second target node is located, determine the voltage phase difference between the second target node and each branch node on the bus where the second target node is located Determine the time offset between each branch node on the bus where the second target node and the second target node are located according to the voltage phase difference; Based on the clock of the second target node, and the bus where the second target node and the second target node are located The time offset between each branch node on the bus is time offset, and time synchronization is performed on each branch node on the bus where the second target node is located.

Specifically, the position of the zero point in the voltage waveform diagram of the second target node can be determined, the coordinates of the zero point position can be obtained, and then the coordinates of the zero point position in the voltage waveform diagram of the branch nodes on the same bus of the second target node can be obtained, based on The second target node and the zero point position coordinates in the voltage waveform diagram of the branch node of the second target node on the same bus, obtain the phase difference, convert the phase difference into a time difference, that is, time offset, the clock of the second target node and The difference or sum of the time offsets is the exact moment of the branch node on the same bus line of the second target node.

Step S104 , based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, perform time synchronization on each child node.

Specifically, after time synchronization is performed on each branch node on each bus of the target line segment, it is also necessary to perform time synchronization on each child node in the branch line segment under the branch node.

Optionally, in the power grid clock synchronization method provided by the embodiment of the present application, based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, the time synchronization of each child node includes: Obtain the current waveform diagram of each sub-node on the branch line segment; based on the current waveform diagram of each sub-node, determine the current phase difference between the first target sub-node and sub-nodes other than the first target sub-node, wherein the first target sub-node The target child node is a branch node of the branch line segment; the time offset between the first target child node and the child nodes other than the first target child node is determined according to the current phase difference; based on the clock of the first target child node and the first target The time offset between the child node and the child nodes other than the first target child node is used to perform time synchronization on the child nodes other than the first target child node.

Specifically, the principle of time synchronization of each sub-node on the branch line segment is the same as that of the time synchronization of the target line segment without branch. The current waveform diagram of each branch node of the branch line is obtained through the time management terminal, and a The branch node of the branch line is determined as the target child node, so that the relationship between the current phases of each child node realizes the time synchronization of each child node.

Optionally, in the power grid clock synchronization method provided in the embodiment of the present application, the method further includes: in the process of time synchronization, the time management terminal obtains the absolute time through one of the following modules: a communication timing module, a Beidou timing module or a GPS Timing module.

Specifically, the time management terminal in the power supply and distribution system not only obtains the voltage phase diagram or current phase diagram of each node, but also obtains accurate time synchronization, which lays the foundation for the accurate time synchronization of each branch time synchronization unit and the terminal time synchronization unit. Data base.

As shown in FIG. 2 , it is a schematic diagram of time synchronization of low-voltage lines of a power supply and distribution system provided according to an embodiment of the present application.

The process of time synchronization of the low-voltage lines of the power supply and distribution system shown in Figure 2 is as follows:

The time management terminal calculates the precise time through the non-branch current timing method, and grants the precise time to the branch time synchronization unit corresponding to each bus, and the branch time synchronization unit calculates the precise time through the non-impedance voltage timing method, and grants the precise time to the corresponding Each branch of the busbar is then time-synchronized by the non-branch current timing method timing terminal.

It should be noted that the timing method of the present application needs to realize basic timing through communication or other modes, and the basic timing accuracy requirement is <±20ms.

The power grid clock synchronization method provided by the embodiment of the present application determines whether there is a branch line in the target line segment in the low-voltage line of the power supply and distribution system; if there is no branch line in the target line segment, based on the The relationship between the current phases performs time synchronization on each node on the target line segment; in the case of a branch line in the target line segment, at least one busbar corresponding to the branch line is determined, and based on each branch node on each busbar Based on the relationship between the voltage phases of each branch node, time synchronization is performed on each branch node; based on the relationship between the current phases of each child node on the branch line segment corresponding to each branch node, time synchronization is performed on each child node to solve the problem. In the related art, the time synchronization accuracy of the power supply and distribution system is not high, and the synchronization signal is susceptible to interference. Through the relationship between the current phases of each node and the relationship between the voltage phases of each node, the clock synchronization of the low-voltage lines of the power supply and distribution system is performed, thereby improving the time synchronization accuracy and anti-interference of the power supply and distribution system. effect of ability.

It should be noted that the steps shown in the flowcharts of the accompanying drawings may be executed in a computer system, such as a set of computer-executable instructions, and, although a logical sequence is shown in the flowcharts, in some cases, Steps shown or described may be performed in an order different from that herein.

The embodiment of the present application further provides a power grid clock synchronization apparatus. It should be noted that the power grid clock synchronization apparatus of the present application embodiment may be used to execute the power grid clock synchronization method provided by the embodiment of the present application. The following describes the power grid clock synchronization device provided by the embodiment of the present application.

FIG. 3 is a schematic diagram of a power grid clock synchronization apparatus according to an embodiment of the present application. As shown in FIG. 3 , the apparatus includes: a judgment unit 31 , a first time synchronization unit 32 and a second time synchronization unit 33 .

Specifically, the judging unit 31 is used for judging whether there is a branch line in the target line segment in the low-voltage line of the power supply and distribution system;

The first time synchronization unit 32 is configured to perform time synchronization on each node on the target line segment based on the relationship between the current phases of each node when there is no branch line in the target line segment;

The second time synchronization unit 33 is configured to determine at least one bus bar corresponding to the branch line when there is a branch line in the target line segment, and based on the relationship between the voltage phases of the branch nodes on each bus Each branch node performs time synchronization;

The third time synchronization unit 34 is configured to perform time synchronization on each child node based on the relationship between the current phases of each child node on the branch line segment corresponding to each branch node, respectively.

Optionally, in the power grid clock synchronization device provided in the embodiment of the present application, the device further includes: a transmission unit, configured to use a time management terminal to obtain the absolute time through one of the following modules during the time synchronization process: a communication timing module , Beidou timing module or GPS timing module.

Optionally, in the power grid clock synchronization device provided in the embodiment of the present application, the first time synchronization unit 31 includes: a first acquisition module, configured to acquire the current waveform diagram of each node on the target line segment; a first determination module, is used to determine the current phase difference between the first target node and nodes other than the first target node based on the current waveform diagram of each node; the second determination module is used to determine the first target node and the first target according to the current phase difference. The time offset between nodes other than the node; the first time synchronization judgment module is used for determining the first target node based on the clock of the first target node and the time offset between the first target node and nodes other than the first target node. Nodes other than the target node perform time synchronization.

Optionally, in the power grid clock synchronization device provided in the embodiment of the present application, the device further includes: a third determining module, configured to perform time chronometry for each node on the target line segment based on the relationship between the current phases of each node. Before synchronization, a plurality of nodes are determined on the target line segment; the fourth determination module is configured to determine the node with the shortest distance from the current input end of the target line segment among the plurality of nodes as the first target node.

Optionally, in the power grid clock synchronization apparatus provided in this embodiment of the present application, the second time synchronization unit 33 includes: a second acquisition module, configured to acquire a voltage waveform diagram of the second target node in the target line segment, and the second target The voltage waveform diagram of each branch node on the bus where the node is located; the fifth determination module is used for determining the first target node based on the voltage waveform diagram of the second target node and the voltage waveform diagram of each branch node on the bus where the second target node is located The voltage phase difference between the two target nodes and the respective branch nodes on the bus where the second target node is located; the sixth determining module is used to determine each branch node on the bus where the second target node and the second target node are located according to the voltage phase difference the time offset between the branch nodes; the second time synchronization judgment module is configured to be based on the clock of the second target node and the time offset between the second target node and each branch node on the bus where the second target node is located , to perform time synchronization on each branch node of the second target node.

Optionally, in the power grid clock synchronization apparatus provided in the embodiment of the present application, the third time synchronization unit 34 includes: a third acquisition module, configured to acquire the time on the branch line segment when there is a branch line in the target line segment. the current waveform diagram of each sub-node; the seventh determination module is used to determine the current phase difference between the first target sub-node and sub-nodes other than the first target sub-node based on the current waveform diagram of each sub-node, wherein the first target sub-node A target child node is a branch node of the branch line segment; the eighth determination module is used to determine the time offset between the first target child node and the child nodes other than the first target child node according to the current phase difference; the third time synchronization The judgment module is configured to perform time synchronization on child nodes other than the first target child node based on the clock of the first target child node and the time offset between the first target child node and child nodes other than the first target child node.

In the power grid clock synchronization device provided by the embodiment of the present application, the judgment unit 31 judges whether there is a branch line in the target line segment in the low-voltage line of the power supply and distribution system; the first time synchronization unit 32 does not have a branch line in the target line segment In the case of a line, time synchronization is performed on each node on the target line segment based on the relationship between the current phases of each node; the second time synchronization unit 33 determines the branch line corresponding to the branch line when there is a branch line in the target line segment. At least one bus, and based on the relationship between the voltage phases of each branch node on each bus, time synchronization is performed on each branch node; the third time synchronization unit 34 is based on the branch line segment corresponding to each branch node. The relationship between the current phases of each sub-node, the time synchronization of each sub-node, solves the problem that the time synchronization accuracy of the power supply and distribution system in the related art is not high, and the synchronization signal is susceptible to interference, through the current phase of each node. The relationship between the power supply and distribution system and the relationship between the voltage phases of each node can synchronize the clock of the low-voltage lines of the power supply and distribution system, thereby achieving the effect of improving the time synchronization accuracy and anti-interference ability of the power supply and distribution system.

The power grid clock synchronization device includes a processor and a memory. The above judgment unit 31, the first time synchronization unit 32, the second time synchronization unit 33 and the third time synchronization unit 34 are all stored in the memory as program units, and are stored in the memory by the processor. The above-mentioned program elements stored in the memory are executed to realize the corresponding functions.

The processor includes a kernel, and the kernel calls the corresponding program unit from the memory. The kernel can be set to one or more, by adjusting the kernel parameters to solve the problem that the time synchronization accuracy of the power supply and distribution system is not high, and the synchronization signal is susceptible to interference.

Memory may include non-persistent memory in computer readable media, random access memory (RAM) and/or non-volatile memory, such as read only memory (ROM) or flash memory (flash RAM), the memory including at least one memory chip.

An embodiment of the present invention provides a storage medium on which a program is stored, and when the program is executed by a processor, the method for synchronizing the power grid clock is implemented.

An embodiment of the present invention provides a processor, where the processor is configured to run a program, wherein the method for power grid clock synchronization is executed when the program is running.

An embodiment of the present invention provides a device. The device includes a processor, a memory, and a program stored in the memory and running on the processor. When the processor executes the program, the following steps are implemented: in a low-voltage line of a power supply and distribution system , determine whether there is a branch line in the target line segment; if there is no branch line in the target line segment, perform time synchronization on each node on the target line segment based on the relationship between the current phases of each node; In the case where there are branch lines, at least one bus corresponding to the branch line is determined, and based on the relationship between the voltage phases of each branch node on each bus, the time synchronization of each branch node is performed; based on each branch node The relationship between the current phases of each sub-node on the corresponding branch line segment is time-synchronized for each sub-node.

The method further includes: in the process of time synchronization, the time management terminal obtains the absolute time through one of the following modules: a communication timing module, a Beidou timing module or a GPS timing module.

Time synchronization of each node on the target line segment based on the relationship between the current phases of each node includes: acquiring the current waveform diagram of each node on the target line segment; based on the current waveform diagram of each node, determining the first target node and The current phase difference between nodes other than the first target node; the time offset between the first target node and the nodes other than the first target node is determined according to the current phase difference; based on the clock of the first target node and the first target node The time offset between the node and the nodes other than the first target node is used to perform time synchronization on the nodes other than the first target node.

Before performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node, the method further includes: determining a plurality of nodes on the target line segment; The node with the shortest distance from the input end is determined as the first target node.

Time synchronization of each branch node of the target line segment based on the relationship between the voltage phases of each branch node includes: acquiring the voltage waveform diagram of the second target node in the target line segment, and the voltage waveform of each branch node of the second target node Fig.; based on the voltage waveform diagram of the second target node and the voltage waveform diagram of each branch node of the second target node, determine the voltage phase difference between the second target node and each branch node of the second target node; according to the voltage phase difference Determine the time offset between the second target node and each branch node of the second target node; based on the clock of the second target node and the time offset between the second target node and each branch node of the second target node, to Each branch node of the second target node performs time synchronization.

When there is a branch line in the target line segment, determining at least one bus bar corresponding to the branch line, and performing time synchronization on each branch node based on the relationship between the voltage phases of each branch node on each bus line includes: obtaining The voltage waveform diagram of the second target node in the target line segment, and the voltage waveform diagram of each branch node on the bus where the second target node is located; based on the voltage waveform diagram of the second target node and the bus on which the second target node is located The voltage waveform diagram of each branch node, determine the voltage phase difference between the second target node and each branch node on the bus where the second target node is located; determine the voltage phase difference between the second target node and the second target node according to the voltage phase difference. The time offset between each branch node on the bus; based on the clock of the second target node and the time offset between the second target node and each branch node on the bus where the second target node is located, the second target node Time synchronization is performed on each branch node on the bus where it is located.

Based on the relationship between the current phases of each sub-node on the branch line segment corresponding to each branch node, the time synchronization of each sub-node includes: acquiring the current waveform diagram of each sub-node on the branch line segment; The current waveform diagram of the node, determine the current phase difference between the first target sub-node and the sub-nodes other than the first target sub-node, wherein the first target sub-node is the branch node of the branch line segment; determine the first target sub-node according to the current phase difference. Time offset between a target child node and child nodes other than the first target child node; based on the clock of the first target child node and the time offset between the first target child node and child nodes other than the first target child node time synchronization is performed on the child nodes other than the first target child node. The devices in this article can be servers, PCs, PADs, mobile phones, and so on.

The present application also provides a computer program product, which, when executed on a data processing device, is suitable for executing a program initialized with the following method steps: in a low-voltage line of an electric power supply and distribution system, determining whether a branch exists in a target line segment line; when there is no branch line in the target line segment, time synchronization is performed on each node on the target line segment based on the relationship between the current phases of each node; when there is a branch line in the target line segment, determine At least one bus bar corresponding to the branch line, and based on the relationship between the voltage phases of each branch node on each bus line, time synchronization is performed on each branch node; The relationship between the current phases of the nodes is time-synchronized for each child node.

Based on the relationship between the current phases of each child node on the branch line segment corresponding to each branch node, the time synchronization of each child node includes: acquiring the current waveform diagram of each child node on the branch line segment; The current waveform diagram of the node, determine the current phase difference between the first target sub-node and the sub-nodes other than the first target sub-node, wherein the first target sub-node is the branch node of the branch line segment; determine the first target sub-node according to the current phase difference. Time offset between a target child node and child nodes other than the first target child node; based on the clock of the first target child node and the time offset between the first target child node and child nodes other than the first target child node time synchronization is performed on the child nodes other than the first target child node.

As will be appreciated by those skilled in the art, the embodiments of the present application may be provided as a method, a system, or a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions The apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in the flow or blocks of the flowcharts and/or the block or blocks of the block diagrams.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

Memory may include non-persistent memory in computer readable media, random access memory (RAM) and/or non-volatile memory in the form of, for example, read only memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer-readable media includes both persistent and non-permanent, removable and non-removable media, and storage of information may be implemented by any method or technology. Information may be computer readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Flash Memory or other memory technology, Compact Disc Read Only Memory (CD-ROM), Digital Versatile Disc (DVD) or other optical storage, Magnetic tape cartridges, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media, such as modulated data signals and carrier waves.

It should also be noted that the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device comprising a series of elements includes not only those elements, but also Other elements not expressly listed, or which are inherent to such a process, method, article of manufacture, or apparatus are also included. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in the process, method, article of manufacture or apparatus that includes the element.

It will be appreciated by those skilled in the art that the embodiments of the present application may be provided as a method, a system or a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The above are only examples of the present application, and are not intended to limit the present application. Various modifications and variations of this application are possible for those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

A method for power grid clock synchronization, comprising:

In the low-voltage line of the power supply and distribution system, determine whether there is a branch line in the target line segment;

In the case that there is no branch line in the target line segment, time synchronization is performed on each node on the target line segment based on the relationship between the current phases of each node;

In the case that there is a branch line in the target line segment, at least one bus bar corresponding to the branch line is determined, and based on the relationship between the voltage phases of each branch node on each bus line, the time synchronization;

Time synchronization is performed on the respective child nodes based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, respectively.
The method according to claim 1, wherein the method further comprises:

In the process of time synchronization, the time management terminal obtains the absolute time through one of the following modules: a communication timing module, a Beidou timing module or a GPS timing module.
The method according to claim 1, wherein the time synchronization of each node on the target line segment based on the relationship between the current phases of each node comprises:

obtaining the current waveform diagram of each node on the target line segment;

determining the current phase difference between the first target node and nodes other than the first target node based on the current waveform diagram of each node;

determining a time offset between the first target node and nodes other than the first target node according to the current phase difference;

Time synchronization is performed on nodes other than the first target node based on the clock of the first target node and the time offset between the first target node and nodes other than the first target node.
The method according to claim 3, wherein before performing time synchronization on each node on the target line segment based on the relationship between the current phases of each node, the method further comprises:

determining a plurality of nodes on the target line segment;

A node with the shortest distance from the current input end of the target line segment among the plurality of nodes is determined as the first target node.
The method according to claim 1, wherein, in the case that there is a branch line in the target line segment, at least one bus bar corresponding to the branch line is determined, and the The relationship between the voltage phases, the time synchronization of each branch node includes:

acquiring the voltage waveform diagram of the second target node in the target line segment, and the voltage waveform diagram of each branch node on the bus where the second target node is located;

Based on the voltage waveform diagram of the second target node and the voltage waveform diagrams of each branch node on the bus on which the second target node is located, determine the voltage on the bus on which the second target node and the second target node are located. The voltage phase difference between each branch node;

determining the time offset between the second target node and each branch node on the bus where the second target node is located according to the voltage phase difference;

Based on the clock of the second target node and the time offset between the second target node and each branch node on the bus on which the second target node is located, the Each branch node performs time synchronization.
The method according to claim 1, wherein, based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, the time synchronization of the respective child nodes comprises:

obtaining a current waveform diagram of each sub-node on the branch line segment;

Determine the current phase difference between the first target sub-node and sub-nodes other than the first target sub-node based on the current waveforms of each sub-node, wherein the first target sub-node is the branch line segment branch node;

determining the time offset between the first target sub-node and sub-nodes other than the first target sub-node according to the current phase difference;

Based on the clock of the first target child node and the time offset between the first target child node and the child nodes other than the first target child node, perform a time synchronization.
A power grid clock synchronization device, comprising:

The judgment unit is used for judging whether there is a branch line in the target line segment in the low-voltage line of the power supply and distribution system;

a first time synchronization unit, configured to perform time synchronization on each node on the target line segment based on the relationship between the current phases of each node when there is no branch line in the target line segment;

The second time synchronization unit is configured to determine at least one bus bar corresponding to the branch line when there is a branch line in the target line segment, and based on the difference between the voltage phases of the respective branch nodes on each bus line respectively relationship, and time synchronization is performed on each branch node on the bus;

The third time synchronization unit is configured to perform time synchronization on the respective child nodes based on the relationship between the current phases of the respective child nodes on the branch line segment corresponding to each branch node, respectively.
The device according to claim 7, wherein the device further comprises:

The transmission unit is used for obtaining the absolute time through one of the following modules using the time management terminal during the time synchronization process: a communication timing module, a Beidou timing module or a GPS timing module.
A storage medium, characterized in that the storage medium includes a stored program, wherein the program executes the power grid clock synchronization method according to any one of claims 1 to 6.
A processor, characterized in that the processor is used for running a program, wherein the method for synchronizing a power grid clock according to any one of claims 1 to 6 is executed when the program is running.