CN106483866B - Guidance and control semi-matter simulating system timing method and system - Google Patents
Guidance and control semi-matter simulating system timing method and system Download PDFInfo
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- CN106483866B CN106483866B CN201510527598.4A CN201510527598A CN106483866B CN 106483866 B CN106483866 B CN 106483866B CN 201510527598 A CN201510527598 A CN 201510527598A CN 106483866 B CN106483866 B CN 106483866B
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Abstract
The present invention provides a kind of Guidance and control semi-matter simulating system timing method and systems, which comprises carries out clock control by the RTX real time operating system being mounted on time control experiment calculation machine, generates the Interruption of RTX high precision clock；Then pass through VMIC reflective memory network in the gate time of timing and carry out interruption broadcast, and frame cycle count value is written in VMIC reflective memory network particular address, count value is the frame time number of l-G simulation test experience；Each system node computer reads frame cycle count value after receiving interruption in VMIC reflective memory network particular address, and calculates data read address according to frame cycle count value, carries out Models computed, and write the result into VMIC reflective memory network.The present invention is able to solve the problem that data and clock synchronize between each node of existing semi-matter simulating system.
Description
Technical field
The present invention relates to a kind of Guidance and control semi-matter simulating system timing method and systems.
Background technique
Semi-matter simulating system be in laboratory simulated target signal and to guidance control system carry out analysis verifying
System.Semi-matter simulating system shortens the lead time, offer Development Level plays indispensable work to research and development cost is reduced
With.
Semi-Physical Simulation Test System is a large complicated system, also known as Hardware-in-the-loop simu- lation, is a kind of imitative
Part access circuit in kind is replaced to the emulation mode of corresponding mathematics model, it passes through the communication technology for each emulation during very
Computer links together.To guarantee that data and clock are synchronous between each node, simulation process must be a real-time simulation
Journey, so-called real-time simulation refer to the identical emulation of time scale factor of the time scale factor and real system of simulation model.
During HWIL simulation, system must realize that real-time reception dynamic inputs within the given time cycle, and generate real-time
Dynamical output, that is to say, that physical unit must receive the information issued from normatron in given time, and will be required
Physical unit information return to normatron unit.If timing is there are error, analogue system will be calculated due to model
Machine and information in kind inconsistent and cause simulation result deviation occur, additionally due to there are a large amount of numbers in semi-matter simulating system
According to communication, synchronous data will be the another factor for influencing system performance.Therefore, periodically synchronous with data for HWIL simulation system
System has a very important significance.
Summary of the invention
The purpose of the present invention is to provide a kind of Guidance and control semi-matter simulating system timing method and systems, are able to solve
The problem that data and clock synchronize between existing each node of semi-matter simulating system.
To solve the above problems, the present invention provides a kind of Guidance and control semi-matter simulating system timing method, comprising:
Clock control is carried out by the RTX real time operating system being mounted on time control experiment calculation machine, it is high-precision to generate RTX
Spend the Interruption of clock；
Then pass through VMIC reflective memory network in the gate time of timing and carry out interruption broadcast, and in VMIC reflective memory
Frame cycle count value is written in network specific addresses, and count value is the frame time number of l-G simulation test experience；
Each system node computer reads frame period meter after receiving interruption in VMIC reflective memory network particular address
Numerical value, and data read address is calculated according to frame cycle count value, Models computed is carried out, and write the result into VMIC reflective memory
Network.
Further, in the above-mentioned methods, the RTX high precision clock is CLOCK_2 type clock.
Another side according to the present invention provides a kind of Guidance and control semi-matter simulating system timing system, comprising:
The RTX real time operating system being mounted on time control experiment calculation machine generates RTX for carrying out clock control
The Interruption of high precision clock then passes through VMIC reflective memory network in the gate time of timing and carries out interruption broadcast；
VMIC reflective memory network then carries out interruption broadcast for the gate time in timing；
Each system node computer, for reading frame week in VMIC reflective memory network particular address after receiving interruption
Phase count value, and data read address is calculated according to frame cycle count value, Models computed is carried out, and write the result into VMIC reflection
Memory network.
Further, in above system, the RTX high precision clock that institute's RTX real time operating system generates is CLOCK_2 class
Type clock.
Compared with prior art, the present invention generates high precision timing clock by RTX real time operating system, anti-by VMCI
It penetrates the mode of memory net distribution interruption and count value is written to reflective memory card to realize analogue system time synchronization and number
According to synchronization, accurate timing can be carried out to semi-matter simulating system, and high precision clock may be implemented between each node and data are synchronous.
Detailed description of the invention
Fig. 1 is the flow chart of the Guidance and control semi-matter simulating system timing method of one embodiment of the invention；
Fig. 2 is the connection figure of the Guidance and control semi-matter simulating system timing system of one embodiment of the invention.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
As illustrated in fig. 1 and 2, the present invention provides a kind of Guidance and control semi-matter simulating system timing method, comprising:
Step S1, by the RTX(Real-Time eXtension being mounted on time control experiment calculation machine) real-time operation
System carries out clock control, generates the Interruption of RTX high precision clock；Here, new by being established under RTX real time operating system
RTX program process, each system node operation program all must be RTX real-time program, and time control experiment calculation machine enters meter
When process, basic program is as follows:
RtGetClockTime(CLOCK_2,&pTime1);
do
{
RtGetClockTime(CLOCK_2,&pTime2);
run_time=pTime2.QuadPart-pTime1.QuadPart;
}while(run_time<(unsigned long)(step_time*10000));
Step S2 then passes through VMIC reflective memory network in the gate time of timing and carries out interruption broadcast, and in VMIC
Frame cycle count value is written in reflective memory network particular address, and count value is the frame time number of l-G simulation test experience；Here,
The above-mentioned available present system time of RtGetClockTime, program obtain a fiducial time first, later with it is current when
Between be compared with fiducial time, reach timing cycle after carry out interruption distribution, by VMIC reflective memory network to interrupt into
Row distribution, and count value is written in VMIC reflective memory network particular address, count value is the frame time of l-G simulation test experience
Number；
Step S3, each system node computer read frame in VMIC reflective memory network particular address after receiving interruption
Cycle count value, and data read address is calculated according to frame cycle count value, Models computed is carried out, and it is anti-to write the result into VMIC
Memory network is penetrated, here, each system node computer is interrupted to receive reflective memory as frame runing time starting point, passes through the frame period
Count value ensures that the synchronization of each node time as time and data synchronous mark in this way, and the data read are this
Frame data not will cause emulation data corruption.The present invention can carry out accurate timing, each system node to semi-matter simulating system
High precision clock may be implemented in intercomputer and data are synchronous.
Preferably, step S1, the RTX high precision clock are CLOCK_2 type clock, this clock is that can mention under RTX
The accurate timing controlled of system may be implemented in the full accuracy clock of confession, precision 100ns, and clock control precision can reach
To 100ns, the timing period can satisfy the requirement of existing analogue system less than 1 millisecond.
As shown in Fig. 2, another side according to the present invention, also provides a kind of Guidance and control semi-matter simulating system timing system
System, comprising:
The RTX(Real-Time eXtension being mounted on time control experiment calculation machine) real time operating system 1, it uses
In carrying out clock control, the Interruption of RTX high precision clock is generated, in the gate time of timing is then reflected by VMIC
It deposits network 2 and carries out interruption broadcast；
VMIC reflective memory network 2 then carries out interruption broadcast for the gate time in timing；
Each system node computer 3, for reading frame in VMIC reflective memory network particular address after receiving interruption
Cycle count value, and data read address is calculated according to frame cycle count value, Models computed is carried out, and it is anti-to write the result into VMIC
Penetrate memory network 2.
Preferably, RTX(Real-Time eXtension) real time operating system 1 generate RTX high precision clock be
CLOCK_2 type clock.
In conclusion the present invention generates high precision timing clock by RTX real time operating system, pass through VMCI reflective memory
Mode that net distribution is interrupted and count value is written to reflective memory card to realize that analogue system time synchronization and data are synchronous,
Accurate timing can be carried out to semi-matter simulating system, and high precision clock may be implemented between each node and data are synchronous.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.
Professional further appreciates that, unit described in conjunction with the examples disclosed in the embodiments of the present disclosure
And algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software generally describes each exemplary composition and step according to function in the above description.These
Function is implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Profession
Technical staff can use different methods to achieve the described function each specific application, but this realization is not answered
Think beyond the scope of this invention.
Obviously, those skilled in the art can carry out various modification and variations without departing from spirit of the invention to invention
And range.If in this way, these modifications and changes of the present invention belong to the claims in the present invention and its equivalent technologies range it
Interior, then the invention is also intended to include including these modification and variations.
Claims (2)
1. a kind of Guidance and control semi-matter simulating system timing method characterized by comprising
Step S1 carries out clock control by the RTX real time operating system being mounted on time control experiment calculation machine, generates RTX
The Interruption of high precision clock；By establishing new RTX program process, each system node operation under RTX real time operating system
Program all must be RTX real-time program, and time control experiment calculation machine is clocked into process；
Step S2 obtains present system time, and program obtains a fiducial time first, uses current time and fiducial time later
It is compared, carries out interruption distribution after reaching timing cycle, interruption is distributed by VMIC reflective memory network, and
Count value is written in VMIC reflective memory network particular address, and count value is the frame time number of l-G simulation test experience；
Step S3, each system node computer read the frame period after receiving interruption in VMIC reflective memory network particular address
Count value, and data read address is calculated according to frame cycle count value, Models computed is carried out, and write the result into VMIC reflection
Deposit network；Each system node computer is interrupted with receiving reflective memory as frame runing time starting point, is made by frame cycle count value
For time and data synchronous mark；The RTX high precision clock is CLOCK_2 type clock.
2. a kind of timing system for realizing Guidance and control semi-matter simulating system timing method described in claim 1,
It is characterized in that, comprising: the RTX real time operating system being mounted on time control experiment calculation machine, for carrying out clock control,
The Interruption for generating RTX high precision clock, then passes through VMIC reflective memory network in the gate time of timing and is interrupted
Broadcast；VMIC reflective memory network then carries out interruption broadcast for the gate time in timing；Each system node calculates
Machine, for reading frame cycle count value in VMIC reflective memory network particular address after receiving interruption, and according to the frame period
Count value calculates data read address, carries out Models computed, and write the result into VMIC reflective memory network；The RTX is real-time
The RTX high precision clock that operating system generates is CLOCK_2 type clock.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106776060A (en) * | 2016-11-25 | 2017-05-31 | 江西洪都航空工业集团有限责任公司 | A kind of shared drive algorithm |
| CN108021034A (en) * | 2017-11-08 | 2018-05-11 | 江西洪都航空工业集团有限责任公司 | A kind of accurate timing and the system and method for data synchronization |
| CN109407552A (en) * | 2018-12-17 | 2019-03-01 | 上海机电工程研究所 | A kind of most matter simulating system synergy emulation methods |
| CN110109373B (en) * | 2019-04-01 | 2022-04-19 | 江南机电设计研究所 | Automatic simulation method for missile guidance control system semi-physical simulation platform |
| CN110581862A (en) * | 2019-10-23 | 2019-12-17 | 上海机电工程研究所 | general adaptation method and system based on RFM (radio frequency modulation) multiple real-time simulation units |
| CN110687829A (en) * | 2019-10-28 | 2020-01-14 | 上海机电工程研究所 | Method, system, medium, and apparatus for implementing a simulation clock with a precision greater than a set threshold |
| CN111580751B (en) * | 2020-03-30 | 2023-05-12 | 上海机电工程研究所 | 0-1 dynamic data transmission and storage method and system based on reflective memory network |
| CN114047712B (en) * | 2021-10-12 | 2023-04-18 | 中国电子科技集团公司第二十九研究所 | Data communication method of semi-physical simulation system based on reflective memory network |
| CN114966580A (en) * | 2022-05-25 | 2022-08-30 | 西安电子科技大学 | Dynamic scattering echo simulation method and related device |
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