CN106645855B - A method of eliminating four-way digital three-dimensional waveform randomized jitter - Google Patents
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Abstract
本发明公开了一种消除四通道数字三维示波器波形随机跳动的方法,以通道1、2波形数据的同步信号Sync_sig1为参考基准,消除通道3、4的波形随机跳动;具体的讲,先利用同步信号Sync_sig1和Sync_sig2在时钟信号Sync_clk_R的同步下生成时间间隔信号Sync_interval,再利用时钟信号Sync_clk_R对时间间隔信号Sync_interval进行计数,得到波形数据Wave_dat1超前于Wave_dat2的时间,再利用该时间对波形数据Wave_dat1进行延迟调整,并将波形数据Wave_dat2的同步信号Sync_sig2设置为最终接收的时钟信号Sync_sig_R,实现两路波形数据的接收,从而消除通道3、4的波形随机跳动。
The invention discloses a method for eliminating the random beating of a four-channel digital three-dimensional oscilloscope waveform. Taking the synchronization signal Sync_sig1 of the waveform data of channels 1 and 2 as a reference, the random beating of the waveforms of channels 3 and 4 is eliminated; The signals Sync_sig1 and Sync_sig2 generate the time interval signal Sync_interval under the synchronization of the clock signal Sync_clk_R, and then use the clock signal Sync_clk_R to count the time interval signal Sync_interval to obtain the time when the waveform data Wave_dat1 is ahead of the Wave_dat2, and then use this time to delay the waveform data Wave_dat1 Adjust and set the synchronization signal Sync_sig2 of the waveform data Wave_dat2 as the final received clock signal Sync_sig_R to realize the reception of two channels of waveform data, thereby eliminating the random beating of the waveforms of channels 3 and 4.
Description
技术领域technical field
本发明属于数字示波器技术领域,更为具体地讲,涉及一种消除四通道数字三维示波器波形随机跳动的方法。The invention belongs to the technical field of digital oscilloscopes, and more particularly relates to a method for eliminating random beating of a four-channel digital three-dimensional oscilloscope waveform.
背景技术Background technique
数字三维示波器通过其快速高效并行处理架构实现将多次采集得到的波形进行多次叠加,实时记录信号在不同幅度及时刻位置上出现的次数,显示时将此信息按照一定正比例关系转换成为液晶屏上波形颜色的辉度信息。因此,用户在操作数字三维示波器时可以通过屏幕上显示波形颜色的深浅来判断输入信号在某些幅度或时刻位置上出现的概率。The digital three-dimensional oscilloscope realizes the multiple superposition of the waveforms collected multiple times through its fast and efficient parallel processing architecture, records the number of times the signal appears at different amplitudes and time positions in real time, and converts this information into a liquid crystal screen according to a certain proportional relationship when displaying. Intensity information for the upper waveform color. Therefore, when operating the digital three-dimensional oscilloscope, the user can judge the probability of the input signal appearing at a certain amplitude or time position by the depth of the waveform color displayed on the screen.
如图1所示的数字三维示波器中,模拟信号经过信号调理通道之后,经过ADC采样,并将采样输出存入采集存储器中。当存储器存储完成之后,即完成一次采集之后,将存储器所存数据依次读出,在并行协处理器中将采样数据映射成与液晶屏点阵相对应的波形数据库,映射完成后又重新开始新一轮的采集与映射。经过多次采集与映射,波形数据库中实时累加记录了输入信号在不同幅度及时刻位置上(或波形数据库不同存储单元上)出现的次数;与此同时,微处理器进行波形运算、菜单管理以及人机交互等工作。当到达液晶屏定时刷新时间时,启动显示刷新控制逻辑,自动将波形数据库传输到显示存储器波形区域中,然后与显示存储器菜单区域中的菜单数据进行组合后送往液晶屏显示。In the digital three-dimensional oscilloscope shown in Figure 1, after the analog signal passes through the signal conditioning channel, it is sampled by the ADC, and the sampled output is stored in the acquisition memory. When the memory storage is completed, that is, after one acquisition is completed, the data stored in the memory is read out in turn, and the sampled data is mapped into the waveform database corresponding to the LCD screen dot matrix in the parallel coprocessor. After the mapping is completed, a new one starts again. Collection and mapping of wheels. After multiple acquisitions and mappings, the waveform database records the number of times the input signal appears at different amplitudes and time positions (or on different storage units of the waveform database) in real time; at the same time, the microprocessor performs waveform operations, menu management and Human-computer interaction, etc. When the LCD screen timed refresh time is reached, the display refresh control logic is activated, the waveform database is automatically transferred to the waveform area of the display memory, and then combined with the menu data in the menu area of the display memory and sent to the LCD screen for display.
图1虚线框中部分是数字三维示波器的核心,其实现流程如图2所示。图2中所有流程均在一个FPGA中实现,其中,定时信号由微处理器发出。在一个完整软件周期中,当微处理器完成一系列如波形运算、菜单管理以及人机交互等操作并已经更新显存中菜单区域内容时,会向FPGA发出定时信号。当FPGA收到该定时信号时,会在当前采集波形映射完成之后,将波形数据库中所有信息按照地址递增的方式传输到显存波形区域中,待发送完成后,由液晶屏读出显示。The part in the dotted box in Figure 1 is the core of the digital three-dimensional oscilloscope, and its implementation process is shown in Figure 2. All the processes in Figure 2 are implemented in an FPGA, where the timing signals are sent by the microprocessor. In a complete software cycle, when the microprocessor completes a series of operations such as waveform calculation, menu management and human-computer interaction and has updated the contents of the menu area in the video memory, it will send a timing signal to the FPGA. When the FPGA receives the timing signal, it will transfer all the information in the waveform database to the waveform area of the video memory in the way of increasing the address after the current acquisition waveform mapping is completed.
两通道示波器中,由于在同一片FPGA中实现,不管当前为点映射还是矢量映射,两个通道的采集与映射是同步完成的。在定时信号到之后,同时开始各自的波形数据库数据传输,两路数据在显存端按照一定规则合成为一路数据,并存入显存波形区域中。In the two-channel oscilloscope, since it is implemented in the same FPGA, the acquisition and mapping of the two channels are completed synchronously regardless of whether it is currently a point mapping or a vector mapping. After the timing signal arrives, the data transmission of their respective waveform databases starts at the same time, and the two channels of data are synthesized into one channel of data at the video memory end according to certain rules, and stored in the video memory waveform area.
然而四通道数字示波器中,由于IO资源、逻辑资源等需求倍增,需要更多的FPGA芯片来完成四通道的采集与显示,且四个通道的采集与映射也不能够同步完成。However, in a four-channel digital oscilloscope, more FPGA chips are needed to complete the acquisition and display of the four channels due to the multiplication of IO resources and logic resources, and the acquisition and mapping of the four channels cannot be completed synchronously.
发明内容SUMMARY OF THE INVENTION
本发明的目的在于克服现有技术的不足,提供一种消除四通道数字三维示波器波形随机跳动的方法,通过设置时钟同步信号来控制四个通道的采集与映射的同步,进而有效消除显示屏上波形的随机跳动。The purpose of the present invention is to overcome the deficiencies of the prior art, and to provide a method for eliminating the random beating of a four-channel digital three-dimensional oscilloscope waveform. By setting a clock synchronization signal, the synchronization of the acquisition and mapping of the four channels is controlled, thereby effectively eliminating the display on the display screen. Random beating of the waveform.
为实现上述发明目的,本发明消除四通道数字三维示波器波形随机跳动的方法,其特征在于,包括以下步骤:In order to realize the above-mentioned purpose of the invention, the method for eliminating the random beating of the waveform of the four-channel digital three-dimensional oscilloscope according to the present invention is characterized in that, comprising the following steps:
(1)、启动四通道数字三维示波器,将四个通道显示全部打开,在显示屏上以通道1、2波形数据的同步信号Sync_sig1为参考基准,观测通道3、4的波形是否会出现随机跳动,如果通道3、4的波形出现跳动,则进入步骤(2),否则保持不变;(1) Start the four-channel digital three-dimensional oscilloscope, turn on the display of all four channels, and use the synchronization signal Sync_sig1 of the waveform data of channels 1 and 2 as a reference on the display screen to observe whether the waveforms of channels 3 and 4 appear random beats. , if the waveforms of channels 3 and 4 jump, go to step (2), otherwise keep unchanged;
(2)、消除显示屏上的波形随机跳动(2), eliminate the random beating of the waveform on the display
(2.1)、采用相同频率的时钟信号Sync_clk_R同步接收通道1、2波形数据Wave_dat1和通道3、4波形数据Wave_dat2,以及二者的同步信号Sync_sig1和Sync_sig2;(2.1), use the clock signal Sync_clk_R of the same frequency to synchronously receive the waveform data Wave_dat1 of channels 1 and 2 and the waveform data Wave_dat2 of channels 3 and 4, as well as the synchronization signals Sync_sig1 and Sync_sig2 of the two;
(2.2)、利用同步信号Sync_sig1和Sync_sig2在时钟信号Sync_clk_R同步下生成两者上升沿之间的时间间隔信号Sync_interval;(2.2), use the synchronization signals Sync_sig1 and Sync_sig2 to generate the time interval signal Sync_interval between the rising edges of the two under the synchronization of the clock signal Sync_clk_R;
(2.3)、利用时钟信号Sync_clk_R对时间间隔信号Sync_interval进行计数,得到计数值为M,即波形数据Wave_dat1超前于Wave_dat2的时间为MT,其中,T表示时钟信号Sync_clk_R的周期;(2.3), use the clock signal Sync_clk_R to count the time interval signal Sync_interval, and obtain a count value of M, that is, the time when the waveform data Wave_dat1 is ahead of Wave_dat2 is MT, where T represents the period of the clock signal Sync_clk_R;
(2.4)、根据计数得到的M值,对波形数据Wave_dat1进行延迟调整,即将Wave_dat1延迟M个时钟信号Sync_clk_R周期,以保证波形数据Wave_dat1和波形数据Wave_dat2完全对齐;(2.4) According to the M value obtained by counting, delay adjustment is performed on the waveform data Wave_dat1, that is, Wave_dat1 is delayed by M clock signal Sync_clk_R cycles to ensure that the waveform data Wave_dat1 and the waveform data Wave_dat2 are completely aligned;
(2.5)、将波形数据Wave_dat2的同步信号Sync_sig2设置为最终接收的时钟信号Sync_sig_R,再实现两路波形数据的接收,并发送至显示屏显示。(2.5) Set the synchronization signal Sync_sig2 of the waveform data Wave_dat2 as the final received clock signal Sync_sig_R, and then realize the reception of two channels of waveform data and send them to the display screen for display.
本发明的发明目的是这样实现的:The purpose of the invention of the present invention is achieved in this way:
本发明一种消除四通道数字三维示波器波形随机跳动的方法,以通道1、2波形数据的同步信号Sync_sig1为参考基准,消除通道3、4的波形随机跳动;具体的讲,先利用同步信号Sync_sig1和Sync_sig2在时钟信号Sync_clk_R的同步下生成时间间隔信号Sync_interval,再利用时钟信号Sync_clk_R对时间间隔信号Sync_interval进行计数,得到波形数据Wave_dat1超前于Wave_dat2的时间,再利用该时间对波形数据Wave_dat1进行延迟调整,并将波形数据Wave_dat2的同步信号Sync_sig2设置为最终接收的时钟信号Sync_sig_R,实现两路波形数据的接收,从而消除通道3、4的波形随机跳动。The present invention is a method for eliminating the random beating of a four-channel digital three-dimensional oscilloscope waveform. Taking the synchronization signal Sync_sig1 of the waveform data of channels 1 and 2 as a reference, the random beating of the waveform of channels 3 and 4 is eliminated. Specifically, the synchronization signal Sync_sig1 is used first. and Sync_sig2 generate the time interval signal Sync_interval under the synchronization of the clock signal Sync_clk_R, and then use the clock signal Sync_clk_R to count the time interval signal Sync_interval to obtain the time when the waveform data Wave_dat1 is ahead of the Wave_dat2, and then use the time to adjust the delay of the waveform data Wave_dat1, The synchronization signal Sync_sig2 of the waveform data Wave_dat2 is set as the finally received clock signal Sync_sig_R, so as to realize the reception of two channels of waveform data, thereby eliminating the random beating of the waveforms of channels 3 and 4.
同时,本发明一种消除四通道数字三维示波器波形随机跳动的方法还具有以下有益效果:At the same time, the method for eliminating the random beating of the waveform of the four-channel digital three-dimensional oscilloscope of the present invention also has the following beneficial effects:
(1)、本发明实现结构简单,不需要增加额外的硬件芯片,可在现有硬件平台基础上通过简单的硬件代码编程即可实现。(1) The present invention has a simple implementation structure, does not need to add additional hardware chips, and can be implemented by simple hardware code programming on the basis of an existing hardware platform.
(2)、本发明可显著消除四通道数字三维示波器波形随机抖动。通过实时准确检测来自于两个不同源的两路波形数据之间的延迟时间,并在此基础上动态调整两路波形数据之间时间对齐关系。经过调整之间,两路波形数据始终保持对齐,从而消除了波形随机抖动。(2) The present invention can significantly eliminate the random jitter of the four-channel digital three-dimensional oscilloscope waveform. It accurately detects the delay time between two channels of waveform data from two different sources in real time, and dynamically adjusts the time alignment relationship between the two channels of waveform data on this basis. After adjustment, the waveform data of the two channels are always aligned, thus eliminating random jitter of the waveform.
附图说明Description of drawings
图1是两通道数字示波器结构框图;Figure 1 is a block diagram of a two-channel digital oscilloscope;
图2是两通道数字示波器的工作流程图;Fig. 2 is the working flow chart of the two-channel digital oscilloscope;
图3是四通道数字示波器FPGA结构图;Figure 3 is a four-channel digital oscilloscope FPGA structure diagram;
图4是四通道数字示波器结构框图;Figure 4 is a structural block diagram of a four-channel digital oscilloscope;
图5是四通道波形数据传输时序图;Figure 5 is a four-channel waveform data transmission timing diagram;
图6是同步信号上升沿时间间隔测量时序图;Fig. 6 is the timing chart of the time interval measurement of the rising edge of the synchronization signal;
图7是四通道波形数据动态调整示意图。FIG. 7 is a schematic diagram of dynamic adjustment of four-channel waveform data.
具体实施方式Detailed ways
下面结合附图对本发明的具体实施方式进行描述,以便本领域的技术人员更好地理解本发明。需要特别提醒注意的是,在以下的描述中,当已知功能和设计的详细描述也许会淡化本发明的主要内容时,这些描述在这里将被忽略。The specific embodiments of the present invention are described below with reference to the accompanying drawings, so that those skilled in the art can better understand the present invention. It should be noted that, in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.
实施例Example
图3是本发明四通道数字三维示波器结构框图。FIG. 3 is a structural block diagram of a four-channel digital three-dimensional oscilloscope of the present invention.
在本实施例中,四通道数字三维示波器采用如图3所示的3片FPGA结构,其中,FPGA1与FPGA2型号相同,分别负责通道1、2和通道3、4的采集与映射,FPGA3负责接收来自于四个通道的波形数据,合成后写入显存,并控制液晶屏的显示功能。In this embodiment, the four-channel digital three-dimensional oscilloscope adopts the structure of three FPGAs as shown in FIG. 3 . Among them, FPGA1 and FPGA2 are of the same model, and are respectively responsible for the acquisition and mapping of channels 1 and 2 and channels 3 and 4, and FPGA3 is responsible for receiving The waveform data from the four channels are written into the video memory after synthesis, and the display function of the LCD screen is controlled.
系统总的触发信号由FPGA1生成,并送到FPGA2同步四个通道的信号采集。微处理器发出定时信号,FPGA1与FPGA2在完成当前采集波形的映射之后即开始将各通道波形数据库中的波形数据以相同的同步时钟频率传输到显存中。由于各通道的输入波形可能不一样,因此FPGA1和FPGA2的当前采集映射并不是同时完成。为了波形显示正常,必须要FPGA1和FPGA2中当前采集映射都完成才开始波形数据传输。如图3所示,设F1和F2分别表示定时到后FPGA1和FPGA2当前采集波形的映射完成信号,总的完成信号F=F1&F2在FPGA1中产生,并发送到FPGA2中。因此,两片FPGA都要等到F有效时才会开始各自的波形数据传输。考虑FPGA间信号传输延迟的影响,FPGA1可能会先于FPGA2判断到F有效,从而先开始波形数据传输。因此,在FPGA3中接收这两路数据时,由于存在时间差,不论采用来自于FPGA1还是FPGA2的同步信号来同步接收两路数据,都会导致两路波形数据没有对齐。The total trigger signal of the system is generated by FPGA1 and sent to FPGA2 to synchronize the signal acquisition of four channels. The microprocessor sends a timing signal, and FPGA1 and FPGA2 start to transmit the waveform data in the waveform database of each channel to the video memory at the same synchronous clock frequency after completing the mapping of the current acquisition waveform. Since the input waveform of each channel may be different, the current acquisition and mapping of FPGA1 and FPGA2 are not completed at the same time. In order to display the waveform normally, the waveform data transmission must be completed only after the current acquisition and mapping in FPGA1 and FPGA2 are completed. As shown in Figure 3, set F1 and F2 to represent the mapping completion signals of the current acquisition waveforms of FPGA1 and FPGA2 respectively after the timing is up. The total completion signal F=F1&F2 is generated in FPGA1 and sent to FPGA2. Therefore, the two FPGAs will not start their respective waveform data transmission until F is valid. Considering the influence of signal transmission delay between FPGAs, FPGA1 may judge that F is valid before FPGA2, and thus start waveform data transmission first. Therefore, when the two channels of data are received in FPGA3, due to the time difference, whether the synchronization signal from FPGA1 or FPGA2 is used to receive the two channels of data synchronously, the two channels of waveform data will not be aligned.
下面结合图4,对本发明一种消除四通道数字三维示波器波形随机跳动的方法进行详细说明,具体包括以下步骤:Below in conjunction with Fig. 4, a kind of method of eliminating the random beat of the waveform of a four-channel digital three-dimensional oscilloscope of the present invention is described in detail, and specifically comprises the following steps:
(1)、启动四通道数字三维示波器,将四个通道显示全部打开,在显示屏上以通道1、2波形数据的同步信号Sync_sig1为参考基准,观测通道3、4的波形是否会出现随机跳动,如果通道3、4的波形出现跳动,则进入步骤(2),否则保持不变;(1) Start the four-channel digital three-dimensional oscilloscope, turn on the display of all four channels, and use the synchronization signal Sync_sig1 of the waveform data of channels 1 and 2 as a reference on the display screen to observe whether the waveforms of channels 3 and 4 appear random beats. , if the waveforms of channels 3 and 4 jump, go to step (2), otherwise keep unchanged;
在本实施例中,根据图5所示的波形数据传输时,在显示屏上会观察到通道1、2的波形保持稳定显示,而通道3、4的波形则会出现随机跳动;其原因在于设计过程中通道1、2波形数据时间上超前通道3、4波形数据,同时两路波形数据之间的延迟随机。In this embodiment, according to the waveform data transmission shown in FIG. 5, the waveforms of channels 1 and 2 will be observed to be displayed stably on the display screen, while the waveforms of channels 3 and 4 will appear random beating; the reason is that During the design process, the waveform data of channels 1 and 2 are ahead of the waveform data of channels 3 and 4 in time, and the delay between the two channels of waveform data is random.
(2)、消除显示屏上的波形随机跳动(2), eliminate the random beating of the waveform on the display
(2.1)、采用相同频率的时钟信号Sync_clk_R同步接收通道1、2波形数据Wave_dat1和通道3、4波形数据Wave_dat2,以及二者的同步信号Sync_sig1和Sync_sig2;(2.1), use the clock signal Sync_clk_R of the same frequency to synchronously receive the waveform data Wave_dat1 of channels 1 and 2 and the waveform data Wave_dat2 of channels 3 and 4, as well as the synchronization signals Sync_sig1 and Sync_sig2 of the two;
(2.2)、如图6所示,利用同步信号Sync_sig1和Sync_sig2在时钟信号Sync_clk_R同步下生成两者上升沿之间的时间间隔信号Sync_interval,即当信号Sync_sig1为高电平,同时Sync_sig2为低电平时,Sync_interval有效为高,否则无效为低;(2.2) As shown in Figure 6, the time interval signal Sync_interval between the rising edges of the two is generated under the synchronization of the clock signal Sync_clk_R by using the synchronization signals Sync_sig1 and Sync_sig2, that is, when the signal Sync_sig1 is high and Sync_sig2 is low. , Sync_interval is valid as high, otherwise invalid as low;
(2.3)、利用时钟信号Sync_clk_R对时间间隔信号Sync_interval进行计数,得到计数值为M,即波形数据Wave_dat1超前于Wave_dat2的时间为MT,其中,T表示时钟信号Sync_clk_R的周期;(2.3), use the clock signal Sync_clk_R to count the time interval signal Sync_interval, and obtain a count value of M, that is, the time when the waveform data Wave_dat1 is ahead of Wave_dat2 is MT, where T represents the period of the clock signal Sync_clk_R;
在本实施例中,如图6所示,上一次波形数据接收完成后,系统将计数值清零,在当前波形数据接收过程中且Sync_interval为高电平时,对时钟信号Sync_clk_R的上升沿计数,每来一个上升沿,计数值加1,Sync_interval为低时停止计数,得到计数值为M。M即为波形数据Wave_dat1超前Wave_dat2的时钟信号Sync_clk_R周期个数。In this embodiment, as shown in FIG. 6 , after the last waveform data reception is completed, the system clears the count value. During the current waveform data reception process and Sync_interval is at a high level, the system counts the rising edge of the clock signal Sync_clk_R, Every time a rising edge comes, the count value is incremented by 1, and the count is stopped when Sync_interval is low, and the count value is M. M is the number of cycles of the clock signal Sync_clk_R of the waveform data Wave_dat1 ahead of Wave_dat2.
(2.4)、根据计数得到的M值,对波形数据Wave_dat1进行延迟调整,即将Wave_dat1延迟M个时钟信号Sync_clk_R周期,以保证波形数据Wave_dat1和波形数据Wave_dat2完全对齐;(2.4) According to the M value obtained by counting, delay adjustment is performed on the waveform data Wave_dat1, that is, Wave_dat1 is delayed by M clock signal Sync_clk_R cycles to ensure that the waveform data Wave_dat1 and the waveform data Wave_dat2 are completely aligned;
在本实施例中,如图7所示,波形数据Wave_dat1超前Wave_dat2的时间为M个时钟信号Sync_clk_R周期。为了同步二者的显示,消除通道3、4相对于通道1、2波形显示的随机跳动,根据(2.3)中测得的两路波形数据之间的延迟计数值M,在接收时钟Sync_clk_R控制下,将波形数据Wave_dat1延迟M个时钟Sync_clk_R周期,以实现两路波形数据的完全对齐。In this embodiment, as shown in FIG. 7 , the time when the waveform data Wave_dat1 leads Wave_dat2 is M cycles of the clock signal Sync_clk_R. In order to synchronize the display of the two, eliminate the random jitter of the waveform display of channels 3 and 4 relative to channels 1 and 2, according to the delay count value M between the two waveform data measured in (2.3), under the control of the receiving clock Sync_clk_R , delay the waveform data Wave_dat1 by M clock Sync_clk_R cycles to achieve complete alignment of the two channels of waveform data.
(2.5)、将波形数据Wave_dat2的同步信号Sync_sig2设置为最终接收的时钟信号Sync_sig_R,再实现两路波形数据的接收,并发送至显示屏显示。(2.5) Set the synchronization signal Sync_sig2 of the waveform data Wave_dat2 as the final received clock signal Sync_sig_R, and then realize the reception of two channels of waveform data and send them to the display screen for display.
尽管上面对本发明说明性的具体实施方式进行了描述,以便于本技术领域的技术人员理解本发明,但应该清楚,本发明不限于具体实施方式的范围,对本技术领域的普通技术人员来讲,只要各种变化在所附的权利要求限定和确定的本发明的精神和范围内,这些变化是显而易见的,一切利用本发明构思的发明创造均在保护之列。Although the illustrative specific embodiments of the present invention have been described above to facilitate the understanding of the present invention by those skilled in the art, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, As long as various changes are within the spirit and scope of the present invention as defined and determined by the appended claims, these changes are obvious, and all inventions and creations utilizing the inventive concept are included in the protection list.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4974167A (en) * | 1989-02-28 | 1990-11-27 | Tektronix, Inc. | Erasable data acquisition and storage instrument |
US20060176151A1 (en) * | 2005-02-07 | 2006-08-10 | Lecroy Corporation | Pattern trigger in a coherent timebase |
CN101136737A (en) * | 2007-07-16 | 2008-03-05 | 中兴通讯股份有限公司 | System and method for eliminating long line transmission time delay of source synchronizing signal |
CN102435809A (en) * | 2011-10-12 | 2012-05-02 | 秦轲 | Multi-channel digital oscilloscope and signal synchronization method thereof |
-
2016
- 2016-10-19 CN CN201610911269.4A patent/CN106645855B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4974167A (en) * | 1989-02-28 | 1990-11-27 | Tektronix, Inc. | Erasable data acquisition and storage instrument |
US20060176151A1 (en) * | 2005-02-07 | 2006-08-10 | Lecroy Corporation | Pattern trigger in a coherent timebase |
CN101136737A (en) * | 2007-07-16 | 2008-03-05 | 中兴通讯股份有限公司 | System and method for eliminating long line transmission time delay of source synchronizing signal |
CN102435809A (en) * | 2011-10-12 | 2012-05-02 | 秦轲 | Multi-channel digital oscilloscope and signal synchronization method thereof |
Non-Patent Citations (2)
Title |
---|
A transplantable software design method for the deep storage function of digital oscilloscope;Zeng Hao等;《2015 IEEE 12th International Conference on Electronic Measurement & Instruments》;20151231;893-898 * |
一种三维波形显示技术的研究;叶芃等;《仪器仪表学报》;20080430;第29卷(第4期);624-626 * |
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