CN101149398A - Three-dimensional waveform real-time display method and system - Google Patents
Three-dimensional waveform real-time display method and system Download PDFInfo
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Abstract
This invention discloses a kind of wave-shape real time display method and system, its method is that collects the model, sends the collected wave-shape data to the numeral image processor by the sample value memory, the numeral image processor memories the collected wave data in three-dimensional data memory array processor, and marks in the according location of the three-dimensional data memory array processor, then the display control model sends the wave data to the back end in high speed, or displays it directly; this system uses the side-by-side system structure to accomplish the wave capture and display function, it breaks through the chock point in data process aspects. This invention improves the display update ability, reduces the data collection dead zone, all of the signal detail, disconnected affair and the dynamic character of signal can be collected.
Description
Technical field
The present invention relates to waveform real-time display method and system in a kind of surveying instrument, relate in particular to three-dimensional waveform real-time display method and system in the high-speed data acquisition.
Background technology
Development along with the digital storage oscilloscope technology, the digital fluorescence oscilloscope of current top grade not only has the ability of the processing of conventional digital waveform, wave form analysis, waveform storage, more emphasized characteristics such as real-time waveform demonstration, waveform brightness degree, cooperated high sampling rate to realize catching and observing sophisticated signal, transient signal.
At present, in real time or quasi real time waveform shows, waveform brightness degree technique for displaying grasped by the Tektronix of foreign company, Agilent, and the digital storage oscilloscope ubiquity that domestic enterprise produces a main weak point: promptly their time of spending on wave capture in fact only accounts for the very little part of real-time event.When digital storage oscilloscope shows with the Velocity Updating waveform of per second 50～60 times, give the impression of quick wave capture.Actual oscillograph has been missed lot of data in acquisition procedure.For example, if digital storage oscilloscope with the scanning of 50 nanoseconds/lattice several times display frequency be the 10MHz waveform, then each display update all can show 5 cycles of this waveform, accounts for for 500 nanoseconds.Per second observation means nanosecond for 60 times 500 has used the time of 30 microseconds to catch waveform in p.s., it has only taken the time of real-time event 0.003% and has caught waveform.This almost cannot observe the rare event in the real-time event.
Traditional digital storage oscilloscope (Digital Storage Oscilloscope, be called for short DSO) adopts that the architecture of serial processing is caught, demonstration and analytic signal; As shown in Figure 2.For all oscillographs, all exist signal Processing and demonstration time, during this period of time, instrument is handled the data of gathering recently, and resetting system is waited for the arrival of next trigger event.Like this, oscillograph all can't be caught all signals that during this period of time take place, and is in the blind area of a collection.Along with signal Processing and the increase that shows the time, will reduce the possibility that views low-frequency degree and low repeated events.
Summary of the invention
The purpose of this invention is to provide a kind of three-dimensional waveform display packing and system, it has improved acquisition performance greatly by utilizing high speed three-dimensional data array storer, the data of system's output are complete three-dimensional waveform figure, and this waveform is formed by stacking by many acquired signal.
The present invention adopts following technical proposals to realize what three-dimensional waveform showed:
A kind of three-dimensional waveform real-time display method the steps include:
1) acquisition module to analog signal sampling, and is input to Digital Image Processor with the Wave data of gathering through the sample value storer under the control of microprocessor and trigger module;
2) Digital Image Processor is stored in the Wave data of gathering in the three-dimensional data storage array device, and in the enterprising row labels in the corresponding position of three-dimensional data storage array device;
3) display control module control and output are stored in Wave data in the three-dimensional data storage array device to display.
Described three-dimensional data storage array device is single port RAM three-dimensional data storage array device or dual port RAM three-dimensional data storage array device.
Digital Image Processor adopts dot pattern to draw or the arrow pattern drafting when waveform is drawn in the described method.
Digital Image Processor adopts the probabilistic manner of its appearance of record to carry out mark on the corresponding position of three-dimensional data storage array device the Wave data of mapping in the described method.
The required memory capacity of three-dimensional data storage array device is in the described method: L * 2
N* C/8 byte, wherein L is a sampling depth, and N is the resolution of acquisition module, and C is the probability that data occur.
Described display process module is changed Wave data, and the probability that occurs is converted to corresponding color, the depth of the big or small corresponding color of probability.
The triggering mode of trigger module comprises that automatic triggering or single trigger in the described method; The triggering degree of depth of trigger module comprises and postpones to trigger or pre-the triggering.
Digital Image Processor with the Wave data of mapping in the method for the enterprising row labels in the corresponding position of three-dimensional data storage array device is in the described method: Digital Image Processor directly is mapped as in the display screen corresponding pixel state information in the waveform viewing area with the data of acquisition module sampling, deposits in the three-dimensional data base of three-dimensional data array memory; Independently storage unit is all arranged in the database, and certain position in the screen is being represented in each unit.
Described simulating signal is the signal after the conditioning module conditioning.
Described microprocessor is a digital signal processor.
A kind of three-dimensional waveform real-time display system comprises: acquisition module, sample value storer, Digital Image Processor, three-dimensional data storage array device, display control module, microprocessor, trigger module, display is characterized in that
Acquisition module is connected through data line with the sample value storer respectively, is connected through signal control line with trigger module;
The sample value storer is connected through data line with Digital Image Processor respectively, is connected with signal control line through data line with trigger module;
Digital Image Processor is connected by data line with three-dimensional data storage array device respectively, is connected through signal control line with trigger module;
Three-dimensional data storage array device is connected by data line with display control module respectively, is connected through signal control line with trigger module;
Display control module is connected through data line with display;
Microprocessor is connected through data line with display respectively, is connected with data line through address bus with trigger module.
Described three-dimensional data storage array is single port RAM three-dimensional data storage array device or dual port RAM three-dimensional data storage array device.
The 3-D view processor adopts dot pattern to draw or the arrow pattern drafting when waveform is drawn in the described system.
The 3-D view processor adopts the probabilistic manner of its appearance of record to carry out mark on the corresponding position of three-dimensional data storage array the Wave data of mapping in the described system.
The required memory capacity of three-dimensional data storage array is in the described system: L * 2
N* C/8 byte, wherein L is a sampling depth, and N is the resolution of acquisition module, and C is the probability that data occur.
Described display process module is changed Wave data, and the probability that occurs is converted to corresponding color, the depth of the big or small corresponding color of probability.
The triggering mode of described trigger module comprises that automatic triggering or single trigger; The triggering degree of depth of trigger module comprises and postpones to trigger or pre-the triggering.
Described system comprises also and also comprises a trigger port and a signal condition passage that described signal condition passage is connected through signal wire with described acquisition module respectively, is connected through signal wire with described trigger port, is connected through control signal wire with trigger module; Described trigger port is connected through signal wire with described trigger module.
Described system also comprises a phaselocked loop, and described phaselocked loop is connected through signal wire with described acquisition module.
Described microprocessor is a digital signal processor.
Architecture of the present invention can be DSO unique wave capture and display capabilities is provided, and quickens reconstruction signal, and the present invention adopts parallel architecture to finish these functions, as shown in Figure 1.Acquisition module is sent into Digital Image Processor with the Wave data of gathering through the sample value storer, the sample value storer can be stored the Wave data relevant with trigger event, Digital Image Processor is stored in the Wave data of gathering on the three-dimensional data storage array device, and in the enterprising row labels in the corresponding position of three-dimensional data storage array device, again by display control module with Wave data at a high speed be sent to the rear end, or directly show.Trigger module is realized the management to sampling clock, the control (realizing postponing triggering, pre-triggering) of the triggering degree of depth etc. under microprocessor is controlled.Three-dimensional data storage array device mainly carries out the Wave data storage.Core of the present invention---Digital Image Processor (Digital GraphicProcessor, be called for short DGP)---adopt the hardware architecture of programmable logic device (PLD) to catch waveform, the waveform acquisition rate of two-forty is provided, thereby increased the possibility of the transient affair in the proof digital display circuit, the visual degree of signal is very high.Digital Image Processor is stored in the Wave data of gathering on the three-dimensional data storage array device, and in the enterprising row labels in the corresponding position of three-dimensional data storage array device, its principle is: DGP directly is mapped as in the chromatic liquid crystal screen corresponding pixel state information in the waveform viewing area with the data of acquisition module sampling, deposits in the three-dimensional data array memory; Microprocessor is with the concurrent working of DGP system, finish display management, measure automatically and equipment is regulated Control work, simultaneously, do not influence oscillographic picking rate again, and in the three dimensions shows signal: time, amplitude and be the changes in amplitude of parameter with time; Each point at the oscillograph display screen, its essence is the database of continual renovation, independently storage unit is all arranged in the three-dimensional data array memory, certain position in the screen is being represented in each unit, in case collect waveform, Wave data just is mapped in the unit group of three-dimensional data array memory; When waveform relates to this unit, inside, unit just adds monochrome information; Do not relate to then and do not add.Therefore, if the frequent inswept place of waveform, monochrome information is progressively accumulation in the unit.After the information in the three-dimensional data array memory is sent to oscillographic display screen, the ratio of the signal frequency that takes place according to each point, display screen is showed the wave regions that adds the brightness form.
Suppose that the data storage degree of depth is L (determined by the total sample number that shows the view picture waveform, can regard the length of image as) in the three-dimensional data array memory, the resolution, N (2 of acquisition module
NCan regard the wide of image as), the probability that data occur is C, then required memory capacity is: L * 2
N* C/8 byte.For example, storage depth is 500, and the resolution of acquisition module is 8, and the probability that data occur is with the numeric representation of 16 bit wides, and then shared memory capacity is: 250KByte; This 3-D view can be regarded as 500 time points on time shaft; Have 256 storage unit to form on each time point, its representative be amplitude information on this time point; Each storage unit accounts for 16, is used for representing that several waveforms are superimposed, the probability that same range value occurs.
When reality realized, the adjacent memory location in the three-dimensional data array memory was wide corresponding to 3-D view, and promptly 2
N, and drawing is by from top to bottom, and mode is from left to right carried out, then the L that ought once a gather data (its size X
iExpression, i from 0 to L-1) when entering Digital Image Processor successively in chronological order, then i row are just corresponding to X
i, processor will be according to X
iValue draw i row, X
iLine storage unit.
Since the adjacent memory location in the storer is wide by 2 corresponding to 3-D view
N, then the start address of every row is 2
NIntegral multiple, promptly the start address of i row is: 256 * i, work as X so
iWhen arriving Digital Image Processor, corresponding memory location is:
P
i＝256×i+X
i
P
i＝K
i+X
i
K wherein
i=K
I-1+ 2
N, K
0=0
In the drawing three-dimensional oscillogram, image data and when drawing again behind clear screen especially, should at first remove the content of three-dimensional data array memory, when drawing later on, it will read the former meaningful of bitmap, add 1, and the result is write back same storage unit, up to clear screen next time.Like this in screen-refresh time S once, whole acquisition system may have been gathered M screen data, this M screen data all have been added in the three-dimensional data storage array device, have preserved this waveform data points occurrence number in the time that screen once refreshes in the storage unit.If what adopt during actual the realization is that single port RAM makes three-dimensional data storage array device, then acquisition system can be closed in each screen-refresh time T, waits for that waveform display process module is with per second L * 2
NThe data transmission rate reading images of * C/8/T, more the shaped screen waveform will be changed the data that read simultaneously, and the simple probability that is about to occur is converted to corresponding color.The probability height that the corresponding waveform data points that data value is big occurs, corresponding waveform color wants dark, and the probability that the little corresponding waveform data points of data value occurs is low, corresponding waveform color is shallow.If adopted dual port RAM to make three-dimensional data storage array device when realizing, even then in waveform display process module reading images, to upgrade in the time of screen waveform, acquisition system also can work on.
Vector and some display mode corresponding to digital storage oscilloscope, when waveform is drawn, to dot pattern just only need to draw respective signal any time and the storage unit on the amplitude, and under the vector display mode, Digital Image Processor will be drawn all storage unit between the minimum and maximum value of signal corresponding in each row.
Good effect of the present invention:
The Wave data that the present invention can will store in the three-dimensional data array memory with the speed of per 1/30 second (this approximately is the prestissimo that human eyes can be awared) is directly delivered to display.Wave data is directly changed, and directly Wave data in the three-dimensional data base is copied in the video memory, both actings in conjunction, changed the bottleneck of other systems aspect data processing, consequently strengthened the display update ability, shortened the data acquisition blind area, the dynamic perfromance of signal detail, break event and signal can both be gathered.Native system can be realized continuous Wave data collection (employing dual port RAM), perhaps only screen updates pause (adopting single port RAM), therefore may reach maximum wave capture speed when gathering in real time, and not miss any trigger event.
Description of drawings
Fig. 1. theory diagram of the present invention
Fig. 2. the system chart of conventional digital storage oscilloscope
Embodiment
Architecture of the present invention can be DSO unique wave capture and display capabilities is provided, and quickens reconstruction signal, and the present invention adopts parallel architecture to finish these functions, as shown in Figure 1.It is that the A/D sampling of AT84AD001 is carried out signals collecting and sample value storage with the sample value storer that the present invention adopts atmel corp's model, it comprises acquisition module and sample value storer, resolution is 8BIT, high sampling rate is 1GSPS, data output rate can be reduced to 500MHz, its interface is supported LVDS, and microprocessor adopts a high performance digital signal processor (DSP).
And field programmable gate array (Field Programmable Gate Array, abbreviation FPGA) FPGA of the StratixIII series of employing ALTERA company, it has three kinds of models through optimizing, wherein the FPGA of StratixIII E series has strengthened storer and digital signal processor resource specially, is applicable to the application of storing and DSP has relatively high expectations.The storer that wherein contains 21Mbit, performance surpasses 600MHz, and the two-port RAM support is provided.It also supports to comprise dual data stream speed (Dual Date Rate simultaneously, be called for short DDR) at interior external dynamic random access memory (Dynamic Random-AccessMemory, be called for short DRAM) and static RAM (Static Random-Access Memory, abbreviation SRAM) interface, high speed low voltage differential interface (LVDS), phaselocked loop (PLL) Clock management.
Under the real-time sampling mode, simulating signal enters A/D sampling and sample value storer through the conditioning of front end signal conditioning passage, A/D sampling and sample value storer will be with the speed sampled signals of 1GSPS, and by the LVDS interface, deliver to Digital Image Processor with the speed of 500MHz.Simultaneously digital signal processor by the control trigger module realize to A/D sampling and sample value storer triggering mode (single automatically), trigger the control of the degree of depth (postpone trigger, the pre-triggering) etc.Data stream is sent into Digital Image Processor after passing through the A/D sampling Wave data relevant with trigger event with the sample value memory stores, the realization that the latter is real-time to the mapping of each Wave data, and (write down the number of times of its appearance in the enterprising row labels in the corresponding position of three-dimensional data storage array device, the number of times difference of record, the size that also promptly reflects waveform probability of occurrence on this position just shows as the depth of color on liquid crystal display).Owing to adopted dual port RAM to make three-dimensional data storage array device, so for display control module, just only need be during the screen waveform refreshes, with Wave data the fastest be sent to screen; Perhaps directly deliver in the peripheral high-speed memory, carry out back-end processing by digital signal processor.
Claims (20)
1. a three-dimensional waveform real-time display method the steps include:
1) acquisition module to analog signal sampling, and is input to Digital Image Processor with the Wave data of gathering through the sample value storer under the control of microprocessor and trigger module;
2) Digital Image Processor is stored in the Wave data of gathering in the three-dimensional data storage array device, and in the enterprising row labels in the corresponding position of three-dimensional data storage array device;
3) display control module control and output are stored in Wave data in the three-dimensional data storage array device to display.
2. the method for claim 1 is characterized in that described three-dimensional data storage array device is single port RAM three-dimensional data storage array device or dual port RAM three-dimensional data storage array device.
3. the method for claim 1 is characterized in that Digital Image Processor adopts dot pattern to draw or arrow pattern is drawn when waveform is drawn.
4. the method for claim 1 is characterized in that Digital Image Processor adopts the probabilistic manner of its appearance of record to carry out mark the Wave data of mapping on the corresponding position of three-dimensional data storage array device.
5. method as claimed in claim 1 or 2 is characterized in that the required memory capacity of three-dimensional data storage array device is: L * 2
N* C/8 byte, wherein L is a sampling depth, and N is the resolution of acquisition module, and C is the probability that data occur.
6. method as claimed in claim 4 is characterized in that described display process module changes Wave data, and the probability that occurs is converted to corresponding color, the depth of the big or small corresponding color of probability.
7. the method for claim 1 is characterized in that the triggering mode of trigger module comprises that automatic triggering or single trigger; The triggering degree of depth of trigger module comprises and postpones to trigger or pre-the triggering.
8. as claim 1 or 4 described methods, it is characterized in that Digital Image Processor with the Wave data of mapping in the method for the enterprising row labels in the corresponding position of three-dimensional data storage array device is: Digital Image Processor directly is mapped as in the display screen corresponding pixel state information in the waveform viewing area with the data of acquisition module sampling, deposits in the three-dimensional data base of three-dimensional data array memory; Independently storage unit is all arranged in the database, and certain position in the screen is being represented in each unit.
9. the method for claim 1 is characterized in that described simulating signal is the signal after the conditioning module conditioning.
10. the method for claim 1 is characterized in that described microprocessor is a digital signal processor.
11. a three-dimensional waveform real-time display system comprises: acquisition module, sample value storer, Digital Image Processor, three-dimensional data storage array device, display control module, microprocessor, trigger module, display is characterized in that
Acquisition module is connected through data line with the sample value storer respectively, is connected through signal control line with trigger module;
The sample value storer is connected through data line with Digital Image Processor respectively, is connected with signal control line through data line with trigger module;
Digital Image Processor is connected by data line with three-dimensional data storage array device respectively, is connected through signal control line with trigger module;
Three-dimensional data storage array device is connected by data line with display control module respectively, is connected through signal control line with trigger module;
Display control module is connected through data line with display;
Microprocessor is connected through data line with display respectively, is connected with data line through address bus with trigger module.
12. system as claimed in claim 11 is characterized in that described three-dimensional data storage array is single port RAM three-dimensional data storage array device or dual port RAM three-dimensional data storage array device.
13. system as claimed in claim 11 is characterized in that the 3-D view processor adopts dot pattern to draw or arrow pattern is drawn when waveform is drawn.
14. system as claimed in claim 11 is characterized in that the 3-D view processor adopts the probabilistic manner of its appearance of record to carry out mark the Wave data of mapping on the corresponding position of three-dimensional data storage array.
15., it is characterized in that the required memory capacity of three-dimensional data storage array is: L * 2 as claim 11 or 12 described systems
N* C/8 byte, wherein L is a sampling depth, and N is the resolution of acquisition module, and C is the probability that data occur.
16. system as claimed in claim 14 is characterized in that described display process module changes Wave data, and the probability that occurs is converted to corresponding color, the depth of the big or small corresponding color of probability.
17. system as claimed in claim 11 is characterized in that the triggering mode of described trigger module comprises that automatic triggering or single trigger; The triggering degree of depth of trigger module comprises and postpones to trigger or pre-the triggering.
18. system as claimed in claim 11, it is characterized in that also comprising a trigger port and a signal condition passage, described signal condition passage is connected through signal wire with described acquisition module respectively, is connected through signal wire with described trigger port, is connected through control signal wire with trigger module; Described trigger port is connected through signal wire with described trigger module.
19. system as claimed in claim 11 is characterized in that also comprising a phaselocked loop, described phaselocked loop is connected through signal wire with described acquisition module.
20. system as claimed in claim 11 is characterized in that described microprocessor is a digital signal processor.
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| CN108572290B (en) * | 2017-03-09 | 2024-01-02 | 基思利仪器有限责任公司 | Parallel trigger model for test and measurement instrument |
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| CN107478884B (en) * | 2017-04-28 | 2019-08-13 | 深圳市鼎阳科技有限公司 | A kind of method and oscillograph of quick display waveform search result |
| CN109165171A (en) * | 2018-08-10 | 2019-01-08 | 电子科技大学 | Adaptive fast digital waveform imaging method |
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| CN110824218A (en) * | 2019-11-18 | 2020-02-21 | 重庆邮电大学 | Digital storage oscilloscope system based on ZYNQ |
| CN110824218B (en) * | 2019-11-18 | 2022-03-22 | 重庆邮电大学 | Digital storage oscilloscope system based on ZYNQ |
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