CN106645855A - Method for eliminating waveform random jumps of four-channel digital three-dimensional oscilloscope - Google Patents
Method for eliminating waveform random jumps of four-channel digital three-dimensional oscilloscope Download PDFInfo
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- CN106645855A CN106645855A CN201610911269.4A CN201610911269A CN106645855A CN 106645855 A CN106645855 A CN 106645855A CN 201610911269 A CN201610911269 A CN 201610911269A CN 106645855 A CN106645855 A CN 106645855A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R13/02—Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
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Abstract
The invention discloses a method for eliminating waveform random jumps of a four-channel digital three-dimensional oscilloscope, which is characterized in that waveform random jumps of a channel 3 and a channel 4 are eliminated by taking a synchronization signal Sync_sig1 of waveform data of a channel 1 and a channel 2 as a reference datum. Specifically, firstly the synchronization signal Sync_sig1 and a synchronization signal Sync_sig2 are utilized to generate time interval signals Sync_interval under synchronization of a clock signal Sync_clk_R, then counting is performed on the time interval signals Sync_interval by using the clock signal Sync_clk_R so as to acquire the time of waveform data Wave_dat1 ahead of waveform data Wave_dat2, then delay adjustment is performed on the waveform data Wave_dat1 by using the time, the synchronization signal Sync_sig2 of the waveform data Wave_dat2 is set to be a finally received clock signal Sync_sig_R, reception of two paths of waveform data is realized, and thus the waveform random jumps of the channel 3 and the channel 4 are eliminated.
Description
Technical field
The invention belongs to digital oscilloscope technical field, more specifically, is related to a kind of elimination four-way digital three-dimensional
The method of waveform randomized jitter.
Background technology
Digital three-dimensional oscillograph is carried out by the waveform that its rapidly and efficiently parallel processing architecture realization obtains multi collect
Multiple stacking, the number of times that real time record signal occurs in different amplitudes and moment position, by this information according to certain during display
Proportional relationship is converted into the luminance information of waveform color on liquid crystal display screen.Therefore, user is in the digital three-dimensional oscilloscope of operation
Can judge that input signal occurs in some amplitudes or moment position by the depth of display waveform color on screen general
Rate.
In digital three-dimensional oscillograph as shown in Figure 1, analogue signal is sampled after signal condition passage through ADC,
And sampling output is stored in acquisition memory.After memory storage is completed, that is, after completing once to gather, by memorizer
Stored data sequential reads out, and sampled data is mapped to into the Wave data corresponding with LCD screen dot matrix in parallel coprocessor
Storehouse, starts again the collection and mapping of a new round after the completion of mapping.It is real-time in waveform database through multi collect and mapping
It is cumulative have recorded that input signal in different amplitudes and moment position (or in waveform database difference memory element) occurs time
Number；At the same time, microprocessor carries out the work such as waveform computing, menu management and man-machine interaction.When arrival liquid crystal display screen timing
During refresh time, start and show refresh control logic, be automatically transferred to waveform database in display-memory wave regions, so
Afterwards with display-memory menu area in menu data be combined after be sent to liquid crystal display screen and show.
It is partly the oscillographic core of digital three-dimensional in Fig. 1 dotted line frames, it realizes that flow process is as shown in Figure 2.All streams in Fig. 2
Cheng Jun realizes in a FPGA, wherein, timing signal is sent by microprocessor.In a complete software cycle, when micro- place
Reason device completes a series of computing of such as waveforms, menu management and man-machine interaction operation and has been updated in video memory in menu area
Rong Shi, can send timing signal to FPGA.When FPGA receives the timing signal, it can be completed in current collection waveform mapping
Afterwards, by all information in waveform database according to address be incremented by mode be transferred in video memory wave regions, it is to be sent after the completion of,
Read by liquid crystal display screen and shown.
In two oscilloscope channels, due to realizing in a piece of FPGA, no matter current map or vector mapping for point, and two
The collection of individual passage is synchronously completed with mapping.After timing signal is arrived, respective Wave data database data is started simultaneously at
Transmission, two paths of data is a circuit-switched data according to certain ruled synthesis at video memory end, and is stored in video memory wave regions.
But in four-way digital oscilloscope, due to the multiplication of the demands such as I/O resource, logical resource, need more FPGA cores
Piece is completing the collection of four-way and show, and the collection of four passages can not be synchronously completed with mapping.
The content of the invention
It is an object of the invention to overcome the deficiencies in the prior art, there is provided one kind eliminates four-way digital three-dimensional oscillograph ripple
The method of shape randomized jitter, synchronous, the Jin Eryou of collection with the mapping of four passages is controlled by arranging clock sync signal
Effect eliminates the randomized jitter of waveform on display screen.
For achieving the above object, the method that the present invention eliminates four-way digital three-dimensional waveform randomized jitter,
Characterized in that, comprising the following steps：
(1), start four-way digital three-dimensional oscillograph, four passages are shown into fully open, on a display screen with passage
1st, synchronizing signal Sync_sig1 of 2 Wave datas is basis reference, and whether the waveform for observing passage 3,4 occurs randomized jitter,
If bounce occurs in the waveform of passage 3,4, into step (2), otherwise keep constant；
(2) the waveform randomized jitter on display screen, is eliminated
(2.1), using clock signal Sync_clk_R synchronization receiving channel 1, the 2 Wave data Wave_ of same frequency
Dat1 and passage 3,4 Wave data Wave_dat2, and synchronizing signal Sync_sig1 and Sync_sig2 of the two；
(2.2), generated under the synchronization of clock signal Sync_clk_R using synchronizing signal Sync_sig1 and Sync_sig2
Time interval signal Sync_interval between both rising edges；
(2.3), time interval signal Sync_interval is counted using clock signal Sync_clk_R, is obtained
Count value is M, i.e. Wave data Wave_dat1 be ahead of Wave_dat2 time be MT, wherein, T represents clock signal
The cycle of Sync_clk_R；
(2.4), according to the M values for counting to get, delay adjustment is carried out to Wave data Wave_dat1, will Wave_dat1
Postpone M clock signal Sync_clk_R cycle, it is complete to ensure Wave data Wave_dat1 and Wave data Wave_dat2
Alignment；
(2.5), synchronizing signal Sync_sig2 of Wave data Wave_dat2 is set to the clock signal of final reception
Sync_sig_R, then realize the reception of two-way Wave data, and send to display screen and show.
What the goal of the invention of the present invention was realized in：
A kind of method for eliminating four-way digital three-dimensional waveform randomized jitter of the present invention, with passage 1,2 waveform numbers
According to synchronizing signal Sync_sig1 be basis reference, eliminate passage 3,4 waveform randomized jitter；Concretely, first with synchronization
Signal Sync_sig1 and Sync_sig2 generates time interval signal Sync_ under the synchronization of clock signal Sync_clk_R
Interval, recycles clock signal Sync_clk_R to count time interval signal Sync_interval, obtains waveform
Data Wave_dat1 are ahead of the time of Wave_dat2, recycle the time to carry out delay tune to Wave data Wave_dat1
It is whole, and synchronizing signal Sync_sig2 of Wave data Wave_dat2 is set to into clock signal Sync_sig_ of final reception
R, realizes the reception of two-way Wave data, so as to eliminate the waveform randomized jitter of passage 3,4.
Meanwhile, a kind of method for eliminating four-way digital three-dimensional waveform randomized jitter of the present invention also has with following
Beneficial effect：
(1), the present invention realizes simple structure, it is not necessary to increase extra hardware chip, can be in existing hardware platform base
It is upper to be capable of achieving by the programming of simple hardware identification code.
(2), the present invention can substantially eliminate four-way digital three-dimensional waveform randomized jitter.By accurately detection in real time
Come from the time delay between two not homologous two-way Wave datas, and dynamic adjustment two-way Wave data on this basis
Between time unifying relation.Between being adjusted, two-way Wave data remains alignment, trembles at random so as to eliminate waveform
It is dynamic.
Description of the drawings
Fig. 1 is two passages numeral oscilloscope architecture block diagram；
Fig. 2 is the oscillographic workflow diagram of two passages numeral；
Fig. 3 is four-way digital oscilloscope FPGA structure figure；
Fig. 4 is four-way digital oscilloscope structured flowchart；
Fig. 5 is four-way Wave data transmission time sequence figure；
Fig. 6 is synchronizing signal rising time interval measurement sequential chart；
Fig. 7 is four-way Wave data dynamic adjustment schematic diagram.
Specific embodiment
The specific embodiment of the present invention is described below in conjunction with the accompanying drawings, so as to those skilled in the art preferably
Understand the present invention.Requiring particular attention is that, in the following description, when known function and design detailed description perhaps
When can desalinate the main contents of the present invention, these descriptions will be ignored here.
Embodiment
Fig. 3 is four-way digital three-dimensional oscilloscope architecture block diagram of the present invention.
In the present embodiment, four-way digital three-dimensional oscillograph adopts 3 FPGA structures as shown in Figure 3, wherein,
FPGA1 is identical with FPGA2 models, is each responsible for the collection and mapping of passage 1,2 and passage 3,4, and FPGA3 is responsible for reception and comes from
The Wave data of four passages, writes video memory after synthesis, and controls the display function of liquid crystal display screen.
The total trigger of system is generated by FPGA1, and is sent to the signals collecting of synchronous four passages of FPGA2.Microprocessor
Device sends timing signal, and FPGA1 and FPGA2 starts each passage Wave data after the mapping for completing currently to gather waveform
Wave data in storehouse is transferred in video memory with identical synchronised clock frequency.Because the input waveform of each passage may differ
Sample, therefore the current collection mapping of FPGA1 and FPGA2 is not while completing.In order to waveform shows normally, it is necessary to FPGA1
All complete just to start Wave data transmission with current collection mapping in FPGA2.As shown in figure 3, setting F1 and F2 represents respectively timing
The mapping for currently gathering waveform to rear FPGA1 and FPGA2 completes signal, and total signal F=F1＆F2 that completes is produced in FPGA1,
And be sent in FPGA2.Therefore, two panels FPGA just will can start respective Wave data transmission until F is effective.Consider
The impact of signal transmission delay between FPGA, FPGA1 may determine F effectively prior to FPGA2, pass so as to first start Wave data
It is defeated.Therefore, when this two paths of data is received in FPGA3, due to existence time it is poor, no matter using coming from FPGA1 or FPGA2
Synchronizing signal come it is synchronous receive two paths of data, can all cause two-way Wave data not align.
With reference to Fig. 4, the method for eliminating four-way digital three-dimensional waveform randomized jitter a kind of to the present invention is entered
Row is described in detail, specifically includes following steps：
(1), start four-way digital three-dimensional oscillograph, four passages are shown into fully open, on a display screen with passage
1st, synchronizing signal Sync_sig1 of 2 Wave datas is basis reference, and whether the waveform for observing passage 3,4 occurs randomized jitter,
If bounce occurs in the waveform of passage 3,4, into step (2), otherwise keep constant；
In the present embodiment, when the Wave data according to Fig. 5 is transmitted, passage 1,2 can be observed on a display screen
Waveform keeps stable and shows, and the waveform of passage 3,4 then occurs randomized jitter；Its reason is passage 1,2 in design process
Wave data time upper advanced passage 3,4 Wave datas, while the delay between two-way Wave data is random.
(2) the waveform randomized jitter on display screen, is eliminated
(2.1), using clock signal Sync_clk_R synchronization receiving channel 1, the 2 Wave data Wave_ of same frequency
Dat1 and passage 3,4 Wave data Wave_dat2, and synchronizing signal Sync_sig1 and Sync_sig2 of the two；
(2.2), as shown in fig. 6, using synchronizing signal Sync_sig1 and Sync_sig2 in clock signal Sync_clk_R
The synchronous lower time interval signal Sync_interval generated between both rising edges, i.e., when signal Sync_sig1 is high electricity
It is flat, it is otherwise invalid for low while when Sync_sig2 is low level, Sync_interval is effectively height；
(2.3), time interval signal Sync_interval is counted using clock signal Sync_clk_R, is obtained
Count value is M, i.e. Wave data Wave_dat1 be ahead of Wave_dat2 time be MT, wherein, T represents clock signal
The cycle of Sync_clk_R；
In the present embodiment, as shown in fig. 6, after last Wave data is finished receiving, system resets count value, working as
During front Wave data is received and when Sync_interval is high level, the rising edge meter to clock signal Sync_clk_R
Number, often carrys out a rising edge, and count value adds 1, stops counting when Sync_interval is low, obtains count value for M.M is ripple
The clock signal Sync_clk_R number of cycles of the advanced Wave_dat2 of graphic data Wave_dat1.
(2.4), according to the M values for counting to get, delay adjustment is carried out to Wave data Wave_dat1, will Wave_dat1
Postpone M clock signal Sync_clk_R cycle, it is complete to ensure Wave data Wave_dat1 and Wave data Wave_dat2
Alignment；
In the present embodiment, as shown in fig. 7, the time of the advanced Wave_dat2 of Wave data Wave_dat1 is M clock
The signal Sync_clk_R cycles.For the display of both synchronizations, eliminate passage 3,4 relative to passage 1,2 waveforms show it is random
Bounce, according to delay count value M between the two-way Wave data measured in (2.3), is receiving clock Sync_clk_R controls
Under, Wave data Wave_dat1 is postponed into M clock Sync_clk_R cycle, to realize the perfectly aligned of two-way Wave data.
(2.5), synchronizing signal Sync_sig2 of Wave data Wave_dat2 is set to the clock signal of final reception
Sync_sig_R, then realize the reception of two-way Wave data, and send to display screen and show.
Although being described to illustrative specific embodiment of the invention above, in order to the technology of the art
Personnel understand the present invention, it should be apparent that the invention is not restricted to the scope of specific embodiment, the common skill to the art
For art personnel, as long as various change is in the spirit and scope of the present invention of appended claim restriction and determination, these
Change is it will be apparent that all utilize the innovation and creation of present inventive concept in the row of protection.
Claims (3)
1. it is a kind of eliminate four-way digital three-dimensional waveform randomized jitter method, it is characterised in that comprise the following steps：
(1), start four-way digital three-dimensional oscillograph, four passages are shown into fully open, on a display screen with passage 1,2 ripples
Synchronizing signal Sync_sig1 of graphic data is basis reference, and whether the waveform for observing passage 3,4 occurs randomized jitter, if
There is bounce in the waveform of passage 3,4, then into step (2), otherwise keep constant；
(2) the waveform randomized jitter on display screen, is eliminated
(2.1), using same frequency clock signal Sync_clk_R synchronization receiving channel 1,2 Wave data Wave_dat1 and
Passage 3,4 Wave data Wave_dat2, and synchronizing signal Sync_sig1 and Sync_sig2 of the two；
(2.2), two are generated under the synchronization of clock signal Sync_clk_R using synchronizing signal Sync_sig1 and with Sync_sig2
Time interval signal Sync_interval between person's rising edge；
(2.3), time interval signal Sync_interval is counted using clock signal Sync_clk_R, is counted
Be worth for M, i.e. Wave data Wave_dat1 be ahead of Wave_dat2 time be MT, wherein, T represents clock signal Sync_
The cycle of clk_R；
(2.4), according to the M values for counting to get, delay adjustment is carried out to Wave data Wave_dat1, will Wave_dat1 delays
It is M clock signal Sync_clk_R cycle, perfectly aligned to ensure Wave data Wave_dat1 and Wave data Wave_dat2；
(2.5), by the synchronizing signal Sync_sig2 setting of Wave data Wave_dat2 and clock signal Sync_ of Wave data
Sig_R, then realize the reception of two-way Wave data, and send to display screen and show.
2. a kind of method for eliminating four-way digital three-dimensional waveform randomized jitter according to claim 1, it is special
Levy and be, the generation method of described time interval signal Sync_interval is：
When clock Sync_clk_R to when, if signal Sync_sig1 is high level, while when Sync_sig2 is low level,
Then Sync_interval is high flat effective, is otherwise Low level effective.
3. a kind of method for eliminating four-way digital three-dimensional waveform randomized jitter according to claim 1, it is special
Levy and be, in the step (2.3), time interval signal Sync_interval is carried out using clock signal Sync_clk_R
The method of counting is：1) after, last Wave data is finished receiving, system resets count value；2), connect in current form data
During receipts and when Sync_interval is high level, the rising edge of clock signal Sync_clk_R is counted, often come on one
Edge is risen, count value adds 1, stop counting when Sync_interval is low level.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108874296A (en) * | 2018-06-21 | 2018-11-23 | 电子科技大学 | A kind of three-dimensional waveform mapping method based on parallel architecture |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108874296A (en) * | 2018-06-21 | 2018-11-23 | 电子科技大学 | A kind of three-dimensional waveform mapping method based on parallel architecture |
| CN108874296B (en) * | 2018-06-21 | 2021-01-26 | 电子科技大学 | Three-dimensional waveform mapping method based on parallel architecture |
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