CN103944660B - Clock synchronization device and method - Google Patents
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- CN103944660B CN103944660B CN201310019630.9A CN201310019630A CN103944660B CN 103944660 B CN103944660 B CN 103944660B CN 201310019630 A CN201310019630 A CN 201310019630A CN 103944660 B CN103944660 B CN 103944660B
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Abstract
The present invention provides a kind of clock synchronization device and method, is applied to include in the clock synchronization device of clock source radio frequency front-end device and radio frequency front-end device to be synchronized, and described method includes the step of system initialization；The step of clock source radio frequency front-end device and radio frequency front-end device switching clock value to be synchronized；Radio frequency front-end device to be synchronized processes data and produces the step of correction value；And radio frequency front-end device to be synchronized is according to the step of correction value calibration local clock.The clock synchronization device of the present invention and method, use the clock signal of clock source radio-frequency front-end equipment to calibrate the clock signal of radio-frequency front-end equipment to be synchronized, it is possible to low cost, the high-precision time synchronized realized between radio-frequency front-end equipment.
Description
Technical field
The present invention relates to the Time synchronization technique in a kind of software radio, particularly relate to a kind of clock synchronization device and method.
Background technology
Along with the development of the change of people's demand and communication technology, occur in that various radio communication standard and corresponding communication equipment, in order to meet the intercommunication problem of equipment, shorten the construction cycle, reduce development cost, there has been proposed the concept of software radio.The core concept of software radio is that structure one has general hardware platform open, standardized, modular, is realized on this hardware platform by software by various communication functions.Owing to hardware platform constantly can be upgraded along with the development of device, simultaneously can realizing new communication function by increasing the mode changing software, the concept of software radio receives significant attention.The concept of virtual radio is that V.Bose in 1999 et al. proposes, and its target is to replace the dedicated devices digital signal processing to complete in radio communication with the computing capability of general purpose computer.Compared with the software radio based on Special Purpose Programmable device architectures, virtual radio system has that development cost is low, the cycle is short, upgrading is quick, the feature of flexible configuration, the wireless network of existing various modes can be supported, it is also possible to support following network schemer by extending design.It it is the software radio of " software implementation " more.
In virtual radio system, it is desirable to each comprising modules time synchronized.Currently mainly adopt and set clock source in systems, realize synchronizing by the mode of tranmitting data register synch command, but because there is propagation delay time, the lock in time that unit to be synchronized receives is not accurate enough, and based on bus (such as high-speed PCI E bus) though propagation delay time between two fixing nodes neither one determine value, it is seen that this synchronous method precision is not high enough.
Currently also occur in that a kind of high-precision Time Synchronizing, but the program needs to arrange the synchronizer of such as GPS receiver, for sending lock in time to the unit to be synchronized of each in system by special circuit so that each unit to be synchronized is able to receive that accurate lock in time；Changing scheme and can also be respectively provided with GPS in each unit to be synchronized, unit to be synchronized completes exact time synchronization by GPS, but relatively costly.
Summary of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of clock synchronization device and method, the problem such as be used for solving in prior art between clock source and equipment to be synchronized synchronization accuracy not high enough and relatively costly.
For achieving the above object and other relevant purposes, the present invention provides a kind of clock synchronization device, including: clock source radio frequency front-end device, comprising: the first clock source, it is provided that System Clock Reference signal pulse；First clock register, the System Clock Reference signal pulse provided according to described clock source produces local reference clock；Time data generator, continues to capture the low level of the described local reference clock of current time, and produces time data according to the frequency preset；Time data bag sending module, time data described in persistent collection, and reaching prefixed time interval, the time data collected is sent to target device；Packet receives feedback module, request data package during in order to receive pair, and sends feedback data packet after an interval preset to target device；And radio frequency front-end device to be synchronized, comprising: second clock source, it is provided that local adjustable clock signal pulse；Second clock depositor, the local adjustable clock signal pulse provided according to described second clock source produces local clock；Packet transceiver module, during in order to send when receiving the time data that described time data bag sending module sends pair, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock, and receive the feedback data packet that described packet reception feedback module feeds back, and the moment of reception is recorded as the second local clock；Time calibration measures generator, reads the time data of described packet transceiver module reception and first, second local clock of record, calculates clock frequency correcting value and local clock correcting value calibrates described second clock source and second clock depositor.
Preferably, measure generator described time calibration to include: collecting unit, continue first, second local clock of time data and the record reading the reception of described packet transceiver module, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；Clock frequency correction amount calculating unit, calculate the difference of described first local clock collection and described time data collection and obtain the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value；Local clock correction amount calculating unit, calculate the difference of described second local clock collection and described first local clock collection and obtain the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value；And correction unit, calibrate described second clock source and second clock depositor according to the described clock frequency correcting value calculated and local clock correcting value.
The present invention also provides for a kind of clock synchronizing method, it is applied to include in the clock synchronization device of clock source radio frequency front-end device and radio frequency front-end device to be synchronized, comprising the following steps: system initialization, the bit wide of predetermined time data, the frequency of System Clock Reference signal pulse, the transmission time interval of time data and time adjustment amount produce interval；Described clock source radio frequency front-end device continues to capture the low level of the local reference clock of current time, and produces time data according to the frequency preset, and sends the time data collected to described radio frequency front-end device to be synchronized reaching prefixed time interval；When described radio frequency front-end device to be synchronized sends when receiving the time data of transmission pair, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock；The request data package during reception pair of described clock source radio frequency front-end device, and after an interval preset, send feedback data packet extremely described radio frequency front-end device to be synchronized；Described radio frequency front-end device to be synchronized receives the feedback data packet of feedback, and the moment of reception is recorded as the second local clock；And described radio frequency front-end device to be synchronized reads first, second local clock of time data and record, calculate clock frequency correcting value and local clock correcting value calibrates the local clock of described radio frequency front-end device to be synchronized.
Preferably, the described method calculating clock frequency correcting value and local clock correcting value comprises the following steps: persistently read first, second local clock of time data and record, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；Calculate the difference of described first local clock collection and described time data collection and obtain the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value；Simultaneously, calculate the difference of described second local clock collection and described first local clock collection and obtain the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value；And the local clock of described radio frequency front-end device to be synchronized is calibrated according to the described clock frequency correcting value calculated and local clock correcting value.
As it has been described above, the clock synchronization device of the present invention and method, the clock signal of clock source radio-frequency front-end equipment is used to calibrate the clock signal of radio-frequency front-end equipment to be synchronized, it is possible to low cost, the high-precision time synchronized realized between radio-frequency front-end equipment.Accompanying drawing explanation
Fig. 1 is shown as the composition frame chart of the clock synchronization device of the present invention.
Fig. 2 is shown as the theory diagram of the clock synchronization device of the present invention.
Fig. 3 is shown as in the clock synchronization device of the present invention measuring the theory diagram of generator time calibration.
Fig. 4 is shown as the flow chart of the clock synchronizing method of the present invention.
Fig. 5 is shown as in the clock synchronizing method of the present invention flow chart of concrete calibration.
Element numbers explanation
1 clock source radio frequency front-end device
11 first clock sources
12 first clock registers
13 time data generators
14 time data bag sending modules
15 packets receive feedback module
16 first bus ports
2 radio frequency front-end devices to be synchronized
21 second clock sources
22 second clock depositors
23 packet transceiver modules
24 time calibrations measured generator
241 collecting units
242 clock frequency correction amount calculating unit
243 local clock correction amount calculating unit
244 correction unit
25 second bus ports
S1 ~ S6 step
S61 ~ S63 step
Detailed description of the invention
Below by way of specific instantiation, embodiments of the present invention being described, those skilled in the art the content disclosed by this specification can understand other advantages and effect of the present invention easily.The present invention can also be carried out by additionally different detailed description of the invention or apply, and the every details in this specification based on different viewpoints and application, can also carry out various modification or change under the spirit without departing from the present invention.
It should be noted that, the diagram provided in the present embodiment only illustrates the basic conception of the present invention in a schematic way, then assembly that in graphic, only display is relevant with the present invention but not component count when implementing according to reality, shape and size drafting, during its actual enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its assembly layout kenel is likely to increasingly complex.
Embodiment one
Refer to Fig. 1 and Fig. 2, Fig. 1 is shown as the composition frame chart of the clock synchronization device of the present invention, Fig. 2 is shown as the theory diagram of the clock synchronization device of the present invention, as shown in the figure, the present invention provides a kind of clock synchronization device, including: clock source radio frequency front-end device 1, and at least one radio frequency front-end device to be synchronized 2.In actual embodiment, described clock source radio frequency front-end device 1 is connected with described radio frequency front-end device 2 to be synchronized by bus, specifically, described clock source radio frequency front-end device 1 also includes the first bus port 16, described radio frequency front-end device to be synchronized 2 also includes the second bus end 25, described first bus port 16 is connected to described second bus port 25 by bus, and described bus 3 is such as PCIE bus, HyperTransport bus or IntelQuickPathInterconnect bus.In the present embodiment, described clock source radio frequency front-end device 1 is connected with described radio frequency front-end device 2 to be synchronized by high-speed PCI E bus 3.
It should be strongly noted that for convenience of setting forth principles of the invention and effect, in embodiment described later, illustrate for a clock source radio frequency front-end device and a radio frequency front-end device to be synchronized temporarily.
Described clock source radio frequency front-end device 1 includes: the first clock source 11, the first clock register 12, time data generator 13, time data bag sending module 14, and packet receives feedback module 15.
Described first clock source 11 provides System Clock Reference signal pulse；In the present embodiment, for instance frequency is the System Clock Reference signal pulse of 100MHz.
Described first clock register 12 produces local reference clock according to the System Clock Reference signal pulse that described clock source provides；In the present embodiment, the System Clock Reference signal pulse that the first clock register 12 provides according to described clock source produces 64bits this locality reference clock.
Described time data generator 13 continues to capture the low level of the described local reference clock of current time, and produces time data according to the frequency preset；In the present embodiment, described time data generator 13 continues to capture the low level of the described local reference clock of current time, and every 10 to 10000 deuterzooid ground pulse reference clocks produce time datas, such as, described time data generator 13 produces the time data t0 that length is 32bits, time data generator 13 by the interval specified such as every 100 clock pulses once, intercepts the low 32bits position of reference clock, current time this locality as time data t0.
Time data described in described time data bag sending module 14 persistent collection, and reaching prefixed time interval, the time data collected is sent to target device；In the present embodiment, time data described in described time data bag sending module persistent collection, and every for the time data collected 10 to 10000 deuterzooid ground pulse reference clocks are sent once to target device, described target device is radio frequency front-end device 2 to be synchronized.Such as, time data t0 is sent to described radio frequency front-end device 2 to be synchronized by described time data bag sending module 14 by high-speed PCI E bus 3, and the transmission time interval of described time data t0 is that every 100 deuterzooid ground pulse reference clocks send once.
Request data package when described packet receives feedback module 15 in order to receive pair, and after an interval preset, send feedback data packet to target device；In the present embodiment, described packet receives when feedback module 15 receives pair and to send feedback data packet to described radio frequency front-end device 2 to be synchronized at often 10 to 10000 deuterzooid ground pulse reference clocks after request data package.Such as, described packet receives when feedback module 15 receives pair and to send feedback data packet to described radio frequency front-end devices 2 to be synchronized at every 100 deuterzooid ground pulse reference clocks after request data package.
Described radio frequency front-end device to be synchronized 2, comprising: second clock source 21, second clock depositor 22, packet transceiver module 23, and measure generator 24 time calibration.
Described second clock source 21 provides local adjustable clock signal pulse；In the present embodiment, the local adjustable clock signal pulse that described second clock source 21 provides, being such as 100MHz clock signal, wherein the frequency of clock signal pulse can adjust according to clock frequency correcting value T1, and the initial frequency errors in described second clock source 21 is generally less than 50ppm.
The local adjustable clock signal pulse that described second clock depositor 22 provides according to described second clock source 21 produces local clock；In the present embodiment, the local adjustable clock signal pulse that described second clock depositor 22 provides according to described second clock source 21 produces 64bits local clock.
When described packet transceiver module 23 is in order to send when receiving the time data that described time data bag sending module 14 sends pair, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock, and receive the feedback data packet that described packet reception feedback module 15 feeds back, and the moment of reception is recorded as the second local clock；In the present embodiment, the first local clock is designated as t1, and the second local clock is designated as t2.Described packet transceiver module 23 receives time data t0 by high-speed PCI E bus 3, when sending immediately after receiving time information data t0 pair, request data package is to clock source radio-frequency front-end equipment, and record the first local clock t1 of delivery time, but also the second local clock of the record feedback data packet that receives clock source radio-frequency front-end equipment feedback is designated as t2.
Measure generator 24 described time calibration and read the time data of described packet transceiver module 23 reception and first, second local clock of record, calculate clock frequency correcting value and local clock correcting value calibrates described second clock source 21 and second clock depositor 22.Refer to Fig. 3, it is shown as in the clock synchronization device of the present invention measuring time calibration the theory diagram of generator, as shown in the figure, in the present embodiment, measure generator 24 described time calibration to include: collecting unit 241, clock frequency correction amount calculating unit 242, local clock correction amount calculating unit 243, and correction unit 244.
Described collecting unit 241 continues first, second local clock of time data and the record reading the reception of described packet transceiver module 23, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；nullDescribed collecting unit 241 continues the first of time data and the record reading the reception of described packet transceiver module 23、Second local clock，And according to prefixed time interval, 10 to 10000 time datas read are packaged into time data collection，And 10 to 10000 times first by record、Second local clock is packaged into the first local clock collection and the second local clock collection，Such as，Described collecting unit 241 continues the first local clock t1 of time data t0 and the record reading the reception of described packet transceiver module 23、Second local clock t2，And according to prefixed time interval, 100 time datas read are packaged into time data collection [t0]，And 100 the first local clock t1 by record、Second local clock t2 is packaged into the first local clock collection [t1] and the second local clock collection [t2].
Described clock frequency correction amount calculating unit 242 calculates the difference of described first local clock collection and described time data collection and obtains the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.In the present embodiment, described clock frequency correction amount calculating unit 242 calculates the difference of described first local clock collection and described time data collection and obtains the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the plurality of difference be the first difference subset, and the average calculating this first difference subset is the first average, the first average adding up 1 to 10000 time is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.
Such as, described clock frequency correction amount calculating unit 242 calculates the difference of described first local clock collection [t1] and described time data collection [t0] and obtains the first difference collection ([t1]-[t0]), capture in described first difference collection ([t1]-[t0]) 16 minimum differences and to calculate these 16 differences be the first difference subset, and the average calculating the first difference subset that this is 16 differences is the first average X, the the first average X adding up 10 times is stored as the first average collection Z, the difference calculating current first average X and the first average collection Z is designated as W, i.e. (X-Z)/10000=W, and carry out Filtering Processing acquisition clock frequency correcting value.More specifically, in an embodiment, select first-order IIR low-pas ripple device, filter coefficient takes 0.01, and W is filtered, and filtering is output as U, and finally output U is as clock frequency correcting value T1.So, it is not limited to this, in practice, different parameters can be chosen, for instance the starting stage, the frequency difference between radio-frequency front-end equipment to be synchronized and clock source radio-frequency front-end equipment is very big according to the stage synchronized, at this moment less R, K, L, bigger filter coefficient can be chosen；After frequency is basicly stable, for the precision synchronized, it is possible to select bigger R, K, L and less filter coefficient.
Described local clock correction amount calculating unit 243 calculates the difference of described second local clock collection and described first local clock collection and obtains the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.
In the present embodiment, described local clock correction amount calculating unit 243 calculates the difference of described second local clock collection and described first local clock collection and obtains the second difference collection, capturing described second difference concentrates minimum multiple differences to be the second difference subset, and the average calculating this second difference subset is the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.
Such as, described local clock correction amount calculating unit 243 calculates the difference of described second local clock collection [t2] and described first local clock collection [t1] and obtains the second difference collection ([t2]-[t1]), capturing 16 minimum differences in described second difference collection ([t2]-[t1]) is the second difference subset, and the average calculating 16 differences that this is the second difference subset is the second average Y, it is filtered described second average Y processing and obtains filter value V, calculate 1/2nd of described filter value V, i.e. V/2, obtain described local clock correcting value T2.More specifically, in an embodiment, select first-order IIR low-pas ripple device, filter coefficient takes 0.01, is filtered described second average Y processing, calculates 1/2nd of described filter value V, i.e. V/2, it is thus achieved that described local clock correcting value T2.So, it is not limited to this, in practice, different parameters can be chosen, for instance the starting stage, the frequency difference between radio-frequency front-end equipment to be synchronized and clock source radio-frequency front-end equipment is very big according to the stage synchronized, at this moment less R, K, L, bigger filter coefficient can be chosen；After frequency is basicly stable, for the precision synchronized, it is possible to select bigger R, K, L and less filter coefficient.
Described correction unit 244 calibrates described second clock source 21 and second clock depositor 22 according to the described clock frequency correcting value calculated and local clock correcting value.Specifically, the described clock frequency correcting value T1 calculated and local clock correcting value T2 calibrates described second clock source 21 and second clock depositor 22, to calibrate the local clock of described radio frequency front-end device to be synchronized 2.
Embodiment two
nullRefer to Fig. 4，It is shown as the flow chart of the clock synchronizing method of the present invention，As shown in the figure，The present invention provides a kind of clock synchronizing method，It is applied to include in the clock synchronization device of clock source radio frequency front-end device 1 and radio frequency front-end device to be synchronized 2，In actual embodiment，Described clock source radio frequency front-end device 1 is connected with described radio frequency front-end device 2 to be synchronized by bus 3，Specifically，Described clock source radio frequency front-end device 1 also includes the first bus port 16，Described radio frequency front-end device to be synchronized 2 also includes the second bus port 25，Described first bus port 16 is connected to described second bus port 25 by bus，Described bus is such as PCIE bus、HyperTransport bus、Or IntelQuickPathInterconnect bus.In the present embodiment, described clock source radio frequency front-end device 1 is connected with described radio frequency front-end device 2 to be synchronized by high-speed PCI E bus 3.
Described clock synchronizing method comprises the following steps:
S1: system initialization, the bit wide of predetermined time data, the frequency of System Clock Reference signal pulse, the transmission time interval of time data and time adjustment amount produce interval；In the present embodiment, in system initialization, it is intended that time data bit wide is 32bits；System Clock Reference signal pulse frequency is 100MHz；The transmission time interval of time data is that every 100 pulse reference clocks send once；Time adjustment amount produces to be spaced apart and often receives 100 time information datas generations once.
S2: described clock source radio frequency front-end device 1 continues to capture the low level of the local reference clock of current time, and produces time data according to the frequency preset, and sends the time data collected to described radio frequency front-end device 2 to be synchronized reaching prefixed time interval；In the present embodiment, described clock source radio frequency front-end device 1 continues to capture the low level of the local reference clock of current time, and every 10 to 10000 deuterzooid ground pulse reference clocks produce time datas, and every for the time data collected 10 to 10000 deuterzooid ground pulse reference clocks are sent once to described radio frequency front-end device to be synchronized.Such as, described clock source radio frequency front-end device 1 continues to capture the low level of the local reference clock of current time, and every 100 deuterzooid ground pulse reference clocks produce time datas, and every for the time data collected 100 deuterzooid ground pulse reference clocks are sent once to described radio frequency front-end device 2 to be synchronized.
Such as, described clock source radio frequency front-end device 1 produces the time data t0 that length is 32bits, time data generator 13 by the interval specified such as every 100 clock pulses once, intercepts the low 32bits position of reference clock, current time this locality as time data t0.Time data t0 is sent to described radio frequency front-end device 2 to be synchronized by described clock source radio frequency front-end device 1 by high-speed PCI E bus 3, and the transmission time interval of described time data t0 is that every 100 deuterzooid ground pulse reference clocks send once.
S3: when described radio frequency front-end device 2 to be synchronized sends when receiving the time data of transmission couple, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock；In the present embodiment, first local clock is designated as t1, described radio frequency front-end device to be synchronized 2 receives time data t0 by high-speed PCI E bus 3, when sending immediately after receiving time information data t0 pair, request data package is to clock source radio-frequency front-end equipment, and records the first local clock t1 of delivery time.
S4: the request data package during reception pair of described clock source radio frequency front-end device 1, and after an interval preset, send feedback data packet extremely described radio frequency front-end device 2 to be synchronized；Such as, feedback data packet are sent to described radio frequency front-end devices 2 to be synchronized at every 100 deuterzooid ground pulse reference clocks after request data package when described clock source radio frequency front-end device 1 receives pair.
S5: described radio frequency front-end device 2 to be synchronized receives the feedback data packet of feedback, and the moment of reception is recorded as the second local clock；In the present embodiment, the second local clock is designated as t2.Described radio frequency front-end device to be synchronized 2 receives the feedback data packet of feedback by high-speed PCI E bus 3, and the second local clock recording the feedback data packet receiving clock source radio-frequency front-end equipment feedback is designated as t2.
S6: described radio frequency front-end device 2 to be synchronized reads first, second local clock of time data and record, calculates clock frequency correcting value and the local clock of the local clock correcting value described radio frequency front-end device 2 to be synchronized of calibration.
Referring to Fig. 5, be shown as in the clock synchronizing method of the present invention flow chart of concrete calibration, as it can be seen, in the present embodiment, the described method calculating clock frequency correcting value and local clock correcting value comprises the following steps:
S61: persistently read first, second local clock of time data and record, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；In the present embodiment, described resuming studies takes first, second local clock of time data and record, and according to prefixed time interval, 10 to 10000 time datas of reading are packaged into time data collection, and 10 to 10000 first, second local clock recorded are packaged into the first local clock collection and the second local clock collection.Such as, described lasting reading time data t0 and the first local clock t1 of record, the second local clock t2, and according to prefixed time interval, 100 time datas of reading are packaged into time data collection [t0], and 100 the first local clock t1, the second local clock t2 that record are packaged into the first local clock collection [t1] and the second local clock collection [t2].
S62: calculate the difference of described first local clock collection and described time data collection and obtain the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.In the present embodiment, the described difference calculating described first local clock collection and described time data collection also obtains the first difference collection, capturing described first difference concentrates minimum multiple differences to be the first difference subset, and to calculate the average that this is the first difference subset be the first average, the first average adding up 1 to 10000 time is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.
Specifically, in step S62, calculate the difference of described first local clock collection [t1] and described time data collection [t0] and obtain the first difference collection ([t1]-[t0]), capturing 16 minimum differences in described first difference collection ([t1]-[t0]) is the first difference subset, and the average calculating 16 differences that this is the first difference subset is the first average X, the the first average X adding up 10 times is stored as the first average collection Z, the difference calculating current first average X and the first average collection Z is designated as W, i.e. (X-Z)/10000=W, and carry out Filtering Processing acquisition clock frequency correcting value.More specifically, in an embodiment, select first-order IIR low-pas ripple device, filter coefficient takes 0.01, and W is filtered, and filtering is output as U, and finally output U is as clock frequency correcting value T1.So, it is not limited to this, in practice, different parameters can be chosen, for instance the starting stage, the frequency difference between radio-frequency front-end equipment to be synchronized and clock source radio-frequency front-end equipment is very big according to the stage synchronized, at this moment less R, K, L, bigger filter coefficient can be chosen；After frequency is basicly stable, for the precision synchronized, it is possible to select bigger R, K, L and less filter coefficient.
Simultaneously, calculate the difference of described second local clock collection and described first local clock collection and obtain the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.In the present embodiment, the described difference calculating described second local clock collection and described first local clock collection also obtains the second difference collection, capturing described second difference concentrates minimum multiple differences for for the second difference subset, and the average calculating this second difference subset is the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.
Specifically, in step S62, calculate the difference of described second local clock collection [t2] and described first local clock collection [t1] and obtain the second difference collection ([t2]-[t1]), capturing 16 minimum differences in described second difference collection ([t2]-[t1]) is the second difference subset, and the average calculating 16 differences that this is the second difference subset is the second average Y, it is filtered described second average Y processing and obtains filter value V, calculate 1/2nd of described filter value V, i.e. V/2, it is thus achieved that described local clock correcting value T2.More specifically, in an embodiment, select first-order IIR low-pas ripple device, filter coefficient takes 0.01, is filtered described second average Y processing, calculates 1/2nd of described filter value V, i.e. V/2, it is thus achieved that described local clock correcting value T2.So, it is not limited to this, in practice, different parameters can be chosen, for instance the starting stage, the frequency difference between radio-frequency front-end equipment to be synchronized and clock source radio-frequency front-end equipment is very big according to the stage synchronized, at this moment less R, K, L, bigger filter coefficient can be chosen；After frequency is basicly stable, for the precision synchronized, it is possible to select bigger R, K, L and less filter coefficient.
S63: calibrate the local clock of described radio frequency front-end device 2 to be synchronized according to the described clock frequency correcting value calculated and local clock correcting value.Specifically, the described clock frequency correcting value T1 calculated and local clock correcting value T2 calibrates the local clock of described radio frequency front-end device 2 to be synchronized.
In sum, the clock synchronization device of the present invention and method, the clock signal of the clock signal calibration radio-frequency front-end equipment to be synchronized of use clock source radio-frequency front-end equipment, it is possible to low cost, the high-precision time synchronized realized between radio-frequency front-end equipment.So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
Above-described embodiment is illustrative principles of the invention and effect thereof only, not for the restriction present invention.Above-described embodiment all under the spirit and category of the present invention, can be modified or change by any those skilled in the art.Therefore, art has usually intellectual such as modifying without departing from all equivalences completed under disclosed spirit and technological thought or change, must be contained by the claim of the present invention.
Claims (12)
1. a clock synchronization device, it is characterised in that including:
Clock source radio frequency front-end device, comprising:
First clock source, it is provided that System Clock Reference signal pulse；
First clock register, the System Clock Reference signal pulse provided according to described clock source produces local reference clock；
Time data generator, continues to capture the low level of the described local reference clock of current time, and produces time data according to the frequency preset；Wherein, described local reference clock is binary data；
Time data bag sending module, time data described in persistent collection, and reaching prefixed time interval, the time data collected is sent to target device；
Packet receives feedback module, request data package during in order to receive pair, and sends feedback data packet after an interval preset to target device；And
Radio frequency front-end device to be synchronized, comprising:
Second clock source, it is provided that local adjustable clock signal pulse；
Second clock depositor, the local adjustable clock signal pulse provided according to described second clock source produces local clock；
Packet transceiver module, during in order to send when receiving the time data that described time data bag sending module sends pair, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock, and receive the feedback data packet that described packet reception feedback module feeds back, and the moment of reception is recorded as the second local clock；
Time calibration measures generator, reads the time data of described packet transceiver module reception and first, second local clock of record, calculates clock frequency correcting value and local clock correcting value calibrates described second clock source and second clock depositor.
2. clock synchronization device according to claim 1, it is characterized in that: described clock source radio frequency front-end device also includes the first bus port, described radio frequency front-end device to be synchronized also includes the second bus port, and described first bus port is connected to described second bus port by bus.
3. clock synchronization device according to claim 2, it is characterised in that: described bus is PCIE bus, HyperTransport bus or IntelQuickPathInterconnect bus.
4. clock synchronization device according to claim 1, it is characterised in that: measure generator described time calibration and include:
Collecting unit, continue first, second local clock of time data and the record reading the reception of described packet transceiver module, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；
Clock frequency correction amount calculating unit, calculate the difference of described first local clock collection and described time data collection and obtain the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value；
Local clock correction amount calculating unit, calculate the difference of described second local clock collection and described first local clock collection and obtain the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value；
Correction unit, calibrates described second clock source and second clock depositor according to the described clock frequency correcting value calculated and local clock correcting value.
5. clock synchronization device according to claim 4, it is characterized in that: described clock frequency correction amount calculating unit calculates the difference of described first local clock collection and described time data collection and obtains the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the plurality of difference be the first difference subset, and the average calculating this first difference subset is the first average, statistics the first average repeatedly is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.
6. clock synchronization device according to claim 4, it is characterized in that: described local clock correction amount calculating unit calculates the difference of described second local clock collection and described first local clock collection and obtains the second difference collection, capturing described second difference concentrates minimum multiple differences to be the second difference subset, and the average calculating this second difference subset is the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.
7. a clock synchronizing method, is applied to include in the clock synchronization device of clock source radio frequency front-end device and radio frequency front-end device to be synchronized, it is characterised in that comprise the following steps:
System initialization, the bit wide of predetermined time data, the frequency of System Clock Reference signal pulse, the transmission time interval of time data and time adjustment amount produce interval；
Described clock source radio frequency front-end device continues to capture the low level of the local reference clock of current time, and produces time data according to the frequency preset, and sends the time data collected to described radio frequency front-end device to be synchronized reaching prefixed time interval；Wherein, described local reference clock is binary data；
When described radio frequency front-end device to be synchronized sends when receiving the time data of transmission pair, request data package is to described clock source radio-frequency front-end equipment, and the moment of transmission is recorded as the first local clock；
The request data package during reception pair of described clock source radio frequency front-end device, and after an interval preset, send feedback data packet extremely described radio frequency front-end device to be synchronized；
Described radio frequency front-end device to be synchronized receives the feedback data packet of feedback, and the moment of reception is recorded as the second local clock；And
Described radio frequency front-end device to be synchronized reads first, second local clock of time data and record, calculates clock frequency correcting value and the local clock of the local clock correcting value described radio frequency front-end device to be synchronized of calibration.
8. clock synchronizing method according to claim 7, it is characterised in that: described clock source radio frequency front-end device is connected with described radio frequency front-end device to be synchronized by bus.
9. clock synchronizing method according to claim 8, it is characterised in that: described bus is PCIE bus, HyperTransport bus or IntelQuickPathInterconnect bus.
10. clock synchronizing method according to claim 7, it is characterised in that: the described method calculating clock frequency correcting value and local clock correcting value comprises the following steps:
Persistently read first, second local clock of time data and record, and according to prefixed time interval, the repeatedly time data of reading is packaged into time data collection, and repeatedly first, second local clock recorded is packaged into the first local clock collection and the second local clock collection；
Calculate the difference of described first local clock collection and described time data collection and obtain the first difference collection, capture described first difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the first average, first average of statistics preset times is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value；Simultaneously, calculate the difference of described second local clock collection and described first local clock collection and obtain the second difference collection, capture described second difference and concentrate minimum multiple differences and to calculate the average of the plurality of difference be the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value；And
The local clock of described radio frequency front-end device to be synchronized is calibrated according to the described clock frequency correcting value calculated and local clock correcting value.
11. clock synchronizing method according to claim 10, it is characterized in that: the described difference calculating described first local clock collection and described time data collection also obtains the first difference collection, capturing described first difference concentrates minimum multiple differences to be the first difference subset, and to calculate the average that this is the first difference subset be the first average, statistics the first average repeatedly is stored as the first average collection, calculate the difference of current first average and the first average collection, and carry out Filtering Processing acquisition clock frequency correcting value.
12. clock synchronizing method according to claim 10, it is characterized in that: the described difference calculating described second local clock collection and described first local clock collection also obtains the second difference collection, capturing described second difference concentrates minimum multiple differences to be the second difference subset, and the average calculating this second difference subset is the second average, being filtered described second average processing and obtain filter value, calculate described filter value 1/2nd obtain described local clock correcting value.
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| CN105634635B (en) * | 2014-11-07 | 2019-02-26 | 杭州华为数字技术有限公司 | A kind of methods, devices and systems of shared RTC |
| CN104834622B (en) * | 2015-03-31 | 2017-10-24 | 深圳市三朋电子有限公司 | The method and device of multiple equipment time synchronized is carried out by RS232 interfaces |
| CN105610533A (en) * | 2015-11-02 | 2016-05-25 | 林晓东 | Distributed clock setting method |
| CN111123227B (en) * | 2019-12-31 | 2023-08-18 | 南京长峰航天电子科技有限公司 | System and method for synchronizing data time of radio frequency simulation equipment |
| CN111487683B (en) * | 2020-04-20 | 2023-04-18 | 合肥国为电子有限公司 | Groove wave seismograph and underground clock calibration and time synchronization method thereof |
| CN112737762B (en) * | 2020-12-25 | 2022-11-08 | 深圳深宝电器仪表有限公司 | Time calibration method and device, equipment to be calibrated and storage medium |
| CN113687686B (en) * | 2021-08-10 | 2024-05-14 | 北京小米移动软件有限公司 | Clock synchronization method, clock synchronization device, electronic equipment and storage medium |
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