CN107038109B - interrupt delay testing method and device based on MIPS framework - Google Patents
interrupt delay testing method and device based on MIPS framework Download PDFInfo
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Abstract
The invention provides an interrupt delay testing method and device based on an MIPS (Mobile industry processor System), relates to the technical field of interrupt delay, and solves the problems that interrupt delay testing in a Vxworks system is not convenient and fast enough and is not easy to implement in the prior art. The interrupt delay testing method based on the MIPS framework is applied to a Vxworks system and comprises the following steps: enabling a self-contained high-precision clock of the MIPS framework in the Vxworks system, and acquiring the frequency of the high-precision clock; acquiring a current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, wherein the current timestamp is used as a first timestamp; acquiring a current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock, and taking the current timestamp as a second timestamp; and calculating the interrupt delay according to the first time stamp, the second time stamp and the frequency of the high-precision clock. The embodiment of the invention is suitable for carrying out interrupt delay test based on the MIPS framework in the VxWorks system.
Description
Technical Field
The present invention relates to the field of interrupt latency technologies, and in particular, to an interrupt latency testing method and apparatus based on an MIPS architecture.
Background
the real-time testing of the operating system is very helpful for knowing the real-time performance of the operating system, especially in an embedded operating system with high real-time requirement on the system. For example, Vxworks, as an embedded real-time operating system, usually adopts an interrupt mode to meet the requirement of system real-time performance. At present, in a Vxworks system, for testing interrupt delay, interrupt is generally enabled in a program, and then the time from enabling the interrupt to entering the interrupt is tested by using hardware testing equipment assisted by a logic analyzer and the like through a method of combining software and hardware, so that the interrupt delay is finally determined.
in the process of implementing the invention, the inventor finds that at least the following technical problems exist in the prior art:
In a Vxworks system, auxiliary hardware testing equipment such as a logic analyzer is required for testing interrupt delay, if no hardware testing equipment exists beside a tester, the test on the interrupt delay cannot be carried out, and the testing method is not convenient and fast and is not easy to implement.
Disclosure of Invention
The interrupt delay testing method and device based on the MIPS framework can conveniently and rapidly realize interrupt delay testing based on the MIPS framework in a Vxworks system, and are easy to implement.
in a first aspect, the present invention provides an interrupt delay testing method based on an MIPS architecture, which is applied to a Vxworks system, and includes:
Enabling a self-contained high-precision clock of the MIPS framework in the Vxworks system, and acquiring the frequency of the high-precision clock;
acquiring a current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, wherein the current timestamp is used as a first timestamp;
Acquiring a current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock, and taking the current timestamp as a second timestamp;
and calculating the interrupt delay according to the first time stamp, the second time stamp and the frequency of the high-precision clock.
in a second aspect, the present invention provides an interrupt delay testing apparatus based on MIPS architecture, which is applied to a Vxworks system, and includes:
The enabling unit is used for enabling a self-contained high-precision clock of the MIPS framework in the Vxworks system and acquiring the frequency of the high-precision clock;
the first obtaining unit is used for obtaining a current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, and the current timestamp is used as a first timestamp;
the second acquisition unit is used for acquiring a current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock as a second timestamp;
a computing unit, configured to compute an interrupt delay according to the first timestamp, the second timestamp, and the frequency of the high-precision clock.
According to the interrupt delay testing method and device based on the MIPS framework, a high-precision clock of the MIPS framework is enabled in a Vxworks system, the frequency of the high-precision clock is obtained, a current timestamp of the Vxworks system when the Vxworks system enables interrupt is obtained through the high-precision clock and serves as a first timestamp, a current timestamp of the Vxworks system when the Vxworks system generates the interrupt is obtained through the high-precision clock and serves as a second timestamp, and interrupt delay is calculated according to the first timestamp, the second timestamp and the frequency of the high-precision clock. Compared with the prior art, the method and the device do not need to use auxiliary hardware testing equipment such as a logic analyzer, can carry out interrupt delay testing on the Vxworks system only by using a self-contained high-precision clock of an MIPS framework in the Vxworks system, and are convenient to test and easy to implement.
Drawings
in order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart of a first embodiment of an interrupt latency testing method based on an MIPS architecture according to the present invention;
Fig. 2 is a schematic structural diagram of a first embodiment of an interrupt delay testing apparatus based on an MIPS architecture according to the present invention;
fig. 3 is a schematic structural diagram of a second interrupt delay testing apparatus based on the MIPS architecture according to the present invention.
Detailed Description
in order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
the invention provides an interrupt delay test method based on an MIPS framework, fig. 1 is a flow chart of a first embodiment of the interrupt delay test method based on the MIPS framework, as shown in fig. 1, the method of the embodiment is applied to a Vxworks system, and comprises the following steps:
s11, enabling a self-contained high-precision clock of the MIPS (Microprocessor with interlocked pipeline stages) architecture in the Vxworks system, and obtaining the frequency of the high-precision clock.
And S12, acquiring the current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, and taking the current timestamp as a first timestamp.
and S13, acquiring the current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock, and taking the current timestamp as a second timestamp.
And S14, calculating the interrupt delay according to the first time stamp, the second time stamp and the frequency of the high-precision clock.
according to the interrupt delay testing method based on the MIPS framework, a high-precision clock of the MIPS framework is enabled in a Vxworks system, the frequency of the high-precision clock is obtained, a current timestamp of the Vxworks system when the interruption is enabled is obtained by the high-precision clock and used as a first timestamp, a current timestamp of the Vxworks system when the interruption is generated is obtained by the high-precision clock and used as a second timestamp, and interrupt delay is calculated according to the first timestamp, the second timestamp and the frequency of the high-precision clock. Compared with the prior art, the method and the device do not need to use auxiliary hardware testing equipment such as a logic analyzer, can carry out interrupt delay testing on the Vxworks system only by using a self-contained high-precision clock of an MIPS framework in the Vxworks system, and are convenient to test and easy to implement.
optionally, the obtaining, by using the high-precision clock, a current timestamp when the Vxworks system is enabled to be interrupted may include, as the first timestamp: respectively acquiring current timestamps of the Vxworks system when the Vxworks system is interrupted for multiple times by using the high-precision clock, and taking the average value of the acquired current timestamps as a first timestamp;
the obtaining, by using the high-precision clock, a current timestamp of the Vxworks system when the interrupt is generated includes, as a second timestamp: and respectively acquiring current timestamps corresponding to multiple enabled interrupts when the interrupts are generated for multiple times by using the high-precision clock, and taking the average value of the acquired current timestamps as a second timestamp.
therefore, since the first time stamp and the second time stamp are both obtained by averaging a plurality of measurements, the accuracy of the data is higher, and therefore, the accuracy of the data of the interrupt delay calculated according to the first time stamp, the second time stamp, and the frequency of the high-precision clock is also higher.
Optionally, the obtaining, by using the high-precision clock, a current timestamp when the Vxworks system is enabled to be interrupted includes: respectively acquiring current timestamps of the Vxworks system when the Vxworks system is interrupted for multiple times by using the high-precision clock;
the obtaining of the current timestamp of the Vxworks system when the interruption is generated by using the high-precision clock comprises: respectively acquiring current timestamps corresponding to multiple enabling interrupts when the interrupts are generated for multiple times by using the high-precision clock;
Said calculating an interrupt delay based on the first timestamp, the second timestamp, and the frequency of the high-precision clock comprises: and calculating each interrupt delay according to the current timestamp when the interrupt is enabled each time, the current timestamp when the interrupt is generated each time and the frequency of the high-precision clock to obtain a plurality of interrupt delays, and taking the average value of the interrupt delays as the final interrupt delay.
Therefore, the final interrupt delay is the average value of the interrupt delays measured for a plurality of times, and therefore, the data accuracy is higher.
optionally, the time consumed by the interrupt-related action between enabling the interrupt and generating the interrupt is negligible. Therefore, the calculating of the interrupt delay according to the first timestamp, the second timestamp, and the frequency of the high-precision clock may specifically be: and dividing the difference value obtained by subtracting the first time stamp from the second time stamp by the frequency of the high-precision clock to obtain the interrupt delay.
Optionally, in order to calculate the interrupt delay more accurately, the method may further include:
obtaining time consumed by actions related to the interrupt, which is selectable between enabling the interrupt and generating the interrupt and is used for calculating the interrupt delay more accurately, and recording the time consumed by the actions related to the interrupt as interrupt consumption time;
Said calculating an interrupt delay based on the first timestamp, the second timestamp, and the frequency of the high-precision clock comprises: and dividing the difference obtained by subtracting the first time stamp from the second time stamp by the interrupt consumption time by the frequency of the high-precision clock to obtain the interrupt delay.
Since the time consumed by the interrupt-related action between enabling the interrupt and generating the interrupt is removed when the interrupt latency is calculated, the finally calculated interrupt latency is more accurate.
optionally, when the interrupt is a timer interrupt, acquiring time consumed by an action related to the interrupt performed between enabling the interrupt and generating the interrupt, and recording the time as the interrupt consumed time includes: setting a timed interruption time interval in the Vxworks system, wherein the interruption time interval is recorded as interruption consumption time;
The dividing a difference obtained by subtracting the first timestamp and the interrupt consumption time from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay comprises: and dividing the difference obtained by subtracting the first time stamp from the second time stamp by the time interval of the timed interrupt by the frequency of the high-precision clock to obtain the interrupt delay.
the smaller the timer interruption time interval set in the Vxworks system, the better the timer interruption time interval is, and the timer interruption time interval set in the embodiment of the present invention may be 1 us.
Optionally, when the interrupt is a serial port interrupt, acquiring time consumed by an action related to the interrupt between enabling the interrupt and generating the interrupt, where the time recorded as interrupt consumed time includes: acquiring a starting time stamp when data transmission starts and an ending time stamp when data transmission ends after the Vxworks system is enabled to be interrupted by using the high-precision clock, and dividing a difference value obtained by subtracting the starting time stamp from the ending time stamp by the frequency of the high-precision clock to obtain the time for transmitting data, wherein the time is recorded as interruption time consumption;
the dividing a difference obtained by subtracting the first timestamp and the interrupt consumption time from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay comprises: and dividing the difference value obtained by subtracting the time of the first time stamp and the sending data from the second time stamp by the frequency of the high-precision clock to obtain the interrupt delay.
Optionally, after the obtaining, by using the high-precision clock, a current timestamp when the Vxworks system generates the interrupt, as a second timestamp, the method may further include:
The interrupt is closed.
an embodiment of the present invention provides an interrupt delay testing apparatus based on a MIPS architecture, and fig. 2 is a schematic structural diagram of a first embodiment of the interrupt delay testing apparatus based on the MIPS architecture, as shown in fig. 2, the apparatus of the present embodiment is applied to a Vxworks system, and includes:
An enabling unit 21, configured to enable a high-precision clock of the MIPS architecture in the Vxworks system, and obtain a frequency of the high-precision clock;
A first obtaining unit 22, configured to obtain, by using the high-precision clock, a current timestamp when the Vxworks system is enabled to be interrupted, as a first timestamp;
A second obtaining unit 23, configured to obtain, by using the high-precision clock, a current timestamp when the Vxworks system generates the interrupt, as a second timestamp;
a calculating unit 24, configured to calculate an interrupt delay according to the first timestamp, the second timestamp, and the frequency of the high-precision clock.
according to the interrupt delay testing device based on the MIPS framework, a high-precision clock of the MIPS framework is enabled in a Vxworks system, the frequency of the high-precision clock is obtained, a current timestamp of the Vxworks system when the interruption is enabled is obtained by the high-precision clock and used as a first timestamp, a current timestamp of the Vxworks system when the interruption is generated is obtained by the high-precision clock and used as a second timestamp, and interrupt delay is calculated according to the first timestamp, the second timestamp and the frequency of the high-precision clock. Compared with the prior art, the method and the device do not need to use auxiliary hardware testing equipment such as a logic analyzer, can carry out interrupt delay testing on the Vxworks system only by using a self-contained high-precision clock of an MIPS framework in the Vxworks system, and are convenient to test and easy to implement.
optionally, the first obtaining unit 22 is configured to obtain, by using the high-precision clock, current timestamps when the Vxworks system is enabled to be interrupted for multiple times, and use an average value of the obtained current timestamps as a first timestamp;
The second obtaining unit 23 is configured to obtain, by using the high-precision clock, current timestamps when multiple interrupts are generated, which correspond to multiple interrupts enabled, and use an average value of the obtained current timestamps as a second timestamp.
Therefore, since the first time stamp and the second time stamp are both obtained by averaging a plurality of measurements, the accuracy of the data is higher, and therefore, the accuracy of the data of the interrupt delay calculated according to the first time stamp, the second time stamp, and the frequency of the high-precision clock is also higher. Optionally, the first obtaining unit 22 is configured to obtain, by using the high-precision clock, current timestamps when the Vxworks system is enabled to be interrupted for multiple times respectively;
the second obtaining unit 23 is configured to obtain, by using the high-precision clock, current timestamps when multiple interrupts are generated, which correspond to multiple enabling interrupts, respectively;
The calculating unit 24 is configured to calculate each interrupt delay according to a current timestamp when the interrupt is enabled each time, a current timestamp when the interrupt is generated each time, and the frequency of the high-precision clock, to obtain a plurality of interrupt delays, and use an average value of the plurality of interrupt delays as a final interrupt delay.
Therefore, the final interrupt delay is the average value of the interrupt delays measured for a plurality of times, and therefore, the data accuracy is higher.
optionally, the time consumed by the interrupt-related action between enabling the interrupt and generating the interrupt is negligible. Therefore, the calculating unit 24 is configured to divide the difference obtained by subtracting the first timestamp from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay.
optionally, fig. 3 is a schematic structural diagram of a second embodiment of the interrupt delay testing apparatus based on the MIPS architecture, and in order to calculate the interrupt delay more accurately, as shown in fig. 3, the apparatus may further include:
a third obtaining unit 25, configured to obtain time consumed by an action related to an interrupt performed between enabling the interrupt and generating the interrupt, and record the time consumed as interrupt time;
the calculating unit 24 is configured to divide a difference obtained by subtracting the first timestamp and the interrupt consumption time from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay.
Since the time consumed by the interrupt-related action between enabling the interrupt and generating the interrupt is removed when the interrupt latency is calculated, the finally calculated interrupt latency is more accurate.
Optionally, when the interruption is timer interruption, the third obtaining unit 25 is configured to set a timer interruption time interval in the Vxworks system, where the interruption time interval is recorded as interruption consumption time;
the calculating unit 24 is configured to divide a difference obtained by subtracting the first timestamp and the timed interrupt time interval from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay.
The smaller the timer interruption time interval set in the Vxworks system, the better the timer interruption time interval is, and the timer interruption time interval set in the embodiment of the present invention may be 1 us.
optionally, when the interrupt is a serial port interrupt, the third obtaining unit 25 is configured to obtain, by using the high-precision clock, a start timestamp when data transmission starts and an end timestamp when data transmission ends after the Vxworks system enables the interrupt, and divide a difference obtained by subtracting the start timestamp from the end timestamp by the frequency of the high-precision clock to obtain a time for transmitting data, which is recorded as an interrupt consumption time;
The calculating unit 24 is configured to divide a difference obtained by subtracting the time of the first time stamp and the time of the sending data from the second time stamp by the frequency of the high-precision clock to obtain the interrupt delay.
optionally, as shown in fig. 3, the apparatus may further include:
A closing unit 26, configured to close the interrupt after the second obtaining unit 23 obtains, by using the high-precision clock, a current timestamp when the Vxworks system generates the interrupt, as a second timestamp.
The interrupt delay testing method and device based on the MIPS framework in the embodiment of the invention can be suitable for interrupt delay testing based on the MIPS framework in a VxWorks system, but are not limited to the method.
it will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (12)
1. An interrupt delay test method based on MIPS architecture is characterized by being applied to a Vxworks system and comprising the following steps:
Enabling a self-contained high-precision clock of the MIPS framework in the Vxworks system, and acquiring the frequency of the high-precision clock;
Acquiring a current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, wherein the current timestamp is used as a first timestamp;
Acquiring a current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock, and taking the current timestamp as a second timestamp;
acquiring time consumed by actions related to interruption between interruption enabling and interruption generating, and recording the time consumed as interruption time consumed;
and dividing the difference obtained by subtracting the first time stamp from the second time stamp by the interrupt consumption time by the frequency of the high-precision clock to obtain the interrupt delay.
2. the method according to claim 1, wherein the obtaining, by using the high-precision clock, a current timestamp of when the Vxworks system enables interrupt as the first timestamp comprises: respectively acquiring current timestamps of the Vxworks system when the Vxworks system is interrupted for multiple times by using the high-precision clock, and taking the average value of the acquired current timestamps as a first timestamp;
The obtaining, by using the high-precision clock, a current timestamp of the Vxworks system when the interrupt is generated includes, as a second timestamp: and respectively acquiring current timestamps corresponding to multiple enabled interrupts when the interrupts are generated for multiple times by using the high-precision clock, and taking the average value of the acquired current timestamps as a second timestamp.
3. the method of claim 1, wherein the obtaining, with the high-precision clock, a current timestamp when the Vxworks system enables interrupts comprises: respectively acquiring current timestamps of the Vxworks system when the Vxworks system is interrupted for multiple times by using the high-precision clock;
The obtaining of the current timestamp of the Vxworks system when the interruption is generated by using the high-precision clock comprises: respectively acquiring current timestamps corresponding to multiple enabling interrupts when the interrupts are generated for multiple times by using the high-precision clock;
Said calculating an interrupt delay based on the first timestamp, the second timestamp, and the frequency of the high-precision clock comprises: and calculating each interrupt delay according to the current timestamp when the interrupt is enabled each time, the current timestamp when the interrupt is generated each time and the frequency of the high-precision clock to obtain a plurality of interrupt delays, and taking the average value of the interrupt delays as the final interrupt delay.
4. The method of claim 1, wherein when the interrupt is a timed interrupt, obtaining an interrupt-related action between enabling the interrupt and generating the interrupt comprises: setting a timed interruption time interval in the Vxworks system, wherein the interruption time interval is recorded as interruption consumption time;
the dividing a difference obtained by subtracting the first timestamp and the interrupt consumption time from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay comprises: and dividing the difference obtained by subtracting the first time stamp from the second time stamp by the time interval of the timed interrupt by the frequency of the high-precision clock to obtain the interrupt delay.
5. the method of claim 1, wherein when the interrupt is a serial port interrupt, acquiring an interrupt-related action between enabling the interrupt and generating the interrupt as an interrupt consumption time comprises: acquiring a starting time stamp when data transmission starts and an ending time stamp when data transmission ends after the Vxworks system is enabled to be interrupted by using the high-precision clock, and dividing a difference value obtained by subtracting the starting time stamp from the ending time stamp by the frequency of the high-precision clock to obtain the time for transmitting data, wherein the time is recorded as interruption time consumption;
the dividing a difference obtained by subtracting the first timestamp and the interrupt consumption time from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay comprises: and dividing the difference value obtained by subtracting the time of the first time stamp and the sending data from the second time stamp by the frequency of the high-precision clock to obtain the interrupt delay.
6. the method according to claim 1, wherein after the obtaining, with the high-precision clock, a current timestamp of when the Vxworks system generates the interrupt as a second timestamp, the method further comprises:
The interrupt is closed.
7. An interrupt delay testing device based on MIPS framework is characterized in that the interrupt delay testing device is applied to a Vxworks system and comprises the following components:
The enabling unit is used for enabling a self-contained high-precision clock of the MIPS framework in the Vxworks system and acquiring the frequency of the high-precision clock;
The first obtaining unit is used for obtaining a current timestamp of the Vxworks system when the Vxworks system is enabled to be interrupted by using the high-precision clock, and the current timestamp is used as a first timestamp;
the second acquisition unit is used for acquiring a current timestamp of the Vxworks system when the interruption occurs by using the high-precision clock as a second timestamp;
a third acquisition unit, configured to acquire time consumed by an action related to an interrupt performed between enabling the interrupt and generating the interrupt, and record the time consumed as interrupt consumption time;
And the calculating unit is used for dividing the difference value obtained by subtracting the first time stamp from the second time stamp by the interrupt consumption time by the frequency of the high-precision clock to obtain the interrupt delay.
8. The device according to claim 7, wherein the first obtaining unit is configured to obtain current timestamps when the Vxworks system is enabled to be interrupted for multiple times by using the high-precision clock, and use an average value of the obtained current timestamps as a first timestamp;
And the second acquisition unit is used for respectively acquiring current timestamps corresponding to multiple enabled interrupts when the interrupts are generated for multiple times by using the high-precision clock, and taking the average value of the acquired current timestamps as a second timestamp.
9. the device according to claim 7, wherein the first obtaining unit is configured to obtain current timestamps of the Vxworks system when interrupts are enabled multiple times respectively by using the high-precision clock;
The second obtaining unit is used for respectively obtaining current timestamps corresponding to multiple enabling interrupts when the interrupts are generated for multiple times by using the high-precision clock;
And the calculating unit is used for calculating each interrupt delay according to the current timestamp when the interrupt is enabled each time, the current timestamp when the interrupt is generated each time and the frequency of the high-precision clock to obtain a plurality of interrupt delays, and taking the average value of the interrupt delays as the final interrupt delay.
10. the device according to claim 7, wherein when the interrupt is a timer interrupt, the third obtaining unit is configured to set a timer interrupt time interval in the Vxworks system, where the interrupt time interval is recorded as interrupt consumption time;
And the calculating unit is used for dividing the difference value obtained by subtracting the first time stamp from the second time stamp by the time interval of the timed interrupt by the frequency of the high-precision clock to obtain the interrupt delay.
11. The apparatus according to claim 7, wherein when the interrupt is a serial port interrupt, the third obtaining unit is configured to obtain, by using the high-precision clock, a start timestamp when data transmission starts and an end timestamp when data transmission ends after the Vxworks system enables the interrupt, and divide a difference obtained by subtracting the start timestamp from the end timestamp by a frequency of the high-precision clock to obtain a time for transmitting data, which is recorded as an interrupt consumption time;
The calculation unit is configured to divide a difference obtained by subtracting the time of the first timestamp and the time of the sending data from the second timestamp by the frequency of the high-precision clock to obtain the interrupt delay.
12. the apparatus of claim 7, further comprising:
and the closing unit is used for closing the interrupt after the second acquisition unit acquires the current timestamp of the Vxworks system when the interrupt is generated by using the high-precision clock as a second timestamp.
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