CN107024813A - 阵列基板、液晶显示面板及显示装置 - Google Patents
阵列基板、液晶显示面板及显示装置 Download PDFInfo
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Abstract
本发明提供一种阵列基板、液晶显示面板及显示装置,包括:衬底基板;多条扫描线与多条数据交叉设置;多个呈矩阵排列的薄膜晶体管,每个薄膜晶体管包括栅极、有源层和漏电极;平坦化层,覆盖上述栅极、有源层和漏电极,且在平坦化层的对应于漏电极的位置设置有贯穿该平坦化层的过孔,且漏电极位于过孔内部;以及填充电极,位于上述过孔内,与漏电极连接并覆盖该漏电极;像素电极,通过该填充电极间接连接至漏电极。本发明增大了数据线与像素电极之间的距离,减小了数据线对像素电极的影响,改善了显示装置的串扰现象;通过填充电极补偿漏电极的段差,改善了像素电极的断线问题,提升了显示装置的良率。
Description
技术领域
本发明涉及显示技术领域,且特别涉及一种阵列基板、液晶显示面板及显示装置。
背景技术
随着显示技术的飞速发展,触控显示装置已经逐渐遍及人们的生活中。在触控显示的发展初始阶段,触控显示面板是将触控面板与显示面板贴合而成,以实现触控显示,需要单独制备触控面板与显示面板,成本高,厚度较人,且生产效率低。随着触控显示技术的发展,出现了内嵌式触控显示面板,内嵌式触控显示面板将触控电极内嵌在显示面板内部,可以减薄模组整体的厚度,又可以大大降低触控显示装置的制作成本,使其受到各大面板厂家青睐。
目前,触控显示面板中的触控信号线与触控电极一般设置在其阵列基板上,具体的,该阵列基板包括:多条相互平行的扫描线以及多条相互平行的数据线,所述扫描线与所述数据线相互绝缘并交叉设置限定出多个像素,每个像素内设置有薄膜晶体管以及像素电极,像素电极通过设置在该像素区的薄膜晶体管与对应的数据线连接。进一步的,为了实现触控功能,该阵列基板还包括与上述像素电极分层设置的公共电极层以及多条触控信号线。所述公共电极层分割为多个公共电极块,所述公共电极块复用作触控电极,所述触控信号线与对应的触控电极连接。
在触控显示面板中,数据线与像素电极之间的耦合电容较大,尤其在搭载负性液晶触控显示面板中,数据线上驱动电压高,电压波动大,导致数据线对像素电极的影响大,导致显示装置的串扰现象严重;通常情况下,由于像素电极与漏电极之间的间隔层(比如钝化层和/或平坦化层等)较厚,从而使得连接像素电极与漏电极之间的过孔的深度较深。因此,如果通过直接减小漏电极的宽度的方式来增大数据线与像素电极之间的间距,当像素电极通过过孔与漏电极相连时,容易造成像素电极的断线、脱落,进而出现暗点等显示不良,从而导致显示装置的良率下降。
发明内容
本发明的目的在于提供一种阵列基板、液晶显示面板及显示装置,以解决现有显示装置存在的因数据线对像素电极的影响大,导致显示装置的串扰现象严重的问题。
本发明提供一种阵列基板,包括:衬底基板;多条扫描线与多条数据,叉设置;多个呈矩阵排列的薄膜晶体管,每个薄膜晶体管包括栅极、有源层和漏电极,平坦化层,覆盖所述栅极、有源层和漏电极,所述平坦化层的对应于所述漏电极的位置设置有贯穿所述平坦化层的过孔,所述漏电极的宽度小于所述过孔的底部的宽度,填充电极,位于所述过孔内,与所述漏电极连接并覆盖所述漏电极,像素电极,通过所述过孔与所述填充电极连接。
本发明还提供一种液晶显示面板,包括上述阵列基板,与上述阵列基板相对设置的彩膜基板,以及,位于该阵列基板与该彩膜基板之间的液晶层。
另外,本发明还提供一种显示装置,包含本发明实施例提供的显示装置。
与现有技术相比,本发明所提供的技术方案具有以下优点:本发明提供的阵列基板、液晶显示面板及显示装置,包括:衬底基板;多条扫描线与多条数据,叉设置;多个呈矩阵排列的薄膜晶体管,每个薄膜晶体管包括栅极、有源层和漏电极,平坦化层,覆盖上述栅极、有源层和漏电极,且在平坦化层的对应于漏电极的位置设置有贯穿该平坦化层的过孔,且漏电极的宽度小于过孔的底部的宽度;以及填充电极,位于上述过孔内,与漏电极连接并覆盖该漏电极;像素电极,通过该过孔与填充电极连接,并通过该填充电极间接连接至漏电极。也就是说,本发明通过减小漏电极的宽度增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,进而减小了数据线对像素电极的影响,改善了显示装置的串扰现象;而且,本发明在漏电极上增加了填充电极,且该填充电极具有一定的厚度,从而可以通过该填充电极补偿漏电极与过孔的侧壁之间的段差,改善了像素电极的断线问题,提升了显示装置的良率。
附图说明
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述,本发明的其它特征、目的和优点将会变得更明显:
图1是本发明实施方式提供的一种阵列基板的示意图;
图2是图1所示阵列基板上其中一个像素单元的示意图;
图3是图1所示阵列基板的截面图;
图4是本发明实施方式提供的另一种阵列基板的俯视图;
图5是图4所示阵列基板的结构示意图;
图6是图4所示阵列基板的截面图;
图7是本发明实施方式提供的又一种阵列基板的示意图;
图8是图7所示阵列基板的截面图;
图9是本发明实施方式提供的再一种阵列基板的截面图;
图10是本发明实施方式提供的一种液晶显示面板的示意图。
具体实施方式
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释本发明,而非对本发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与本发明相关的部分而非全部结构。
本发明实施方式首先提供一种阵列基板,如图1和图2所示,图1是本发明实施方式提供的一种阵列基板的示意图,图2是图1所示的阵列基板中单个像素单元的示意图。该阵列基板10包括多条数据线20与多条扫描线30,该多条数据线20与多条扫描线30交叉设置界定多个像素单元40,多个像素单元40包括延第一方向排列的多列像素单元与延第二方向排列的多行像素单元,同时,在扫描线30和数据线20的交叉位置设置有薄膜晶体管T,多个薄膜晶体管T呈矩阵排列。
进一步的,每个像素单元40内设置有像素电极18,像素电极18通过薄膜晶体管T与对应的数据线20连接。具体的,在本实施例中,薄膜晶体管T为低温多晶硅薄膜晶体管,包括U型的有源层101,该U型的有源层101是通过对低温多晶硅进行离子掺杂制备而成,包括源极区域、重掺杂区域与漏极区域,数据线20连接至对应薄膜晶体管T的有源层的源极区域;栅极31,对应于扫描线30与U型的有源层101重叠的区域,也即本实施例不需要另外设置栅极,采用扫描线30的与有源层101重叠的部分复用为栅极31;漏电极21,与数据线20同层形成,该漏电极21的一端连接至有源层的漏极区域,另一端通过过孔H1与像素电极18连接;以及,填充电极22,位于像素电极18与漏电极21之间,并部分填充在漏电极21与过孔H1的侧壁之间的空隙内。
进一步的,图3是图1所示的阵列基板的截面图,具体的,如图1、2和3所示,该阵列基板依次包括:以玻璃等透明材料做成的衬底基板11;在衬底基板11上设置的缓冲层(图中未示出),在缓冲层上呈大致U字形状设置的有源层101;以覆盖有源层101的方式设置的栅极绝缘层12;在栅极绝缘层12上以相互平行地延伸的方式设置的多条扫描线30以及栅极31,其中栅极31与扫描线30连接,或者也可以设置部分扫描线30与有源层101重叠设置,由与有源层101重叠设置的该部分扫描线30复用为栅极31,以及以覆盖各扫描线30的方式设置的层间绝缘膜13;数据线20,位于层间绝缘膜13上,其延伸方向与各扫描线30的延伸方向正交;以及在层间绝缘膜13上、在各数据线20之间呈岛状地设置的多个漏电极21;平坦化层14,以覆盖各数据线20和各漏电极21的方式设置的平坦化层14,平坦化层14覆盖薄膜晶体管T的栅极31、有源层101和漏电极21,且在平坦化层14的对应于漏电极21的位置设置有贯穿该平坦化层14的过孔H1。
漏电极21完全位于过孔H1的内部,漏电极21的两端与过孔H1的侧壁之间存在间隙,即漏电极21的两端之间的宽度L2小于过孔H1的底部的宽度L1,增大了数据线20与漏电极21之间的间距L3,因为像素电极18是与漏电极21连接,且漏电极21与数据线20同层形成,进而增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,改善了显示装置的串扰现象。
进一步的,阵列基板10还包括填充电极22,位于过孔H1内部,与漏电极21直接接触并覆盖漏电极21,且部分填充电极22填充在漏电极21的两端与过孔H1的侧壁之间的间隙内,像素电极18直接与填充电极22接触,并通过填充电极22间接连接至漏电极21,填充电极具有一定的厚度,可以补偿漏电极与过孔的侧壁之间的段差,改善了像素电极的断线问题,提升了显示装置的良率。在本实施例中,该填充电极的材料可以是导电金属材料,也可以是透明导电氧化物材料,本发明对此并不做特别限定。
在本实施例中,阵列基板10还包括设置在平坦化层14上的公共电极16,在该公共电极16与平坦化层14之间设置有第一绝缘层15;以及,呈矩阵状地设置的多个像素电极18,位于公共电极16的远离衬底基板11的一侧,在公共电极16与像素电极18之间设置有第二绝缘层17,以使得公共电极16与像素电极18绝缘间隔。在本实施例中,过孔H1依次贯穿第二绝缘层、公共电极、第一绝缘层与平坦化层,漏出填充电极,像素电极直接与填充电极接触,并通过填充电极间接连接至漏电极。
进一步的,在由该阵列基板形成的液晶显示面板中,还该阵列基板还可以设置有覆盖各像素电极的取向层(图中未示出),用于该阵列基板所在的液晶显示面板中的液晶层一个初始方向。
图4是本发明实施方式提供的另一种阵列基板的俯视图,图5是图4所示阵列基板的结构示意图,图6是图4所示阵列基板的截面图,如图4-图6所示,该实施例提供的阵列基板设置有触控感应结构,该触控感应结构包括多个相互绝缘的触控电极161,每个触控电极161分时复用为公共电极,每个触控电极161与至少位于阵列基板一端的驱动单元连接。在触控检测阶段,驱动单元控制该阵列基板所在的显示装置实现触控感测,在显示阶段,驱动单元控制由该该阵列基板所在的显示装置显示图像。
具体的,该阵列基板还包括多条触控信号线S,该多条触控信号线S与该多个触控电极161对应设置,并与该多个触控电极161通过连接孔H2对应连接。在触控检测阶段,每个触控电极161通过触控信号线S与驱动单元连接,由驱动单元内的触控用集成电路产生触控驱动信号,经触控信号线S提供给触控电极161,使触控电极161带有一定电荷量;驱动单元内的触控用集成电路经触控信号线S对触控电极161中的带电状态的变化情况进行读取,通过带电状态的变化,可以判断出哪个或者哪些触控电极161被触控,从而可以进一步确定出触控点的位置。触控驱动信号和带电状态的变化情况都可以理解为一个脉冲信号。
进一步的,该阵列基板还包括多条平行的数据线20与多条平行的扫描线30,该多条数据线20与多条扫描线30交叉设置界定多个像素单元40。每个像素单元40内的像素电极18通过开关元件T与对应的数据线20连接;触控信号线S的延伸方向与数据线20的延伸方向大致相同,并与数据线20交叠设置。在具体实施方式中,相邻触控信号线之间间隔的像素单元的列数可以根据需要调节。
在本实施方式中,关于该阵列基板10的结构,具体的,如图5与6所示,该阵列基板10依次包括衬底基板11、开关元件T、平坦化层14、第一绝缘层15、触控电极161、第二绝缘层17,以及像素电极18。开关元件T例如为薄膜晶体管,包括栅极、有源层、漏电极,进一步的,该阵列基板还包括形成有扫描线30的第一金属层M1、和形成有数据线20的第二金属层M2,第一金属层M1位于第二金属层M2与衬底基板11之间,例如,可以设置为,第二金属层M2与第一金属层M1之间通过一栅极绝缘层12绝缘间隔,其中第一金属层M1包括该阵列基板的栅极与扫描线30,用于给该阵列基板的像素单元提供扫描信号,第二金属层M2包括该阵列基板的漏电极21与数据线20,用于给该阵列基板的像素电极提供数据信号。在平坦化层14的对应于漏电极21的位置设置有贯穿该平坦化层14的过孔H1,漏电极21完全位于过孔H1的内部,漏电极21的两端与过孔H1的侧壁不接触,漏电极21的两端与过孔H1的侧壁之间存在间隙,即漏电极21的两端之间的宽度L1小于过孔H1的底部的宽度L2,增大了数据线20与漏电极21之间的间距,因为像素电极18是与漏电极21连接,且漏电极21与数据线20同层形成,增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,进而减小了数据线对像素电极的影响,改善了显示装置的串扰现象。
进一步的,在本实施方式中,该阵列基板还包括形成有触控信号线S与填充电极22的第三金属层M3。填充电极22位于过孔H1内部,与漏电极21直接接触并覆盖漏电极21,且部分填充电极22填充在漏电极21的两端与过孔H1的侧壁之间的间隙内,像素电极18直接与填充电极22接触,并通过填充电极22间接连接至漏电极21,填充电极具有一定的厚度,可以补偿漏电极与过孔的侧壁之间的段差,改善了像素电极的断线问题,提升了显示装置的良率。而且,在本实施例中,填充电极与触控信号线同层形成,这样就不用再另外设置专门用于形成填充电极的金属层,在制作过程中只需一次刻蚀工艺,无需对触控信号线与填充电极分别制作掩膜板,在改善像素电极断线问题的同时,并不会增加制程数量,也不会增加生产成本。
在本实施方式中,触控电极复用为公共电极,第二绝缘层17位于公共电极与像素电极之间,用于将公共电极与像素电极绝缘间隔开。
图7是本发明实施方式提供的又一种阵列基板的示意图,图8是图7所示阵列基板的截面图,如图7图8示,该实施例提供的阵列基板10包括多条数据线20与多条扫描线30,该多条数据线20与多条扫描线30交叉设置界定多个像素单元40,多个像素单元40包括延第一方向排列的多列像素单元与延第二方向排列的多行像素单元,同时,在每条扫描线30和数据线20的交叉位置设置有薄膜晶体管T,多个薄膜晶体管T呈矩阵排列。
如图7和图8所示,图1是本发明实施方式提供的一种阵列基板的示意图,图2是图1所示的阵列基板中单个像素单元的示意图。该实施例提供的阵列基板与图1-图3提供的阵列基板的结构相似,包括多条数据线与多条扫描线,该多条数据线与多条扫描线交叉设置界定多个像素单元,多个像素单元包括延第一方向排列的多列像素单元与延第二方向排列的多行像素单元,同时,在每条扫描线和数据线的交叉位置设置有薄膜晶体管T,多个薄膜晶体管T呈矩阵排列。
薄膜晶体管T包括有源层101、栅极31与漏电极21,平坦化层14覆盖薄膜晶体管T的栅极31、有源层101和漏电极21,且在平坦化层14的对应于漏电极21的位置设置有贯穿该平坦化层14的过孔H1,漏电极21完全位于过孔H1的内部,漏电极21的两端与过孔H1的侧壁不接触,漏电极21的两端与过孔H1的侧壁之间存在间隙,即漏电极21的两端之间的宽度L2小于过孔H1的底部的宽度L1,增大了数据线20与漏电极21之间的间距L3,因为像素电极18是与漏电极21连接,且漏电极21与数据线20同层形成,进而增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,进而减小了数据线对像素电极的影响,改善了显示装置的串扰现象。
阵列基板10还包括在平坦化层14上设置的公共电极16,该公共电极16与平坦化层14之间设置有第一绝缘层15,在本实施例中,填充电极22与公共电极16同层形成,并位于过孔H1内部,与漏电极21直接接触并覆盖漏电极21,且部分填充电极22填充在漏电极21的两端与过孔H1的侧壁之间的间隙内,像素电极18直接与填充电极22接触,并通过填充电极22间接连接至漏电极21,由于填充电极具有一定的厚度,可以补偿漏电极与过孔的侧壁之间的段差,改善了像素电极的断线问题,提升了显示装置的良率;而且,填充电极与公共电极利用透明导电材料同层形成,在制作过程中只需一次刻蚀工艺,无需对公共电极与填充电极分别制作掩膜板,在改善像素电极断线问题的同时,并不会增加制程数量,也不会增加生产成本。
进一步的,在本实施例中,漏电极21的两端与过孔H1的侧壁之间还填充有辅助填充件151,用于与填充电极共同补偿漏电极与过孔的侧壁之间的段差,进一步改善了像素电极的断线问题,提升了显示装置的良率,其中,辅助填充件151与第一绝缘层同层形成,无需额外单独制作,并不会增加产品制程与生产成本。
图9是本发明实施方式提供的再一种阵列基板的截面图,如图9所示,该实施例提供的阵列基板与图4-图6提供的阵列基板的结构相似,包括多条数据线与多条扫描线,该多条数据线与多条扫描线交叉设置界定多个像素单元,多个像素单元包括延第一方向排列的多列像素单元与延第二方向排列的多行像素单元,同时,在每条扫描线和数据线的交叉位置设置有薄膜晶体管,多个薄膜晶体管呈矩阵排列。
薄膜晶体管包括有源层、栅极与漏电极,平坦化层14覆盖薄膜晶体管的栅极、有源层和漏电极,且在平坦化层14的对应于漏电极21的位置设置有贯穿该平坦化层14的过孔H1,漏电极21完全位于过孔H1的内部,漏电极21的两端与过孔H1的侧壁不接触,漏电极21的两端与过孔H1的侧壁之间存在间隙,即漏电极21的两端之间的宽度小于过孔H1的底部的宽度,增大了数据线20与漏电极21之间的间距,因为像素电极18是与漏电极21连接,且漏电极21与数据线同层形成,相当于增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,改善了显示装置的串扰现象。
在本实施例中,该阵列基板还包括可以复用为触控电极161的公共电极16,以及通过第三金属层M3形成的触控信号线S,触控信号线S分别连接至对应的触控电极161。位于过孔H1内部、用于覆盖漏电极21的填充电极22,包括第一电极221与第二电极222,第一电极221与第二电极222重叠设置且直接接触,像素电极18直接与填充电极22接触,并通过填充电极间接连接至漏电极21。第一电极221与第二电极222重叠设置,进一步增加了填充电极的填充厚度,可以更好的补偿漏电极的段差,改善了像素电极的断线问题,提升了显示装置的良率。进一步的,第一电极221与触控信号线S经由第三金属层M3同层形成,第二电极222与公共电极16利用透明导电材料同层形成,在制作过程中无需对第一电极221与第二电极222另外制作掩膜板,在改善像素电极断线问题的同时,并不会增加制程数量,也不会增加生产成本。
本发明实施方式提供的阵列基板,通过减小漏电极的宽度增大了数据线与像素电极之间的距离,减小了数据线与像素电极之间的耦合电容,减小了数据线对像素电极的影响,改善了显示装置的串扰现象;并通过在过孔内设置覆盖漏电极的填充电极,补偿因减小漏电极的的宽度产生的段差,改善了像素电极的断线问题,提升了显示装置的良率。
进一步的,本发明实施方式还提供了一种液晶显示面板,图10是本发明实施方式提供的一种液晶显示面板的示意图,如图10所示,该液晶显示面板包括包括对向设置的阵列基板10与彩膜基板50,及密封于该阵列基板10和彩膜基板50之间的液晶层60。在本发明的一个实施方式中,该液晶层60的液晶可以为负性液晶,在工作时,液晶层60内的负性液晶分子在阵列基板上像素电极与公共电极之间的电场作用下,发生旋转或扭曲变化,允许或者阻止光线通过,并通过彩膜基板上的滤光层,显示不同的颜色,最终显示设定的图像。
进一步的,本发明实施方式还提供了一种显示装置,包括上述液晶显示面板。其中,该显示装置可以为手机、平板电脑、电视机、显小器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
注意,上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解,本发明不限于这里所述的特定实施例,对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此,虽然通过以上实施例对本发明进行了较为详细的说明,但是本发明不仅仅限于以上实施例,在不脱离本发明构思的情况下,还可以包括更多其他等效实施例,而本发明的范围由所附的权利要求范围决定。
Claims (11)
1.一种阵列基板,其特征在于,该阵列基板包括:
衬底基板,
多条扫描线与多条数据线交叉设置,
多个呈矩阵排列的薄膜晶体管,每个薄膜晶体管包括栅极、有源层和漏电极,
平坦化层,覆盖所述栅极、有源层和漏电极,所述平坦化层的对应于所述漏电极的位置设置有贯穿所述平坦化层的过孔,所述漏电极的宽度小于所述过孔的底部的宽度,
填充电极,位于所述过孔内,与所述漏电极连接并覆盖所述漏电极,
像素电极,通过所述过孔与所述填充电极连接。
2.根据权利要求1所述的阵列基板,其特征在于,所述阵列基板还包括:
公共电极,所述公共电极位于所述平坦化层与所述像素电极之间,
第二绝缘层,位于所述公共电极与所述像素电极之间,
所述填充电极与所述公共电极同层形成。
3.根据权利要求2所述的阵列基板,其特征在于,所述平坦化层与所述公共电极之间还设置有第一绝缘层,所述漏电极的两端与所述过孔的侧壁之间填充有辅助填充件,所述辅助填充件与所述第一绝缘层同层形成。
4.根据权利要求1所述的阵列基板,其特征在于,所述阵列基板还包括:触控电极,触控信号线,所述触控信号线与对应的所述触控电极连接,
所述填充电极包括第一电极,所述第一电极与所述触控信号线同层形成。
5.根据权利要求4所述的阵列基板,其特征在于,所述触控电极位于所述平坦化层与所述像素电极之间,且所述公共电极与所述像素电极之间间隔有第二绝缘层。
6.根据权利要求5所述的阵列基板,其特征在于,所述填充电极还包括第二电极,所述第二电极与所述触控电极同层形成。
7.根据权利要求4或6所述的阵列基板,其特征在于,所述触控信号线位于所述触控电极与所述平坦化层之间,且所述触控信号线与所述触控电极之间间隔有第一绝缘层。
8.根据权利要求6所述的阵列基板,其特征在于,在显示阶段,所述触控电极复用为公共电极。
9.一种液晶显示面板,包括:如权利要求1-8任一项所述的阵列基板,与所述阵列基板相对设置的彩膜基板,以及,位于所述阵列基板与所述彩膜基板之间的液晶层。
10.根据权利要求9所述的液晶显示面板,其特征在于,所述液晶层包括负性液晶。
11.一种显示装置,包括如权利要求8或9所述的液晶显示面板。
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