CN107017202A - 晶片的加工方法 - Google Patents

晶片的加工方法 Download PDF

Info

Publication number
CN107017202A
CN107017202A CN201611088993.8A CN201611088993A CN107017202A CN 107017202 A CN107017202 A CN 107017202A CN 201611088993 A CN201611088993 A CN 201611088993A CN 107017202 A CN107017202 A CN 107017202A
Authority
CN
China
Prior art keywords
chip
substrate
cut
processing method
guard block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201611088993.8A
Other languages
English (en)
Inventor
森数洋司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Disco Corp
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of CN107017202A publication Critical patent/CN107017202A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K10/00—Welding or cutting by means of a plasma
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/18—Working by laser beam, e.g. welding, cutting or boring using absorbing layers on the workpiece, e.g. for marking or protecting purposes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/362—Laser etching
    • B23K26/364—Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D1/00—Working stone or stone-like materials, e.g. brick, concrete or glass, not provided for elsewhere; Machines, devices, tools therefor
    • B28D1/22—Working stone or stone-like materials, e.g. brick, concrete or glass, not provided for elsewhere; Machines, devices, tools therefor by cutting, e.g. incising
    • B28D1/221—Working stone or stone-like materials, e.g. brick, concrete or glass, not provided for elsewhere; Machines, devices, tools therefor by cutting, e.g. incising by thermic methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386—Separation by peeling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Mechanical Engineering (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mining & Mineral Resources (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)

Abstract

本发明的课题在于提供晶片的加工方法，即使在采用了硬度较高的基板来作为层叠功能层的晶片的情况下，也能够使各个分离得到的器件较薄。一种晶片的加工方法，将在基板的上表面上隔着缓冲层层叠有功能层并在正面上具有由分割预定线划分的多个器件的晶片沿着分割预定线分割成各个器件，其中，该晶片的加工方法具有如下的工序：切断工序，沿着分割预定线至少将功能层切断；保护部件配设工序，在晶片的正面上配设保护部件；缓冲层破坏工序，将对于基板具有透过性的波长的激光光线的聚光点定位于缓冲层而进行照射从而将缓冲层破坏；以及基板剥离工序，将该基板从功能层剥离而分离成每个器件。

Description

晶片的加工方法
技术领域
本发明涉及晶片的加工方法，将正面上形成有功能层的薄板状的晶片分别分离成各个器件。
背景技术
通过激光加工装置等分割装置将在正面上形成有发光器件的晶片或在该基板的上表面上隔着缓冲层层叠有由GaN半导体层构成的功能层并由分割预定线划分而在正面上形成有功率器件的晶片沿着分割预定线切断而分割成各个发光器件、功率器件，并应用在各种照明设备或者电视等电子设备中，其中，该发光器件是在蓝宝石基板、SiC基板的上表面上隔着缓冲层并由分割预定线划分的由n型半导体层、p型半导体层构成的功能层(发光层：也称为epi层)。
上述各器件被应用于移动电话、具有通信功能的手表等，为了实现各装置的进一步小型化、轻量化，寻求使其厚度更薄的技术。作为当使器件从晶片分离而制造出器件时使其变薄的技术，已经提出了被称为先划片的技术(例如，参照专利文献1。)。
该技术是以如下的方式进行的技术：先沿着分割预定线形成深度相当于器件的完工厚度的槽，之后，在晶片的正面上配设保护部件而对晶片的背面进行磨削从而使该槽在背面露出并将晶片分割成各个器件。
专利文献1：日本特开平11-040520号公报
上述专利文献1所记载的技术是通过对晶片的背面进行磨削而使器件变薄的技术，但在硬度较高的晶片例如采用蓝宝石、SiC基板的情况下，很难对晶片的背面进行磨削，存在很难采用该先划片的技术而使分离得到的器件较薄的问题。
发明内容
本发明是鉴于上述事实而完成的，其主要的技术课题在于，提供晶片的加工方法，即使在采用了硬度较高的基板来作为层叠功能层的晶片的情况下，也能够使各个分离得到的器件较薄。
为了解决上述主要的技术课题，根据本发明，提供一种晶片的加工方法，将在基板的上表面上隔着缓冲层层叠有功能层并在正面上具有由分割预定线划分的多个器件的晶片沿着分割预定线分割成各个器件，其中，该晶片的加工方法具有如下的工序：切断工序，沿着分割预定线至少将功能层切断；保护部件配设工序，在实施了该切断工序之后，在晶片的正面上配设保护部件；缓冲层破坏工序，在实施了该保护部件配设工序之后，将对于基板具有透过性的波长的激光光线的聚光点定位于缓冲层而进行照射从而将缓冲层破坏；以及基板剥离工序，在实施了该缓冲层破坏工序之后，将该基板从该功能层剥离而分离出每个器件。
优选在该保护部件配设工序中，将该晶片收纳在具有对该晶片进行收纳的开口部的环状框架的该开口部中并且利用粘合带对该晶片的正面与框架的外周进行粘贴而借助该粘合带将该晶片支承在框架上，从而在该晶片的正面上配设保护部件，该晶片的加工方法还具有如下的拾取工序：在该基板剥离工序之后，对该粘合带进行扩张而使各器件的间隔扩张并从粘合带拾取器件。
而且，作为该切断工序，包含由切削刀具进行的切断、由激光光线进行的切断、由等离子蚀刻进行的切断以及由湿蚀刻进行的切断中的任意方式。
根据本发明的晶片的加工方法，当对采用硬度较高的基板例如蓝宝石基板、SiC基板而形成的由功能层构成的器件进行分离时，不用对各基板进行磨削便能够从功能层剥离，其结果是能够形成极薄的器件。
并且，由于不用对基板进行磨削便能使其从功能层剥离，所以剥离出的基板能够作为用于形成功能层的基板而进行再利用，在经济方面有利。
附图说明
图1的(a)和(b)是光器件晶片的立体图和主要部分放大剖视图。
图2的(a)、(b)和(c)是示出切削工序的说明图。
图3是示出保护部件配设工序的说明图。
图4的(a)和(b)是示出缓冲层破坏工序的说明图。
图5是示出基板剥离工序的说明图。
图6是示出拾取工序的说明图。
标号说明
3：切削装置；31：卡盘工作台；32：切削单元；33：拍摄单元；4：激光光线照射单元；41：聚光器；5：剥离机构；51：吸附单元；52：支承单元；6：分离装置；61：框架保持部件；62：夹具；63：扩张滚筒；64：拾取夹头；10：光器件晶片；11：外延基板；12：光器件层；13：缓冲层；21：分割预定线；22：器件。
具体实施方式
以下，参照附图对本发明实施方式的晶片的加工方法进行详细地说明。在图1的(a)、(b)中示出了作为被加工物的光器件晶片10的立体图和主要部分放大剖视图。关于光器件晶片10，在大致圆板形状的由蓝宝石构成的外延基板11的正面上，通过外延生长法形成有由n型氮化镓半导体层和p型氮化镓半导体层构成的光器件层12。
在通过外延生长法在外延基板11的正面上层叠由n型氮化镓半导体层和p型氮化镓半导体层构成的光器件层12时，在外延基板11的正面与光器件层12之间形成由氮化镓(GaN)构成的、厚度例如为1μm的缓冲层13。关于这样构成的光器件晶片10，在图示的实施方式中光器件层12的厚度例如形成为5μm。另外，在该光器件层12上，如图1的(a)、(b)所示，在由形成为格子形状的多条分割预定线21划分出的多个区域内形成有器件22。
以下，对沿着分割预定线21将该光器件晶片10分割成各个器件22的晶片的加工方法进行更具体地说明。
(切断工序)
首先，如图2的(a)～(c)所示，通过具有规定的厚度的切削刀具从该光器件晶片10的正面侧沿着分割预定线21形成深度相当于作为功能层形成的至少光器件层12的厚度的切削槽21a，将光器件层12切断。
图2的(a)所示的切削装置3具有：卡盘工作台31，其对被加工物进行保持；切削单元32，其对保持在该卡盘工作台31上的被加工物进行切削；以及拍摄单元33，其对保持在该卡盘工作台31上的被加工物进行拍摄。卡盘工作台31构成为对被加工物进行吸引保持，通过未图示的切削进给单元使卡盘工作台31按照图2的(a)中箭头X所示的切削进给方向移动。
上述切削单元32包含：主轴外壳321，其实际上水平配置；旋转主轴322，其被该主轴外壳321支承为自由旋转；以及切削刀具323，其具有安装在该旋转主轴322的前端部的环状的切削刃323a，旋转主轴322通过配设在主轴外壳321内的未图示的伺服电动机而按照箭头322a所示的方向旋转。上述拍摄单元33由显微镜和CCD照相机等光学单元构成，该拍摄单元33将拍摄得到的图像信号发送给未图示的控制单元，该控制单元执行图案匹配等图像处理并完成切削区域的对准，其中，该图案匹配等图像处理用于进行形成于光器件晶片10的分割预定线21与切削刀具323的对位。
在如以上那样实施了对准之后，将保持了光器件晶片10的卡盘工作台31移动至切削加工区域的切削开始位置，对切削刀具323向下方进行切入进给，并且使切削刀具323以规定的旋转速度旋转并使卡盘工作台31按照箭头X所示的方向以规定的切削进给速度移动并移动到X轴方向的切削结束位置，从而形成切削槽21a(切削槽形成工序)，并停止卡盘工作台31的移动。然后，使切削刀具323上升，并且在箭头Y所示的方向(分度进给方向)上对卡盘工作台31进行分度进给，将接下来待切削的分割预定线21定位在与切削刀具323对应的位置而实施上述的切削槽形成工序。并且，对形成在该光器件晶片10上的全部的分割预定线21实施上述的切削槽形成工序(参照图2的(c))。另外，在该实施方式中，将其切削深度设定为不仅切断光器件层12还同时将缓冲层13切断。至此，切断工序结束。
(保护部件配设工序)
在实施了上述的对光器件晶片10的切断工序之后，实施保护部件配设工序，在光器件晶片10的形成有光器件层12的正面侧粘贴作为保护部件的粘合带T。即，如图3所示，将上述的光器件晶片10的正面即光器件层12侧粘贴在作为保护部件的粘合带T的正面上，该粘合带T的外周部被安装成覆盖环状的框架F的内侧开口部，保护部件配设工序结束。因此，粘贴在粘合带T上的光器件晶片10的背面侧即外延基板11侧成为上侧。
(缓冲层破坏工序)
在保护部件配设工序结束之后，使用具有图4所示那样的激光光线照射单元4的激光加工装置来实施缓冲层破坏工序。另外，该激光加工装置也能够使用公知的激光加工装置，由于不是构成本发明的主要部分，所以对整体构造和其详细的情况省略了说明。
为了实施图4所示的缓冲层破坏工序，将实施了上述保护部件配设工序的光器件晶片10的粘合带T侧载置在该激光加工装置所具有的卡盘工作台(省略了图示)上。然后使未图示的吸引单元工作，由此，隔着粘合带T将光器件晶片10吸引保持在卡盘工作台上(晶片保持工序)。另外，虽然在图4的(a)中省略了图示，但通过配设在卡盘工作台上的合适的框架保持部件来保持环状的框架F。
在如上述那样实施了晶片保持工序之后，将吸引保持了光器件晶片10的卡盘工作台移动至激光加工装置的加工区域，如图4的(a)所示，将其定位在激光光线照射单元4的聚光器41的正下方。并且，如图4的(b)所示，通过来自未图示的控制单元的控制信号来使激光光线照射单元4工作，从光器件晶片10的外延基板11侧对缓冲层13照射对于构成外延基板11的蓝宝石具有透过性并且对于构成缓冲层13的氮化镓(GaN)具有吸收性的波长的激光光线，而进行破坏缓冲层13的激光光线的照射。此时，一边照射激光光线，一边使卡盘工作台按照箭头X所示的加工进给方向和箭头Y所示的分度进给方向移动，并对从聚光器41照射的脉冲激光光线的光斑进行控制以便对光器件晶片10的缓冲层13的整个面进行照射(激光光线照射工序)。其结果是，光器件层12与外延基板11之间所形成的缓冲层13在整个区域内被破坏，由缓冲层13实现的外延基板11与光器件层12的结合功能丧失。
例如按照以下的方式对上述激光光线照射工序中的加工条件进行设定。
光源：DPSS激光(二极管激励固体激光)
波长：266nm
重复频率：50kHz
输出：0.2W
光斑直径：φ50μm
脉冲宽度：10ps
进给速度：1000mm/s
(基板剥离工序)
在实施了上述的缓冲层破坏工序之后，接着实施基板剥离工序，将光器件晶片10的外延基板11剥离(参照图5)。首先，如果缓冲层破坏工序结束，则将载置有该光器件晶片10的卡盘工作台移动至配设有剥离机构5的剥离位置，并将保持在该卡盘工作台上的光器件晶片10定位在被支承单元52支承的吸附单元51的正下方而使该吸附单元51下降。并且，使借助吸引通路511支承的吸引垫512a～512c与外延基板11接触。如果吸引垫512a～512c与外延基板11的背面接触，则使未图示的吸引单元工作而经由该支承单元52和吸引通路511作用负压从而通过该吸引垫512a～512c对外延基板11的背面进行吸附。在利用该吸引垫512a～512c对外延基板11进行吸附之后，如图5所示那样使吸附了该外延基板11的吸引垫512a～512c向从外延基板11远离的方向即向上方移动而使外延基板11从光器件层12剥离，基板剥离工序结束。如果该基板剥离工序结束，则将剥离后的外延基板11收纳在未图示的外延基板收纳容器中，而成为此前层叠在外延基板11上的多个器件22被逐个分离而被保持在卡盘工作台上所载置的粘合带T上的状态。另外，通过在实施上述缓冲层破坏工序与实施该基板剥离工序之间的期间加入对光器件晶片10的缓冲层13的加热、冷却工序，由此，能够更可靠地实施基板剥离工序。
(拾取工序)
当上述基板剥离工序结束时，实施拾取工序，从粘合带T拾取该器件22。该拾取工序是在拾取装置6中实施的，在图6中示出了该拾取装置6的一部分，该拾取装置6具有：框架保持部件61；夹具62，其将环状的框架F载置在框架保持部件61的上表面部而对该环状的框架F进行保持；以及扩张滚筒63，其由至少上方开口的圆筒形状构成，用于对与粘合带T一起保持在上表面上的各个器件22进行扩张，该粘合带T被安装在由该夹具62保持的环状的框架F上。框架保持部件61被支承单元623支承为能够升降，该支承单元623包含以围绕扩张滚筒63的方式设置的多个气缸623a和从气缸623a延伸的活塞杆623b。
该扩张滚筒63被设定为比环状的框架F的内径小并比光器件晶片10的外径大，其中，该光器件晶片10粘贴在粘合带T上，该粘合带T安装在环状的框架F上。这里，如图6所示，分离装置6能够位于框架保持部件61与扩张滚筒63的上表面部为大致同一的高度的位置(如虚线所示)和通过支承单元623的作用来使框架保持部件61下降，而使扩张滚筒63的上端部比框架保持部件61的上端部高的位置(如实线所示)。
当使上述框架保持部件61下降而使扩张滚筒63的上端从虚线所示的位置相对变化为以实线所示的比框架保持部件61高的位置时，安装在环状的框架F上的粘合带T与扩张滚筒63的上端缘接触而被扩张。其结果是，由于张力呈放射状地作用于粘贴在粘合带T上的光器件晶片10，所以已经被分割的各个器件22彼此的间隔被扩大。并且，在各个器件22彼此的间隔被扩大的状态下，使拾取夹头64工作而对已经被分割的器件22进行吸附，将器件从粘合带T剥离而进行拾取，并搬送到未图示的收纳托盘中。通过以上动作，拾取工序结束，本发明的晶片的加工方法完成。另外，在上述说明中，在切断工序中，不仅将光器件层12切断还同时将缓冲层13切断，但不一定仅限于此。在切断工序中，将切削深度设定成至少将光器件层12切断即可，当缓冲层13在切断工序中没有被完全切断而有残存的情况下，在该拾取工序中当粘合带T被扩张时会完全地分离。
本发明的晶片的加工方法并不仅限于在上述实施方式中记载的具体的结构。在上述实施方式中，按照对在由蓝宝石形成的外延基板上形成了功能层(光器件)的晶片进行加工的例子进行了说明，但本发明也能够适用于例如对在SiC基板上形成了功能层(功率器件)的半导体晶片进行加工的情况。并且，虽然在上述说明中，说明了本发明在对硬度较高的基板进行加工的情况下有效，但不一定仅限于对硬度较高的基板进行加工的情况，本发明也适用于硬度较低的基板，与以往技术相比，能够容易地制造出厚度较薄的器件，并能够起到与上述的实施方式同样的作用效果。
并且，在上述实施方式中，对作为实施切断工序的具体的方式使用切削刀具沿着分割预定线形成切削槽的情况进行了说明，但并不仅限于此。作为形成切削槽的方式，也可以选择使用激光光线来进行切断、使用等离子蚀刻来进行切断、使用湿蚀刻来进行切断等任意的切断方式。
进而，在上述实施方式中，在保护部件配设工序中，将晶片收纳在具有对晶片进行收纳的开口部的框架的开口部中并且利用粘合带对晶片的正面和框架的外周进行粘贴，借助粘合带将晶片支承在框架上从而在晶片的正面上配设保护部件，但并不仅限于此。例如，也可以仅将作为形成有与晶片同一形状的保护部件的带粘贴在晶片的正面上，或者通过将树脂等涂布在晶片的正面上而配设保护部件。
如上述那样，根据本发明，能够通过实施缓冲层破坏工序、基板剥离工序而将隔着缓冲层形成了功能层的基板侧基本上完全地去除，因此与通过先划片形成的器件相比，能够得到仅由功能层形成的极薄的器件，并能够通过应用于移动电话、具有通信功能的手表等而有助于各装置的进一步小型化、轻量化。并且，由于不用进行磨削便使基板从功能层剥离，所以剥离出的基板能够作为用于形成功能层的基板而进行再利用，在经济方面有利。

Claims (3)

1.一种晶片的加工方法，将在基板的上表面上隔着缓冲层层叠有功能层并在正面上具有由分割预定线划分的多个器件的晶片沿着分割预定线分割成各个器件，其中，该晶片的加工方法具有如下的工序：
切断工序，沿着分割预定线至少将功能层切断；
保护部件配设工序，在实施了该切断工序之后，在晶片的正面上配设保护部件；
缓冲层破坏工序，在实施了该保护部件配设工序之后，将对于基板具有透过性的波长的激光光线的聚光点定位于缓冲层而进行照射从而将缓冲层破坏；以及
基板剥离工序，在实施了该缓冲层破坏工序之后，将该基板从该功能层剥离而分离成每个器件。
2.根据权利要求1所述的晶片的加工方法，其中，
在该保护部件配设工序中，将该晶片收纳在具有对该晶片进行收纳的开口部的环状框架的该开口部中并且利用粘合带对该晶片的正面与框架的外周进行粘贴而借助该粘合带将该晶片支承在框架上，从而在该晶片的正面上配设保护部件，
该晶片的加工方法还具有如下的拾取工序：在该基板剥离工序之后，对该粘合带进行扩张而使各器件的间隔扩张并从粘合带拾取器件。
3.根据权利要求1或2所述的晶片的加工方法，其中，
该切断工序包含由切削刀具进行的切断、由激光光线进行的切断、由等离子蚀刻进行的切断以及由湿蚀刻进行的切断中的任意方式。
CN201611088993.8A 2015-12-04 2016-11-30 晶片的加工方法 Pending CN107017202A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015237183A JP2017103405A (ja) 2015-12-04 2015-12-04 ウエーハの加工方法
JP2015-237183 2015-12-04

Publications (1)

Publication Number Publication Date
CN107017202A true CN107017202A (zh) 2017-08-04

Family

ID=58722557

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201611088993.8A Pending CN107017202A (zh) 2015-12-04 2016-11-30 晶片的加工方法

Country Status (6)

Country Link
US (1) US10079179B2 (zh)
JP (1) JP2017103405A (zh)
KR (1) KR20170066250A (zh)
CN (1) CN107017202A (zh)
DE (1) DE102016224035A1 (zh)
TW (1) TWI704609B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110233129A (zh) * 2018-03-05 2019-09-13 株式会社迪思科 器件的移设方法
CN111180391A (zh) * 2018-11-12 2020-05-19 株式会社迪思科 剥离方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7058904B2 (ja) * 2017-09-08 2022-04-25 株式会社ディスコ ウェーハの加工方法
JP6976651B2 (ja) * 2017-09-08 2021-12-08 株式会社ディスコ ウェーハの加工方法
JP6973922B2 (ja) * 2017-09-08 2021-12-01 株式会社ディスコ ウェーハの加工方法
JP7013085B2 (ja) * 2017-09-08 2022-01-31 株式会社ディスコ ウェーハの加工方法
JP7258414B2 (ja) * 2018-08-28 2023-04-17 株式会社ディスコ 光デバイスウェーハの加工方法
US20200321250A1 (en) * 2019-04-02 2020-10-08 Semiconductor Components Industries, Llc Wet chemical die singulation systems and related methods

Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1801498A (zh) * 2005-01-07 2006-07-12 北京大学 分立晶粒垂直结构的led芯片制备方法
CN1973375A (zh) * 2004-03-29 2007-05-30 J.P.瑟塞尔联合公司 使用激光束分离材料层的方法
CN101604659A (zh) * 2008-06-13 2009-12-16 株式会社迪思科 光器件晶片的分割方法
CN101866881A (zh) * 2009-04-20 2010-10-20 株式会社迪思科 光器件晶片的加工方法
CN102117769A (zh) * 2009-12-30 2011-07-06 鸿富锦精密工业（深圳）有限公司 发光二极管芯片的制备方法
CN102569056A (zh) * 2010-12-17 2012-07-11 株式会社迪思科 光器件晶片的加工方法
CN102569057A (zh) * 2010-12-24 2012-07-11 株式会社迪思科 光器件晶片的加工方法
CN102881662A (zh) * 2011-07-13 2013-01-16 株式会社迪思科 光器件晶片的加工方法
TW201316544A (zh) * 2011-10-06 2013-04-16 High Power Optoelectronics Inc 發光二極體激光剝離方法
CN103056526A (zh) * 2011-10-18 2013-04-24 株式会社迪思科 具有等离子检测构件的激光加工装置
CN103128440A (zh) * 2011-11-24 2013-06-05 株式会社迪思科 光器件晶片的加工方法
CN103378228A (zh) * 2012-04-24 2013-10-30 株式会社迪思科 剥离方法
CN103378232A (zh) * 2012-04-26 2013-10-30 株式会社迪思科 提离方法
CN103943741A (zh) * 2013-01-17 2014-07-23 易美芯光（北京）科技有限公司 一种基于激光剥离的半导体发光器件的制备方法
US20140227813A1 (en) * 2013-02-12 2014-08-14 Nichia Corporation Method of manufacturing light emitting element
CN104701427A (zh) * 2015-02-13 2015-06-10 西安神光皓瑞光电科技有限公司 一种垂直结构led芯片制备方法
CN104821347A (zh) * 2014-01-31 2015-08-05 株式会社迪思科 剥离方法
CN104979435A (zh) * 2014-04-14 2015-10-14 株式会社迪思科 光器件晶片的加工方法
CN105097679A (zh) * 2014-05-19 2015-11-25 株式会社迪思科 剥离方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1140520A (ja) 1997-07-23 1999-02-12 Toshiba Corp ウェーハの分割方法及び半導体装置の製造方法
JP5710532B2 (ja) * 2012-03-26 2015-04-30 株式会社東芝 半導体発光装置及びその製造方法
JP6215544B2 (ja) * 2013-03-18 2017-10-18 株式会社ディスコ ウエーハの加工方法

Patent Citations (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1973375A (zh) * 2004-03-29 2007-05-30 J.P.瑟塞尔联合公司 使用激光束分离材料层的方法
US20070298587A1 (en) * 2004-03-29 2007-12-27 J.P. Sercel Associates Inc. Method of separating layers of material
CN1801498A (zh) * 2005-01-07 2006-07-12 北京大学 分立晶粒垂直结构的led芯片制备方法
CN101604659A (zh) * 2008-06-13 2009-12-16 株式会社迪思科 光器件晶片的分割方法
CN101866881A (zh) * 2009-04-20 2010-10-20 株式会社迪思科 光器件晶片的加工方法
CN102117769A (zh) * 2009-12-30 2011-07-06 鸿富锦精密工业（深圳）有限公司 发光二极管芯片的制备方法
CN102569056A (zh) * 2010-12-17 2012-07-11 株式会社迪思科 光器件晶片的加工方法
CN102569057A (zh) * 2010-12-24 2012-07-11 株式会社迪思科 光器件晶片的加工方法
CN102881662A (zh) * 2011-07-13 2013-01-16 株式会社迪思科 光器件晶片的加工方法
TW201316544A (zh) * 2011-10-06 2013-04-16 High Power Optoelectronics Inc 發光二極體激光剝離方法
CN103056526A (zh) * 2011-10-18 2013-04-24 株式会社迪思科 具有等离子检测构件的激光加工装置
CN103128440A (zh) * 2011-11-24 2013-06-05 株式会社迪思科 光器件晶片的加工方法
CN103378228A (zh) * 2012-04-24 2013-10-30 株式会社迪思科 剥离方法
CN103378232A (zh) * 2012-04-26 2013-10-30 株式会社迪思科 提离方法
CN103943741A (zh) * 2013-01-17 2014-07-23 易美芯光（北京）科技有限公司 一种基于激光剥离的半导体发光器件的制备方法
US20140227813A1 (en) * 2013-02-12 2014-08-14 Nichia Corporation Method of manufacturing light emitting element
CN104821347A (zh) * 2014-01-31 2015-08-05 株式会社迪思科 剥离方法
CN104979435A (zh) * 2014-04-14 2015-10-14 株式会社迪思科 光器件晶片的加工方法
CN105097679A (zh) * 2014-05-19 2015-11-25 株式会社迪思科 剥离方法
CN104701427A (zh) * 2015-02-13 2015-06-10 西安神光皓瑞光电科技有限公司 一种垂直结构led芯片制备方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110233129A (zh) * 2018-03-05 2019-09-13 株式会社迪思科 器件的移设方法
CN110233129B (zh) * 2018-03-05 2024-03-12 株式会社迪思科 器件的移设方法
CN111180391A (zh) * 2018-11-12 2020-05-19 株式会社迪思科 剥离方法
CN111180391B (zh) * 2018-11-12 2024-02-06 株式会社迪思科 剥离方法

Also Published As

Publication number Publication date
KR20170066250A (ko) 2017-06-14
US20170162441A1 (en) 2017-06-08
TWI704609B (zh) 2020-09-11
TW201730944A (zh) 2017-09-01
US10079179B2 (en) 2018-09-18
DE102016224035A1 (de) 2017-06-08
JP2017103405A (ja) 2017-06-08

Similar Documents

Publication Publication Date Title
CN107017202A (zh) 晶片的加工方法
TWI626761B (zh) Optical device wafer processing method
TWI631665B (zh) 光裝置之加工方法
CN104022080B (zh) 晶片的加工方法
US7666760B2 (en) Method of dividing wafer
US7446022B2 (en) Wafer laser processing method
CN103943567B (zh) 晶片加工方法
CN106531623B (zh) 加工衬底的方法
CN104148816A (zh) 激光加工方法
US20140322847A1 (en) Wafer processing method
US10083849B2 (en) Method of processing wafer
CN102398313B (zh) 光器件晶片的加工方法
CN101866881A (zh) 光器件晶片的加工方法
CN105529302A (zh) 晶片的加工方法
JP2009032970A (ja) 窒化物半導体素子の製造方法
KR102486694B1 (ko) 광 디바이스 웨이퍼의 가공 방법
CN108022877A (zh) 晶片的加工方法
US20130137203A1 (en) Optical device wafer processing method
CN107017201A (zh) 晶片的加工方法
CN108022876A (zh) 晶片的加工方法
CN108206150A (zh) 芯片接合机
CN104078425A (zh) 晶片的加工方法
US20220084827A1 (en) Laminated element manufacturing method
US10297710B2 (en) Method of processing wafer
US8759195B2 (en) Optical device wafer processing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20170804

RJ01 Rejection of invention patent application after publication