CN106992213A - 薄膜晶体管及其制造方法 - Google Patents

薄膜晶体管及其制造方法 Download PDF

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CN106992213A
CN106992213A CN201710181508.XA CN201710181508A CN106992213A CN 106992213 A CN106992213 A CN 106992213A CN 201710181508 A CN201710181508 A CN 201710181508A CN 106992213 A CN106992213 A CN 106992213A
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groove
tft
thin film
film transistor
electrode
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谢华飞
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to CN201710181508.XA priority Critical patent/CN106992213A/zh
Priority to PCT/CN2017/081241 priority patent/WO2018170985A1/zh
Priority to US15/528,742 priority patent/US10586874B2/en
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Abstract

本发明公开一种薄膜晶体管及其制造方法。所述方法包括：将含有碳量子点的量子点墨水沉积在源极和漏极之间的沟道区中；在量子点墨水干燥后，对干燥后的量子点墨水进行清洗与吹干处理，使得碳量子点成膜为薄膜晶体管的有源层。基于此，本发明能够简化薄膜晶体管的制造工艺，提高生产效率，降低生产成本，并提高其控制灵敏度。

Description

薄膜晶体管及其制造方法
技术领域
本发明涉及显示领域，具体涉及一种薄膜晶体管及其制造方法。
背景技术
随着科技的发展和社会的进步，人们对于信息存储、传递及其处理的依赖程度日益增加。而半导体器件和工艺技术作为信息的存储、传递及其处理的主要载体和物质基础，现已成为众多科学家争相研究的热点。薄膜晶体管(Thin Film Transistor,TFT)，作为一种非常重要的半导体器件已被业界普遍采用。然而，现有薄膜晶体管一般为基于微电子硅工艺的半导体器件，其有源层需要涂布光阻、曝光、显影、刻蚀等多道工艺制得，制造工艺复杂，从而影响生产效率，使得生产成本居高不下。并且，随着人们对高性能薄膜晶体管要求的逐步提升，基于微电子硅工艺的薄膜晶体管已难以满足当今信息社会对高灵敏度的需求。
发明内容
有鉴于此，本发明提供一种薄膜晶体管及其制造方法，能够简化制造工艺，提高生产效率，降低生产成本，并提高控制灵敏度。
本发明一实施例的薄膜晶体管的制造方法，包括：
在衬底基材上形成间隔设置的源极和漏极，且所述源极和所述漏极之间形成沟道区；
将含有碳量子点的量子点墨水沉积在沟道区中；
在所述量子点墨水干燥后，对干燥后的量子点墨水进行清洗与吹干处理，使得所述碳量子点成膜为薄膜晶体管的有源层。
本发明一实施例的薄膜晶体管，包括：
位于衬底基材上的源极和漏极，所述源极和所述漏极间隔设置且两者之间形成沟道区；
位于所述沟道区中的有源层，所述有源层包括碳量子点膜。
通过上述方案，本发明将含有碳量子点的量子点墨水沉积在源极和漏极之间的沟道区中，并经过干燥、清洗与吹干处理得到有源层，无需涂布光阻、曝光、显影、刻蚀等多道工艺即可制得有源层，因此能够简化薄膜晶体管的制造工艺，提高生产效率，降低生产成本，并且有源层充分利用碳量子点的良好的电学性能，能够提高其控制灵敏度。
附图说明
图1是本发明的薄膜晶体管的制造方法一实施例的流程示意图；
图2是基于图1所示方法在衬底基材上形成薄膜晶体管的示意图；
图3是本发明的薄膜晶体管的制造方法另一实施例的流程示意图；
图4是基于图3所示方法在衬底基材上形成薄膜晶体管的示意图。
具体实施方式
本发明其中一个主要目的是通过量子点墨水制得薄膜晶体管的有源层，具体地，可以将含有量子点的量子点墨水沉积在源极和漏极之间的沟道区中，并经过干燥、清洗与吹干处理得到有源层。该有源层既可以用于顶栅型薄膜晶体管，也可以用于底栅型薄膜晶体管。
下面结合附图对本发明的各个实施例的技术方案进行清楚、完整地描述。在不冲突的情况下，下述各个实施例的特征可相互组合。
请参阅图1，为本发明一实施例的薄膜晶体管的制造方法。所述薄膜晶体管的制造方法可以包括以下步骤S11～S17。
S11：通过纳米压印工艺在衬底基材上形成间隔设置的第一凹槽和第二凹槽。
请参阅图2，纳米压印工艺是一种在纳米级尺度的图案化工艺，其通过光刻可在衬底基材20上形成第一凹槽211和第二凹槽212。其中，衬底基材20包括但不限于PET(Polyethylene terephthalate,聚对苯二甲酸乙二醇酯)基材、(Polyimide,聚酰亚胺)基材。
S12：在第一凹槽和第二凹槽中分别填入导电浆料以得到电极基底。
导电浆料包括但不限于导电银浆、导电铜浆、导电铝浆等，其固化形成的电极基底22用于提高源极221和漏极222与衬底基材20的胶接强度。例如，金属材质的源极221和漏极222与塑料材质的衬底基材20的结合效果并不理想，而导电浆料固化后得到的电极基底22对金属和塑料都具有良好的结合效果。
S13：通过刷镀工艺在电极基底上形成源极和漏极，且所述源极和漏极之间形成沟道区。
本实施例可以将衬底基材20连接阴极，浸有镀液的镀笔作阳极，镀液在直流电场作用下发生电解反应，镀液中的金属离子得到电子后沉积在衬底基材20表面。在刷镀过程中，通过控制镀笔在第一凹槽211和第二凹槽212中相对电极基底22运动，即可在两个凹槽的电极基底22上分别形成一定厚度的金属层。其中，第一凹槽211中的金属层为源极221，第二凹槽212中的金属层为漏极222。源极221和漏极222之间限定了薄膜晶体管的沟道区223。
当然，其他实施例可以直接在第一凹槽211和第二凹槽212中形成源极221和漏极222，而不填入导电浆料，即省略电极基底22的制程。
在实际应用场景中，本实施例可以采用金、铝、铜、银、铬等功函数大于预定阈值的金属制得源极221和漏极222。该预定阈值可根据实际情况进行调整。刷镀工艺的电压可以为2.0～5.0V。
另外，本实施例可以在刷镀之前对第一凹槽211和第二凹槽212进行镀前预处理，以使得槽内表面平滑和清洁，进一步，在刷镀完成后对源极221和漏极222进行镀后处理，以清除两者表面的残积物。
S14：将含有碳量子点的量子点墨水沉积在沟道区中。
本实施例可以采用滤膜对溶解在辛烷、氯仿、正己烷、甲苯等低沸点且弱极性有机溶剂中的碳量子点进行过滤，以去除其中的团聚物而得到量子点墨水。该滤膜可以为具有0.22μm滤孔的有机滤膜。
然后，通过打印或者滴涂方式将量子点墨水沉积在源极221和漏极222之间的沟道区223中。
S15：在量子点墨水干燥后，对干燥后的量子点墨水进行清洗与吹干处理，使得所述碳量子点成膜为薄膜晶体管的有源层。
在量子点墨水干燥后，其中的碳量子点在沟道区223沉积成为一层膜。然后，可以采用甲醇、乙醇、丙酮等低沸点且强极性溶剂对该层膜进行清洗，并用氮气吹干，以去除其中的有机物等杂质。为了确保杂质去除效果，本实施例可以对所述膜反复清洗与吹干，例如4次。至此，即可制得由碳量子点形成的有源层23。
S16：通过旋涂成膜工艺形成覆盖有源层、源极和漏极的绝缘层。
参阅图2，在有源层23、源极221和漏极222的上方旋涂一介电层，该介电层可以是含有钛酸钡、氧化铪、二氧化钛中至少一种的无机介电层，也可以是含有聚偏氟乙烯(PVDF)、聚甲基丙烯酸甲酯(PMMA)、聚酰亚胺(PI)、聚对乙烯基苯酚(PVP)、聚乙烯醇(PVA)、聚乙烯苯酚(PS)中至少一种的有机介电层。
将旋涂有介电层的结构件放置于150℃的烘箱中烘烤30秒，介电层中的溶液蒸发，待冷却后即可成膜得到绝缘层24。
S17：通过喷涂打印工艺在所述绝缘层上形成栅极。
在沟道区223上方，本实施例可将含有金、银、铜等任一种金属微粒的导电墨水喷涂打印在绝缘层24上，然后对其进行100℃烘烤并持续30分钟，导电墨水中的溶液蒸发，冷却后得到的金属层即为栅极25。
据此，本实施例可制得顶栅型薄膜晶体管。
由上述可知，本实施例将含有碳量子点的量子点墨水沉积在源极221和漏极222之间的沟道区223中，并经过干燥、清洗与吹干处理得到有源层23，相比较于现有技术，本实施例无需涂布光阻、曝光、显影、刻蚀等多道工艺即可制得有源层23，因此能够简化薄膜晶体管的制造工艺，提高生产效率，降低生产成本，并且有源层23充分利用碳量子点的良好的电学性能，能够提高薄膜晶体管的控制灵敏度。
进一步地，上述源极221和漏极222、有源层23、绝缘层24、栅极25的制造工艺均可通过相应地溶液制得，基于此，本实施例可视为一种基于全溶液法制造薄膜晶体管的工艺。鉴于溶液的可流动性及成膜厚度均匀的特点，本实施例可以在柔性衬底基材20上形成上述各层结构，即，本发明能够有利于显示面板的柔性化设计。
另外，由于采用碳量子点形成有源层23，因此本实施例能够减少对金属元素的依赖，相对于金属量子点而言，碳量子点无毒，对环境危害较小，造价也更加低廉。当然，在全溶液法制造薄膜晶体管的工艺中，本发明的其他实施例可以采用金属量子点或其他类型量子点制得有源层23，从而使得该工艺具有原料来源范围广的优点。
本发明还提供一实施例的薄膜晶体管，可以由图1和图2所示方法制得，其结构可参阅图2所示，此处不再赘述。
请参阅图3，为本发明另一实施例的薄膜晶体管的制造方法。所述薄膜晶体管的制造方法可以包括以下步骤S31～S37。
S31：通过纳米压印工艺在衬底基材上形成凹槽，所述凹槽包括上下导通的第一区域和第二区域，所述第二区域在衬底基材上的正投影落于第一区域在衬底基材上的正投影之内。
请参阅图4，第一区域411位于第二区域412的上方，在沿衬底基材40的截面上，第二区域412的长度小于第一区域411的长度。
S32：在凹槽的第二区域中填入导电浆料以得到电极基底。
S33：通过喷涂打印工艺在电极基底上形成栅极。
本实施例可将含有金、银、铜等任一种金属微粒的导电墨水喷涂打印在电极基底41上，然后对其进行100℃烘烤并持续30分钟，导电墨水中的溶液蒸发，冷却后得到的金属层即为栅极42。
当然，其他实施例也可以直接在第二区域412中形成栅极42，而不填入导电浆料，即省略电极基底41的制程。
S34：通过旋涂成膜工艺在凹槽的第一区域中形成绝缘层。
S35：通过刷镀工艺在绝缘层上形成间隔设置的源极和漏极，且所述源极和漏极之间形成沟道区。
本实施例可以将绝缘层43连接阴极，浸有镀液的镀笔作阳极，镀液在直流电场作用下发生电解反应，镀液中的金属离子得到电子后沉积在绝缘层43表面。在刷镀过程中，通过控制镀笔相对绝缘层43运动，即可形成具有一定厚度的两个金属层。其中一个金属层为源极441，另一个金属层为漏极442。源极441和漏极442之间限定沟道区443。
S36：将含有碳量子点的量子点墨水沉积在沟道区中。
S37：在量子点墨水干燥后，对干燥后的量子点墨水进行清洗与吹干处理，使得所述碳量子点成膜为薄膜晶体管的有源层。
本实施例形成有源层45的原理及过程可参阅上述实施例，此处不再赘述。据此，本实施例可制得底栅型薄膜晶体管。
其中，源极441和漏极442、有源层45、绝缘层43、栅极42的制造工艺可以与上述顶栅型薄膜晶体管的各结构的制造工艺相同，因此本实施例也具有上述有益效果。
本发明还提供另一实施例的薄膜晶体管，可以由图3和图4所示方法制得，其结构可参阅图4所示，此处不再赘述。
应理解，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

1.一种薄膜晶体管的制造方法，其特征在于，所述方法包括：
在衬底基材上形成间隔设置的源极和漏极，且所述源极和所述漏极之间形成沟道区；
将含有碳量子点的量子点墨水沉积在所述沟道区中；
在所述量子点墨水干燥后，对干燥后的量子点墨水进行清洗与吹干处理，使得所述碳量子点成膜为薄膜晶体管的有源层。
2.根据权利要求1所述的方法，其特征在于，
在衬底基材上形成间隔设置的源极和漏极，包括：
通过纳米压印工艺在衬底基材上形成间隔设置的第一凹槽和第二凹槽；
通过刷镀工艺在所述第一凹槽和第二凹槽中分别形成源极和漏极；
在所述碳量子点成膜为薄膜晶体管的有源层之后，所述方法包括：
通过旋涂成膜工艺形成覆盖有源层、源极和漏极的绝缘层；
通过喷涂打印工艺在所述绝缘层上形成栅极。
3.根据权利要求2所述的方法，其特征在于，通过刷镀工艺在所述第一凹槽和第二凹槽中分别形成源极和漏极，包括：
在所述第一凹槽和第二凹槽中分别填入导电浆料以得到电极基底；
在所述电极基底上形成源极和漏极。
4.根据权利要求1所述的方法，其特征在于，
在衬底基材上形成间隔设置的源极和漏极之前，所述方法包括：
通过纳米压印工艺在衬底基材上形成凹槽，所述凹槽包括上下导通的第一区域和第二区域，所述第二区域在所述衬底基材上的正投影落于所述第一区域在所述衬底基材上的正投影之内；
通过喷涂打印工艺在所述凹槽的第二区域中形成栅极；
通过旋涂成膜工艺在所述凹槽的第一区域中形成绝缘层；
在衬底基材上形成间隔设置的源极和漏极，包括：
在所述绝缘层上形成间隔设置的源极和漏极。
5.根据权利要求4所述的方法，其特征在于，通过喷涂打印工艺在所述凹槽的第二区域中形成栅极，包括：
在所述凹槽的第二区域中填入导电浆料以得到电极基底；
通过喷涂打印工艺在所述电极基底上形成栅极。
6.一种薄膜晶体管，其特征在于，所述薄膜晶体管包括：
位于衬底基材上的源极和漏极，所述源极和所述漏极间隔设置且两者之间形成沟道区；
位于所述沟道区中的有源层，所述有源层包括碳量子点膜。
7.根据权利要求6所述的薄膜晶体管，其特征在于，所述薄膜晶体管还包括依次形成于有源层上方的绝缘层和栅极，其中，衬底基材开设有间隔设置的第一凹槽和第二凹槽，源极和漏极分别位于所述第一凹槽和第二凹槽中，所述绝缘层覆盖于有源层、源极和漏极上方。
8.根据权利要求7所述的薄膜晶体管，其特征在于，所述薄膜晶体管还包括形成于所述第一凹槽和第二凹槽中的电极基底，所述源极和漏极分别位于所述电极基底上。
9.根据权利要求6所述的薄膜晶体管，其特征在于，所述薄膜晶体管还包括依次形成于有源层下方的绝缘层和栅极，其中，衬底基材开设有凹槽，所述凹槽包括上下导通的第一区域和第二区域，所述第二区域在衬底基材上的正投影落于所述第一区域在衬底基材上的正投影之内，所述栅极位于所述第二区域中，所述绝缘层位于所述第一区域中。
10.根据权利要求9所述的薄膜晶体管，其特征在于，所述薄膜晶体管还包括形成于所述第一区域中的电极基底，所述栅极位于所述电极基底上。
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