CN106973525A - A kind of preparation method of the high multilayer backboard of N+N types - Google Patents
A kind of preparation method of the high multilayer backboard of N+N types Download PDFInfo
- Publication number
- CN106973525A CN106973525A CN201710265793.3A CN201710265793A CN106973525A CN 106973525 A CN106973525 A CN 106973525A CN 201710265793 A CN201710265793 A CN 201710265793A CN 106973525 A CN106973525 A CN 106973525A
- Authority
- CN
- China
- Prior art keywords
- daughter board
- prepreg
- copper foil
- preparation
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/166—Alignment or registration; Control of registration
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a kind of preparation method of the high multilayer backboard of N+N types, comprise the following steps：Make daughter board, the daughter board is the production plate after surface treatment, prepreg and copper foil are cut according to the daughter board size, positioning hole is bored on the relevant position of the prepreg, copper foil and daughter board, copper foil, prepreg, n daughter board, prepreg, copper foil layer are stacked and put successively, stepped construction is obtained, and insertion pin is positioned in the positioning hole, and prepreg is equipped between the adjacent daughter board in the n daughter board；Stitching operation is carried out to the stepped construction, multi-layer sheet is obtained, drilled on multilayer boards successively, high multilayer backboard is made in heavy copper and other rear processes.The inventive method improves the alignment precision between daughter board, reduces the layer deviator after pressing, reduces the problems such as the internal layer caused by layer deviator is excessive is short-circuit, optimizes Making programme, improve production efficiency, reduces scrappage and then reduce production cost.
Description
Technical field
The present invention relates to printed wiring board manufacture technology field, and in particular to a kind of making side of the high multilayer backboard of N+N types
Method.
Background technology
The Making programme of existing high multilayer backboard is：Sawing sheet → one → internal layer of inner figure etches one → internal layer AOI mono-
→ one → internal layer of lamination drills, and → sink copper → electric plating of whole board, → two → internal layer of inner figure etches two → internal layer AOI bis- → heavy nickel is golden
Heavy copper → outer layer electric plating of whole board → outer graphics → the graphic plating of two → outer layer of → lamination drilling → outer layer → outer layer etching → after
In process, the above method, because the number of plies of wiring board is more, multiple pressing is employed.
The preparation method of above-mentioned high multilayer backboard can have following defect：
(1) in multiple bonding processes, layer is easily caused partially and the ladder position problems such as PP gummosis；
(2) production procedure is longer, influences production efficiency, and scrappage is high, cost of idleness.
The content of the invention
Preparation method long flow path, low production efficiency, scrappage of the invention for the high multilayer backboard of existing N+N types is high to ask
Topic the method increase the alignment precision between daughter board, reduce pressure there is provided a kind of preparation method of the high multilayer backboard of N+N types
Layer deviator after conjunction, reduces the problems such as the internal layer caused by layer deviator is excessive is short-circuit, optimizes Making programme, improve production effect
Rate, reduces scrappage and then reduces production cost.
In order to solve the above-mentioned technical problem, the invention provides a kind of preparation method of the high multilayer backboard of N+N types, including with
Lower step：
S1, making daughter board, the daughter board is the production plate after surface treatment；
S2, according to the daughter board size cut prepreg and copper foil；
S3, on the relevant position of the prepreg, copper foil and daughter board bore positioning hole；
S4, copper foil, prepreg, n daughter board, prepreg, copper foil layer stacked and put successively, obtain stepped construction, and
Pin is inserted in the positioning hole to be positioned；Wherein n is equal between >=2 integer, the adjacent daughter board in the n daughter board
Provided with prepreg；
S5, to the stepped construction carry out stitching operation, obtain multi-layer sheet；
S6, drill on multilayer boards successively, heavy copper, electric plating of whole board, make outer-layer circuit, make solder mask, silk-screen character
And be surface-treated, high multilayer backboard is made.
Preferably, in step S2, positioning is bored on two long side plate side positions of the prepreg, copper foil and daughter board
Hole.
Preferably, the positioning hole has six, is distributed in respectively at the left, center, right three on two long edges of boards.
Preferably, in step S3, the thickness of the stepped construction is more than the length of the shop bolt.
Preferably, between step S2 and S3, in addition to step S21, in connection daughter board and the two panels semi-solid preparation of outer copper foil
Piece correspondence position uplifting window, the position of the windowing is the metallization hole position on the correspondence daughter board.
Preferably, opened a window on two panels prepreg, wherein a diameter of 0.3mm window is opened on a piece of prepreg,
A diameter of 0.5mm window is opened on another prepreg.
Preferably, in step S4, the technological parameter of the pressing is：Vacuum is 72mmHg, and pressure is 450psi, hot pressing
Temperature is 220 degree, and hot pressing time is 50min, and temperature of colding pressing is 20 degree, and the cold pressing time is 90min.
Compared with prior art, the present invention has the advantages that：
The present invention is by first making daughter board, then the brill positioning on the edges of boards of each daughter board, prepreg and outer copper foil
Hole, in positioning hole insert pin multiple daughter boards and outer copper foil are positioned, press afterwards, can so improve daughter board it
Between alignment precision, reduce the layer deviator after pressing, reduce the problems such as the internal layer caused by layer deviator is excessive is short-circuit；In connection
Size windowing is carried out on the plated through-hole position of daughter board daughter board corresponding with the two panels prepreg of outer copper foil, wherein a piece of half is solid
Change the window that a diameter of 0.5mm is opened on the window that a diameter of 0.3mm is opened on piece, another prepreg, because partly solid in bonding processes
Change piece (not gummosis PP pieces) and still have resin flowing, plated through-hole of the excessive glue to daughter board easily occurs in the very bad control of gummosis
On orifice ring, the glue overflow amount of general PP pieces is in 0.2mm-0.3mm, and the setting that so opens a window can ensure excessive glue not upper orifice ring during pressing,
Simultaneously it is also ensured that bonding with outer copper foil；And Making programme is optimized, production efficiency is improved, quality reduction is improved
Scrappage, has saved production cost.
Embodiment
In order to more fully understand the technology contents of the present invention, below in conjunction with technical side of the specific embodiment to the present invention
Case is described further and illustrated.
Embodiment 1
The preparation method of the high multilayer backboard of a kind of N+N types shown in the present embodiment, successively including following treatment process：Make
(copper → electric plating of whole board → making internal layer circuit two → heavy is sunk in sawing sheet → one → pressing of making internal layer circuit → internal layer drills → to daughter board
Nickel gold) → brill positioning hole → insertion pin → pressing → holes drilled through → heavy copper → electric plating of whole board → making outer-layer circuit → welding resistance →
Silk-screen character → surface treatment → shaping, is comprised the following steps that：
A, sawing sheet：Core plate, core thickness 1.2mm H/H are outputed by jigsaw size 520mm × 620mm；
B, making internal layer circuit one (negative film technique)：Inner figure is shifted, and light-sensitive surface, light-sensitive surface are coated with vertical application machine
8 μm of film thickness monitoring, using Full-automatic exposure machine, internal layer circuit exposure is completed with 5-6 lattice exposure guide rule (21 lattice exposure guide rule)；Internal layer
Etching, etches internal layer circuit one, it is 3mil that internal layer line width, which is measured, by the core plate after exposure imaging；Internal layer AOI, is then checked interior
Sandwich circuit one opens the defects such as short circuit, circuit breach, circuit pin hole, and defective to scrap processing, flawless product goes out to next
Flow；
C, pressing：Brown speed folds core plate, prepreg, outer copper foil according to the thick brown of bottom copper copper successively on request
Close, then pressed superimposed sheet from appropriate lamination according to plate Tg, form production plate；
D, drilling：According to existing drilling technique, holes drilled through is carried out on production plate according to design requirement；
E, heavy copper：Make the via metal on production plate, backlight tests 10 grades, the heavy copper thickness in hole is 0.5 μm；
F, electric plating of whole board：With 1.8ASD current density electric plating of whole board 60min, hole copper thickness is more than 20 μm；
G, making internal layer circuit two (negative film technique)：Inner figure is shifted, and light-sensitive surface, light-sensitive surface are coated with vertical application machine
8 μm of film thickness monitoring, using Full-automatic exposure machine, internal layer circuit exposure is completed with 5-6 lattice exposure guide rule (21 lattice exposure guide rule)；Internal layer
Etching, etches internal layer circuit two, it is 3mil that internal layer line width, which is measured, by the production plate after exposure imaging；Internal layer AOI, is then checked
Internal layer circuit two opens the defects such as short circuit, circuit breach, circuit pin hole, and defective to scrap processing, flawless product goes out under
One flow；
H, heavy nickel gold：Lead to the principles of chemistry to the copper face for producing plate, uniform deposition necessarily requires the nickel gold of thickness, son is made
Plate；
I, brill positioning hole：Prepreg (not gummosis PP) and copper foil are cut according to daughter board size；Prepreg, copper foil and
Three a diameter of 3.2mm positioning hole is got out on two long side plate side positions of daughter board, three positioning holes are distributed in long side plate side
Left, center, right three at, it is ensured that the later stage positioning stability；And in the two panels prepreg pair for connecting daughter board and outer copper foil
Progress size windowing on position is answered, the position of windowing is the metallization hole position on correspondence daughter board, wherein being opened on a piece of prepreg
A diameter of 0.5mm window is opened on a diameter of 0.3mm window, another prepreg, when the setting that so opens a window can ensure pressing
The not upper daughter board plated through-hole orifice ring of excessive glue, while it is also ensured that bonding with outer copper foil, and two windowings are of different sizes,
Glue overflow amount change can smaller, good control；
J, insertion pin：Copper foil, prepreg, daughter board, prepreg, daughter board, prepreg, copper foil layer are stacked successively
Put, obtain stepped construction, and insert in positioning hole a diameter of 3.2mm pin and positioned, the length of wherein pin is less than
The height of stepped construction, it is ensured that the later stage is not influenceed when pressing by pin；
K, pressing：Stitching operation is carried out to above-mentioned stepped construction, multi-layer sheet is obtained；The technological parameter wherein pressed is：Very
Reciprocal of duty cycle is 72mmHg, and pressure is 450psi, and hot pressing temperature is 220 degree, and hot pressing time is 50min, and temperature of colding pressing is 20 degree, cold pressing
Time is 90min, it is ensured that multiple-plate tapping temperature is less than 100 degree；
L, holes drilled through：According to existing drilling technique, holes drilled through is carried out on multilayer boards according to design requirement；
M, heavy copper：Make the via metal on multi-layer sheet, backlight tests 10 grades, the heavy copper thickness in hole is 0.5 μm；
N, electric plating of whole board：With 1.8ASD current density electric plating of whole board 60min, hole copper thickness is more than 20 μm；
O, making outer-layer circuit (positive blade technolgy)：Outer graphics are shifted, using Full-automatic exposure machine and positive line film,
Outer-layer circuit exposure is completed with 5-7 lattice exposure guide rule (21 lattice exposure guide rule), it is developed, outer-layer circuit figure is formed on multilayer boards；
Outer graphics are electroplated, and copper facing are then distinguished on multilayer boards and tin plating, copper facing is the current density electric plating of whole board with 1.8ASD
60min, tin plating is to electroplate 10min with 1.2ASD current density, and tin is thick 3-5 μm；Then move back film successively again, etch and move back tin,
Outer-layer circuit is etched on multilayer boards；
P, welding resistance, silk-screen character：Make solder mask and silk-screen word on multilayer boards according to prior art and by design requirement
Symbol；
Q, surface treatment, shaping:It is surface-treated on multilayer boards according to prior art and by design requirement, gong profile
During multiple-plate edges of boards/technique edges and gong dummy section region are removed, and then remove edges of boards on shop bolt；
R, electrical testing, using pure resistance electrical measuring method, insulating properties carry out exact p-value between layer interconnection each to product and conductor,
Problematic to scrap processing, the product of no problem goes out to downstream；
S, FQC/FQA, the outward appearance for taking a sample test plate again, are made high multilayer backboard finished product.
Embodiment 2：
The present embodiment provides a kind of preparation method of the high multilayer backboard of N+N types, and this method is essentially identical with embodiment 1,
Difference is：In step j, successively by copper foil, prepreg, daughter board, prepreg, daughter board, prepreg, daughter board,
Prepreg, copper foil layer, which are stacked, to be put；And a diameter of 3.2mm pin is inserted in positioning hole positioned, the wherein length of pin
Height of the degree less than stepped construction, it is ensured that the later stage is not influenceed when pressing by pin.
Embodiment 3：
The present embodiment provides a kind of preparation method of the high multilayer backboard of N+N types, and this method is essentially identical with embodiment 1,
Difference is：In step j, successively by copper foil, prepreg, daughter board, prepreg, daughter board, prepreg, daughter board,
Prepreg, daughter board, prepreg, copper foil layer, which are stacked, to be put；And a diameter of 3.2mm pin is inserted in positioning hole determined
Position, the wherein length of pin are less than the height of stepped construction, it is ensured that the later stage is not influenceed when pressing by pin.
, can be by the sortord in more daughter boards foundation embodiment 1-3 successively in step j in other embodiments
It is stacked together, five daughter boards, six daughter boards, seven daughter boards ... or n daughter board equipressure can also be combined.
The technical scheme provided above the embodiment of the present invention is described in detail, specific case used herein
Principle and embodiment to the embodiment of the present invention are set forth, and the explanation of above example is only applicable to help and understands this
The principle of inventive embodiments；Simultaneously for those of ordinary skill in the art, according to the embodiment of the present invention, in specific embodiment party
It will change in formula and application, in summary, this specification content should not be construed as limiting the invention.
Claims (7)
1. a kind of preparation method of the high multilayer backboard of N+N types, it is characterised in that comprise the following steps：
S1, making daughter board, the daughter board is the production plate after surface treatment；
S2, according to the daughter board size cut prepreg and copper foil；
S3, on the relevant position of the prepreg, copper foil and daughter board bore positioning hole；
S4, copper foil, prepreg, n daughter board, prepreg, copper foil layer stacked and put successively, obtain stepped construction, and in institute
Insertion pin in positioning hole is stated to be positioned；N is to be equipped with half between >=2 integer, the adjacent daughter board in the n daughter board to consolidate
Change piece；
S5, to the stepped construction carry out stitching operation, obtain multi-layer sheet；
S6, drill on multilayer boards successively, heavy copper, electric plating of whole board, make outer-layer circuit, make solder mask, silk-screen character and enter
Row surface treatment, is made high multilayer backboard.
2. the preparation method of the high multilayer backboard of N+N types according to claim 1, it is characterised in that in step S2, described
Positioning hole is bored on two long side plate side positions of prepreg, copper foil and daughter board.
3. the preparation method of the high multilayer backboard of N+N types according to claim 2, it is characterised in that the positioning hole has six
It is individual, it is distributed in respectively at the left, center, right three on two long edges of boards.
4. the preparation method of the high multilayer backboard of N+N types according to claim 1, it is characterised in that in step S3, the layer
The thickness of stack structure is more than the length of the pin.
5. the preparation method of the high multilayer backboard of N+N types according to claim 1, it is characterised in that between step S2 and S3,
Also include step S21, in connection daughter board and the two panels prepreg correspondence position uplifting window of outer copper foil, the position of the windowing
It is the metallization hole position on the correspondence daughter board.
6. the preparation method of the high multilayer backboard of N+N types according to claim 5, it is characterised in that in two panels prepreg
It is upper to be opened a window, wherein opening a diameter of 0.3mm window on a piece of prepreg, a diameter of 0.5mm is opened on another prepreg
Window.
7. the preparation method of the high multilayer backboard of N+N types according to claim 1, it is characterised in that in step S4, the pressure
The technological parameter of conjunction is：Vacuum is 72mmHg, and pressure is 450psi, and hot pressing temperature is 220 degree, and hot pressing time is 50min, cold
It is 20 degree to press temperature, and the cold pressing time is 90min.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710265793.3A CN106973525A (en) | 2017-04-21 | 2017-04-21 | A kind of preparation method of the high multilayer backboard of N+N types |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710265793.3A CN106973525A (en) | 2017-04-21 | 2017-04-21 | A kind of preparation method of the high multilayer backboard of N+N types |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106973525A true CN106973525A (en) | 2017-07-21 |
Family
ID=59332534
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710265793.3A Pending CN106973525A (en) | 2017-04-21 | 2017-04-21 | A kind of preparation method of the high multilayer backboard of N+N types |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106973525A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107484356A (en) * | 2017-08-01 | 2017-12-15 | 深圳明阳电路科技股份有限公司 | A kind of preparation method of the sandwich aluminium base of thick copper |
| CN108323038A (en) * | 2018-01-22 | 2018-07-24 | 广州兴森快捷电路科技有限公司 | Thick copper PCB and preparation method thereof, bomb shelter method |
| CN111901974A (en) * | 2020-08-31 | 2020-11-06 | 深圳崇达多层线路板有限公司 | Manufacturing process of N + N blind pressing large back plate |
| CN113518508A (en) * | 2021-03-17 | 2021-10-19 | 东莞联桥电子有限公司 | Improved multilayer circuit board and manufacturing method thereof |
| CN113677107A (en) * | 2021-07-28 | 2021-11-19 | 广州兴森快捷电路科技有限公司 | Printed circuit board manufacturing method and printed circuit board |
| CN114364126A (en) * | 2020-10-13 | 2022-04-15 | 昆山圆裕电子科技有限公司 | Laminating type material supplementing and laminating method for flexible circuit board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6242286B1 (en) * | 1998-02-09 | 2001-06-05 | Mario J. Cellarosi | Multilayer high density micro circuit module and method of manufacturing same |
| CN103402332A (en) * | 2013-07-25 | 2013-11-20 | 东莞生益电子有限公司 | Printed circuit board (PCB) with high-density interconnection design and heat radiation structure, and manufacturing method thereof |
| CN105682381A (en) * | 2016-03-03 | 2016-06-15 | 深圳市景旺电子股份有限公司 | High multi-layer PCB and laminating method thereof |
-
2017
- 2017-04-21 CN CN201710265793.3A patent/CN106973525A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6242286B1 (en) * | 1998-02-09 | 2001-06-05 | Mario J. Cellarosi | Multilayer high density micro circuit module and method of manufacturing same |
| CN103402332A (en) * | 2013-07-25 | 2013-11-20 | 东莞生益电子有限公司 | Printed circuit board (PCB) with high-density interconnection design and heat radiation structure, and manufacturing method thereof |
| CN105682381A (en) * | 2016-03-03 | 2016-06-15 | 深圳市景旺电子股份有限公司 | High multi-layer PCB and laminating method thereof |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107484356A (en) * | 2017-08-01 | 2017-12-15 | 深圳明阳电路科技股份有限公司 | A kind of preparation method of the sandwich aluminium base of thick copper |
| CN107484356B (en) * | 2017-08-01 | 2020-06-02 | 深圳明阳电路科技股份有限公司 | Manufacturing method of thick copper sandwich aluminum substrate |
| CN108323038A (en) * | 2018-01-22 | 2018-07-24 | 广州兴森快捷电路科技有限公司 | Thick copper PCB and preparation method thereof, bomb shelter method |
| CN111901974A (en) * | 2020-08-31 | 2020-11-06 | 深圳崇达多层线路板有限公司 | Manufacturing process of N + N blind pressing large back plate |
| CN111901974B (en) * | 2020-08-31 | 2021-10-12 | 深圳崇达多层线路板有限公司 | Manufacturing process of N + N blind pressing large back plate |
| CN114364126A (en) * | 2020-10-13 | 2022-04-15 | 昆山圆裕电子科技有限公司 | Laminating type material supplementing and laminating method for flexible circuit board |
| CN114364126B (en) * | 2020-10-13 | 2024-06-14 | 昆山圆裕电子科技有限公司 | Film-covered type material supplementing and laminating method for flexible circuit board |
| CN113518508A (en) * | 2021-03-17 | 2021-10-19 | 东莞联桥电子有限公司 | Improved multilayer circuit board and manufacturing method thereof |
| CN113677107A (en) * | 2021-07-28 | 2021-11-19 | 广州兴森快捷电路科技有限公司 | Printed circuit board manufacturing method and printed circuit board |
| CN113677107B (en) * | 2021-07-28 | 2023-03-31 | 广州兴森快捷电路科技有限公司 | Printed circuit board manufacturing method and printed circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106973525A (en) | A kind of preparation method of the high multilayer backboard of N+N types | |
| CN106973507B (en) | A kind of production method of filling holes with resin wiring board | |
| CN106982521B (en) | A kind of copper-plated production method of high thickness to diameter ratio printed circuit board through-hole | |
| CN108323037A (en) | A kind of PCB processing technologys of two-sided ladder position electricity gold | |
| CN106961806B (en) | The production method for burying copper billet is substituted in a kind of wiring board | |
| CN107949190A (en) | A kind of manufacture craft of high drop ladder wiring board | |
| CN104717846B (en) | The preparation method of metallization slotted eye in a kind of PCB | |
| CN108430159A (en) | A kind of oversize printed board method for drilling holes | |
| CN107567191B (en) | It is a kind of to improve the process that precision is bored outside mechanical blind hole plate | |
| CN107592735A (en) | Thick desired ladder board manufacturing method more than a kind of high accuracy | |
| CN105228363A (en) | A kind of manufacture method of solder mask | |
| CN104284520B (en) | A kind of PCB surface processing method | |
| CN108260303A (en) | The production method that laser drill and back drill hole are filled out in a kind of while plating | |
| CN110225660A (en) | A kind of production method of high thermal conductivity thickness copper base | |
| CN109275268A (en) | A kind of PCB back drill production method being less than 0.15mm for medium thickness | |
| CN107708316A (en) | A kind of preparation method of superfinishing fine rule road | |
| CN110248473A (en) | A method of it is small to solve VIA-IN-PAD filling holes with resin PCB printed board crimping hole | |
| CN108770238A (en) | A kind of inner figure design method for improving drilling and pulling copper | |
| CN108289374A (en) | A kind of production method of filling holes with resin wiring board | |
| CN104378931B (en) | The preparation method of metallization counterbore in a kind of PCB | |
| CN105392288A (en) | Method for manufacturing metalized blind holes on PCB | |
| CN108124384A (en) | Small size wiring board method for processing forming without interior positioning | |
| CN108617093A (en) | A method of improving PTFE wiring board slot burrs | |
| CN108556045A (en) | A kind of method in drill straight chamfered groove hole | |
| CN108449883A (en) | A kind of surface treatment is the production method for the wiring board that electric nickel gold adds part electricity gold |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170721 |
|
| RJ01 | Rejection of invention patent application after publication |