CN106960885B - 一种pin结构紫外光电探测器及其制备方法 - Google Patents
一种pin结构紫外光电探测器及其制备方法 Download PDFInfo
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Abstract
本发明公开了一种PIN结构紫外光电探测器，包括由下至上依次设置的蓝宝石衬底、AlN成核层、Alx1Ga1‑x1N缓冲层、n型Alx2Ga1‑x2N层、非掺杂i型ZnO/TiO2超晶格吸收层、p型Alx3Ga1‑x3N层、p型GaN层，在n型Alx2Ga1‑x2N层上引出的n型欧姆电极，在p型GaN层上引出的p型欧姆电极，所述非掺杂i型ZnO/TiO2超晶格吸收层中，超晶格的重复周期数为1～10个。本发明还公开了PIN结构紫外光电探测器的制备方法。该PIN结构紫外光电探测器可提高探测器对弱紫外信号的响应度。
Description
技术领域
本发明涉及一种紫外光电探测器及其制备方法，尤其是涉及一种PIN结构紫外光电探测器及其制备方法，属于半导体光电子器件领域。
背景技术
紫外光电探测器在军用和民用方面都具有重要的应用价值和发展前景，如：紫外告警与制导、碳氢化合物燃烧火焰的探测、生化基因的检测、紫外天文学的研究、短距离的通信以及皮肤病的治疗等。PIN结构紫外光电探测器具有体积小、重量轻、寿命长、抗震性好、工作电压低、耐高温、耐腐蚀、抗辐照、量子效率高和无需滤光片等优点，已成为光电探测领域的研究热点。
氮化镓基半导体三元化合物AlxGa1-xN材料的能带隙可以通过改变Al组分x进行调节，使其对应的吸收光波长在200～365nm之间，恰好覆盖由于臭氧层吸收紫外光而产生的太阳光谱盲区(220～290nm)。ZnO是一种直接带隙宽禁带半导体材料。ZnO无论在晶格结构、晶胞参数还是在禁带宽度上都与GaN材料相似，且具有比GaN更高的熔点和更大的激子束缚能，又具有较低的光致发光和受激辐射的阈值以及良好的机电耦合特性、热稳定性和化学稳定性。由于ZnO以及TiO2材料自身的优点，展现了极好紫外探测性能，其光电流增益可达到105，并且其具有工作电压较低、能耗较小、体积小、重量轻等优点，近年来已成为紫外探测研究的焦点。
但是，由于现有技术制备的AlGaN材料薄膜质量不高，AlGaN材料在与表面淀积的金属形成肖特基结时界面存在大量的缺陷，使得有源区变薄，遂穿机制明显，导致暗电流很大，因而严重制约了此类结构探测器的探测性能的提高。
发明内容
针对现有技术的缺陷，本发明提供了一种PIN结构紫外光电探测器，解决AlGaN基紫外光电探测器中由于电子和空穴的离化系数相近而导致的紫外探测器不灵敏，对弱紫外信号的响应度差的问题。本发明还提供了一种PIN结构紫外光电探测器的制备方法。
本发明技术方案如下：一种PIN结构紫外光电探测器，包括由下至上依次设置的蓝宝石衬底、AlN成核层、Alx1Ga1-x1N缓冲层、n型Alx2Ga1-x2N层、非掺杂i型ZnO/TiO2超晶格吸收层、p型Alx3Ga1-x3N层、p型GaN层，在n型Alx2Ga1-x2N层上引出的n型欧姆电极，在p型GaN层上引出的p型欧姆电极，所述非掺杂i型ZnO/TiO2超晶格吸收层中，超晶格的重复周期数为1～10个。
优选地，所述AlN成核层厚度为20～60nm，所述Alx1Ga1-x1N缓冲层厚度为200～800nm，所述n型Alx2Ga1-x2N层厚度为500～1000nm，所述非掺杂i型ZnO/TiO2超晶格吸收层厚度为100～200nm，所述p型Alx3Ga1-x3N层厚度为50～100nm，所述p型GaN层厚度为100～200nm。
优选地，所述非掺杂i型ZnO/TiO2超晶格吸收层中，单周期中ZnO层厚度为5～10nm，TiO2层厚度为5～10nm。
优选地，所述n型欧姆电极为Ti/Al/Ti/Au合金电极，p型欧姆电极为Ni/Au合金电极。
优选地，所述蓝宝石衬底为C面晶体。
优选地，所述p型Alx3Ga1-x3N层的禁带宽度大于n型Alx2Ga1-x2N层的禁带宽度，即下标x2，x3满足如下要求：0<x2<x3<1。
优选地，所述p型Alx3Ga1-x3N层采用的Mg进行掺杂，并且掺杂浓度介于1016～1018cm-3之间。
一种PIN结构紫外光电探测器的制备方法，依次包括以下步骤：
(1)在蓝宝石衬底上生长AlN成核层；
(2)在AlN成核层上生长一层Alx1Ga1-x1N缓冲层；
(3)在Alx1Ga1-x1N缓冲层上生长一层n型Alx2Ga1-x2N层；
(4)在n型Alx2Ga1-x2N层上生长一层非掺杂i型ZnO/TiO2超晶格吸收层；
(5)在非掺杂i型ZnO/TiO2超晶格吸收层上生长一层p型Alx3Ga1-x3N层；
(6)在p型Alx3Ga1-x3N层上生长一层p型GaN层；
(7)在p型GaN层上进行台面刻蚀，露出n型Alx2Ga1-x2N层；
(8)在p型GaN层上蒸镀p型Ni/Au欧姆电极，并且对电极进行退火处理；
(9)在n型Alx2Ga1-x2N层台面上蒸镀n型Ti/Al/Ti/Au欧姆电极，并且对电极进行退火处理。
本发明所提供的技术方案的优点在于：由于多周期超晶格结构非掺杂i型ZnO/TiO2材料的高吸收系数、高横向载流子迁移率和强极化效应，可有效增加吸收层的电场，因此能够提高紫外探测器的量子效率。还能够有效解决紫外光电探测器中由于电子和空穴的离化系数相近而导致的紫外探测器不灵敏，有助于提高探测器对弱紫外信号的响应度。
附图说明
图1为本发明结构示意图。
具体实施方式
下面结合实施例对本发明作进一步说明，但不作为对本发明的限定。
实施例1，如图1所示，本实施例所涉及的PIN结构紫外光电探测器，包括由下至上依次设置C面晶体的蓝宝石衬底101、AlN成核层102、Alx1Ga1-x1N缓冲层103、n型Alx2Ga1-x2N层104、非掺杂i型ZnO/TiO2超晶格吸收层105、p型Alx3Ga1-x3N层106、p型GaN层107，在n型Alx2Ga1-x2N层104上引出的n型欧姆电极109，在p型GaN层107上引出的p型欧姆电极108。其中AlN成核层102的厚度为25nm，具体成核层厚度值可根据实际需要调整。Alx1Ga1-x1N缓冲层103的厚度为400nm，并且其中的x1＝0.30。n型Alx2Ga1-x2N层104的厚度为700nm，并且其中的x2＝0.45，利用Si进行掺杂，其中Si的掺杂浓度大于5×1018cm-3。非掺杂i型ZnO/TiO2超晶格吸收层105，单周期中ZnO层厚度为5nm，TiO2层厚度为10nm，重复周期数为10个。p型Alx3Ga1-x3N层106的厚度为60nm，采用的Mg进行掺杂，并且掺杂浓度为5×1017cm-3，其中下标x3＝0.6，即p型Alx3Ga1-x3N层106的禁带宽度大于n型Alx2Ga1-x2N层104的禁带宽度。p型GaN层107的厚度为200nm，其中的掺杂浓度为5×1018cm-3。p型欧姆电极108为Ti/Al/Ti/Au合金电极，n型欧姆电极109为Ni/Au合金电极。
该PIN结构紫外光电探测器的制备方法是：
(1)在C面晶体的蓝宝石衬底101上生长AlN成核层102；
(2)在AlN成核层102上生长一层Alx1Ga1-x1N缓冲层103；
(3)在Alx1Ga1-x1N缓冲层103上生长一层n型Alx2Ga1-x2N层104；
(4)在n型Alx2Ga1-x2N层104上采用金属有机化学气相沉积方法生长一层非掺杂i型ZnO/TiO2超晶格吸收层105；
(5)在非掺杂i型ZnO/TiO2超晶格吸收层105上生长一层p型Alx3Ga1-x3N层106；
(6)在p型Alx3Ga1-x3N层106上生长一层p型GaN层107；
(7)在p型GaN层107上进行进行光刻，刻蚀出电极台面，露出n型Alx2Ga1-x2N层104，对刻蚀后的台面进行处理；
(8)在p型GaN层107上蒸镀p型欧姆电极108，电极为Ti/Al/Ti/Au合金电极，蒸镀后在600℃的N2环境下退火3分钟；
(9)在n型Alx2Ga1-x2N层104台面上蒸镀n型欧姆电极109，电极为Ni/Au合金电极，电极尺寸为0.3×0.3mm2，蒸镀后在850℃的N2环境下退火2分钟。
本实施例所制备得到的紫外探测器，可以极大地增强对弱紫外信号的响应度，尤其在单光子探测方面，体现优势。根据测算，当器件的峰值响应波长为280nm时，器件在零偏压下的暗电流为nA量级，峰值响应度为9.4mA/W；器件在-10V偏压下，峰值响应度为40.7mA/W，对应的外量子效率可以达到30％。
实施例2，如图1所示，本实施例所涉及的PIN结构紫外光电探测器，包括由下至上依次设置C面晶体的蓝宝石衬底101、AlN成核层102、Alx1Ga1-x1N缓冲层103、n型Alx2Ga1-x2N层104、非掺杂i型ZnO/TiO2超晶格吸收层105、p型Alx3Ga1-x3N层106、p型GaN层107，在n型Alx2Ga1-x2N层104上引出的n型欧姆电极109，在p型GaN层107上引出的p型欧姆电极108。其中AlN成核层102的厚度为20nm。Alx1Ga1-x1N缓冲层103的厚度为300nm，并且其中的x1＝0.45。n型Alx2Ga1-x2N层104的厚度为500nm，并且其中的x2＝0.55，利用Si进行掺杂，其中Si的掺杂浓度大于5×1018cm-3。非掺杂i型ZnO/TiO2超晶格吸收层105，单周期中ZnO层厚度为10nm，TiO2层厚度为10nm，重复周期数为5个。p型Alx3Ga1-x3N层106的厚度为50nm，采用的Mg进行掺杂，并且掺杂浓度为5×1016cm-3，其中下标x3＝0.7，即p型Alx3Ga1-x3N层106的禁带宽度大于n型Alx2Ga1-x2N层104的禁带宽度。p型GaN层107的厚度为100nm，其中的掺杂浓度为5×1018cm-3。p型欧姆电极108为Ti/Al/Ti/Au合金电极，n型欧姆电极109为Ni/Au合金电极。该PIN结构紫外光电探测器的制备方法同实施例1。
本实施例所制备得到的紫外探测器，根据测算，当器件的峰值响应波长为280nm时，器件在零偏压下的暗电流为nA量级，峰值响应度为7.9mA/W；器件在-10V偏压下，峰值响应度为52.4mA/W，对应的外量子效率可以达到35％。
实施例3，如图1所示，本实施例所涉及的PIN结构紫外光电探测器，包括由下至上依次设置C面晶体的蓝宝石衬底101、AlN成核层102、Alx1Ga1-x1N缓冲层103、n型Alx2Ga1-x2N层104、非掺杂i型ZnO/TiO2超晶格吸收层105、p型Alx3Ga1-x3N层106、p型GaN层107，在n型Alx2Ga1-x2N层104上引出的n型欧姆电极109，在p型GaN层107上引出的p型欧姆电极108。其中AlN成核层102的厚度为60nm。Alx1Ga1-x1N缓冲层103的厚度为800nm，并且其中的x1＝0.4。n型Alx2Ga1-x2N层104的厚度为1000nm，并且其中的x2＝0.6，利用Si进行掺杂，其中Si的掺杂浓度大于5×1018cm-3。非掺杂i型ZnO/TiO2超晶格吸收层105，单周期中ZnO层厚度为10nm，TiO2层厚度为10nm，重复周期数为1个。p型Alx3Ga1-x3N层106的厚度为100nm，采用的Mg进行掺杂，并且掺杂浓度为5×1018cm-3，其中下标x3＝0.8，即p型Alx3Ga1-x3N层106的禁带宽度大于n型Alx2Ga1-x2N层104的禁带宽度。p型GaN层107的厚度为150nm，其中的掺杂浓度为5×1018cm-3。p型欧姆电极108为Ti/Al/Ti/Au合金电极，n型欧姆电极109为Ni/Au合金电极。该PIN结构紫外光电探测器的制备方法同实施例1。
本实施例所制备得到的紫外探测器，根据测算，当器件的峰值响应波长为280nm时，器件在零偏压下的暗电流为nA量级，峰值响应度为11.8mA/W；器件在-10V偏压下，峰值响应度为38.4mA/W，对应的外量子效率可以达到28％。
必须指出的是:本发明不仅适用于金属一半导体一金属型氮化镓基紫外雪崩光电探测器，对于肖特基势垒型氮化镓基紫外雪崩光电探测器也同样适用。
Claims (8)
1.一种PIN结构紫外光电探测器，其特征在于，包括由下至上依次设置的蓝宝石衬底、AlN成核层、Alx1Ga1-x1N缓冲层、n型Alx2Ga1-x2N层、非掺杂i型ZnO/TiO2超晶格吸收层、p型Alx3Ga1-x3N层、p型GaN层，在n型Alx2Ga1-x2N层上引出的n型欧姆电极，在p型GaN层上引出的p型欧姆电极，所述非掺杂i型ZnO/TiO2超晶格吸收层中，超晶格的重复周期数为1～10个。
2.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述AlN成核层厚度为20～60nm，所述Alx1Ga1-x1N缓冲层厚度为200～800nm，所述n型Alx2Ga1-x2N层厚度为500～1000nm，所述非掺杂i型ZnO/TiO2超晶格吸收层厚度为100～200nm，所述p型Alx3Ga1-x3N层厚度为50～100nm，所述p型GaN层厚度为100～200nm。
3.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述非掺杂i型ZnO/TiO2超晶格吸收层中，单周期中ZnO层厚度为5～10nm，TiO2层厚度为5～10nm。
4.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述n型欧姆电极为Ti/Al/Ti/Au合金电极，p型欧姆电极为Ni/Au合金电极。
5.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述蓝宝石衬底为C面晶体。
6.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述p型Alx3Ga1-x3N层的禁带宽度大于n型Alx2Ga1-x2N层的禁带宽度。
7.根据权利要求1所述的PIN结构紫外光电探测器，其特征在于，所述p型Alx3Ga1-x3N层采用的Mg进行掺杂，并且掺杂浓度介于1016～1018cm-3之间。
8.一种PIN结构紫外光电探测器的制备方法，其特征在于，依次包括以下步骤：
(1)在蓝宝石衬底上生长AlN成核层；
(2)在AlN成核层上生长一层Alx1Ga1-x1N缓冲层；
(3)在Alx1Ga1-x1N缓冲层上生长一层n型Alx2Ga1-x2N层；
(4)在n型Alx2Ga1-x2N层上生长一层非掺杂i型ZnO/TiO2超晶格吸收层；
(5)在非掺杂i型ZnO/TiO2超晶格吸收层上生长一层p型Alx3Ga1-x3N层；
(6)在p型Alx3Ga1-x3N层上生长一层p型GaN层；
(7)在p型GaN层上进行台面刻蚀，露出n型Alx2Ga1-x2N层；
(8)在p型GaN层上蒸镀p型Ni/Au欧姆电极，并且对电极进行退火处理；
(9)在n型Alx2Ga1-x2N层台面上蒸镀n型Ti/Al/Ti/Au欧姆电极，并且对电极进行退火处理。
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