CN106920786B - 集成电源模块的封装件 - Google Patents

集成电源模块的封装件 Download PDF

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Publication number
CN106920786B
CN106920786B CN201710192407.2A CN201710192407A CN106920786B CN 106920786 B CN106920786 B CN 106920786B CN 201710192407 A CN201710192407 A CN 201710192407A CN 106920786 B CN106920786 B CN 106920786B
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packaging part
chip
power supply
substrate
supply module
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CN106920786A (zh
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杜茂华
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Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
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Samsung Semiconductor China R&D Co Ltd
Samsung Electronics Co Ltd
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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Abstract

本发明提供一种集成电源模块的封装件，所述封装件包括：基板，具有上表面和下表面；芯片，设置在基板的上表面上；第一供电模块，设置在基板的上表面上，并且设置在芯片的一侧；包封构件，包封芯片和第一供电模块；第二供电模块，设置在包封构件上，并通过设置在包封构件中并且贯通包封构件的连接构件与基板电连接。

Description

集成电源模块的封装件
本申请是向中国知识产权局提交的申请日为2016年3月16日、申请号为201610148450.4、发明名称为“集成电源模块的封装件”的专利申请的分案申请。
技术领域
本发明适用于半导体封装领域，具体地讲，涉及一种集成有电源模块的半导体系统封装件。
背景技术
在传统的电子产品中，封装件、SMT(表面组装技术)板和电池组成标准的系统，封装件通过SMT板与电池连接供电，保证系统运转。图1示出了现有技术的封装件，如图1所示，封装件通过底部的焊球与外部连接，由外部的电源向封装件供电。
随着物联网的发展，不仅移动电话，而且日常必需品(例如，杯子、牙刷和衣服等)将彼此联系，因而系统需要便携化且小型化。然而，传统的电子系统在小型化上面临困难，具体地，封装件的集成度越来越高，但是目前仍需要独立的电源进行供电，这样就限制了整个电子系统的小型化。
发明内容
本发明的目的在于，提供一种能够实现封装件小型化的集成有供电模块的封装件。
为了实现上述目的，本发明的示例性实施例提供了一种封装件，所述封装件包括：基板，具有上表面和下表面；芯片，设置在基板的上表面上；第一供电模块，设置在基板的上表面上，并且设置在芯片的一侧；包封构件，包封芯片和第一供电模块；第二供电模块，设置在包封构件上，并通过设置在包封构件中并且贯通包封构件的连接构件与基板电连接。
根据本发明的示例性实施例，所述第一供电模块可以包括磁感应元件。
根据本发明的示例性实施例，所述磁感应元件可以包括磁性薄膜和围绕磁性薄膜的线圈。
根据本发明的示例性实施例，第二供电模块可以包括薄膜太阳能模块，其中，薄膜太阳能模块可以包括透明薄膜、透明导电氧化物、非晶硅以及金属焊盘中的至少一种。
根据本发明的示例性实施例，所述连接构件可以由金属制成，例如，连接构件可以是金属柱，所述金属柱的材料可以是锡、铜等金属或者金属合金。
根据本发明的示例性实施例，所述封装件还可以包括无源器件，所述无源器件可以设置在基板的上表面上，或者可以埋置于基板之中。
根据本发明的示例性实施例，所述无源器件可以包括电容器、电阻器或电感器。
根据本发明的示例性实施例，所述芯片可以包括顺序地叠置在基底的上表面上的功能芯片和能源处理芯片，所述功能芯片可以包括处理器，存储器和通讯模块中的一种或更多种。
磁感应元件可以包括磁性薄膜和围绕磁性薄膜的线圈。
通过本发明的上述详细描述，能够提供一种集成有供电模块的封装件，使得所述封装件在室外时可以通过太阳能模块吸收阳光而供电，并且在室内时可以通过电池感应实现无线供电从而达到封装件的自供电效果，最终实现整个电子系统的小型化。
附图说明
通过下面参照附图结合示例性实施例进行的详细描述，本发明的其他特征将会变得更加清楚，其中：
图1是示出现有技术的封装件的剖视图；
图2是示出根据本发明的示例性实施例的封装件的结构的示意性剖视图；
图3是示出根据本发明的示例性实施例的封装件自供电的原理图；
图4是示出根据本发明的另一实施例的封装件的结构的示意性剖视图；
图5是示出根据本发明的又一实施例的封装件的结构的示意性剖视图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。
在附图中，为了清晰起见，会夸大层、膜、面板、区域等的厚度。在整个说明书中同样的附图标记表示相同的元件。将理解，当诸如层、膜、区域或基底的元件被称作“在”另一元件“上”时，该元件可以直接在所述另一元件上，或者也可以存在中间元件。可选择地，当元件被称作“直接在”另一元件“上”时，不存在中间元件。
图1是示出现有技术的封装件100的剖视图。
现有技术的封装件100包括基板110、芯片120和包封构件130。多个芯片120通过粘合剂140顺序地粘结到基板上，并且通过引线150与基板电连接。包封构件130设置在基板上，并将所述多个芯片120和引线150包封。如图1所示，现有技术的封装件100并不具有自供电模块，也就是说，现有技术的封装件100通过基板底部的焊球160与外部连接，并由外部电源向封装件供电。
如上所述，由于需要提供另外的电源，使得封装件的尺寸小型化受到限制。因此，需要提供一种能够克服上述技术问题的封装件。
本发明通过在封装件中集成第一供电模块(例如，磁感应模块)和第二供电模块(例如，太阳能模块)，使得在室外时能够通过第一供电模块吸收阳光以向封装件供电，并且使得在室内时通过第二供电模块实现无线供电，从而达到封装体自供电的效果，以实现封装件的小型化。
图2是示出根据本发明的示例性实施例的封装件的结构的示意性剖视图，图3是示出根据本发明的示例性实施例的系统封装件自供电的原理图，图4是示出根据本发明的另一示例性实施例的封装件的结构的示意性剖视图，图5是示出根据本发明的又一示例性实施例的封装件的结构的示意性剖视图。
以下，将参照图2-图5来详细描述根据本发明的示例性实施例的封装件的结构，然而，本发明的范围不受下面的具体实施例的限制，相反，提供这些实施例使得本公开将是彻底的和完整的，并将本发明的保护范围更清楚地传递给本领域技术人员。
图2是示出根据本发明的示例性实施例的封装件的结构的示意性剖视图。如图2所示，根据本发明的示例性实施例的封装件200包括基板210、芯片220、第一供电模块230、包封构件240、连接构件250和第二供电模块260。
基板210具有上表面和下表面。此外，基板210的上表面和下表面可以分别设置有焊盘(如图1中设置在基板210的下表面的焊盘211)。设置在基板的上表面的焊盘(未示出)可以通过引线与芯片220电连接；设置在基板的下表面的焊盘(例如，焊盘211)可以使得整个封装件200通过焊盘211与外部连接。
芯片220设置在基板的上表面上。芯片220可以包括功能芯片221和能源处理芯片222等。功能芯片可以包括处理器、存储器、通讯模块和传感器等中的一种或更多种，但本发明不限于此。在根据本发明的示例性实施例中，功能芯片221可以包括顺序地堆叠在基板210上的处理器221-1、存储器221-2和通讯模块221-3，并且可以通过引线与基板210连接。功能芯片221可以执行系统的各种功能，例如处理数据、存储数据、与外部通信等。能源处理芯片222可以堆叠在功能芯片221上，并且可以通过引线与基板210连接。例如，在根据本发明的示例性实施例中，能源处理芯片222可以设置在包括在功能芯片221中的通讯模块223上。能源处理芯片222可以用于接收能源，并且可以对能源进行管理以将能源分配给包括在功能芯片221中的各元件。功能芯片221和能源处理芯片222的区域可以被称为“芯片区”。
第一供电模块230可以设置在基板210的上表面上(例如，通过焊接而被设置在基板210的上表面上)，并且可以布置在芯片220的一侧。第一供电模块230可以通过电磁感应产生电，从而可以利用产生的电来为芯片220提供电力。因此，根据本发明的示例性实施例的第一供电模块230可以包括一个或更多个磁感应元件，每个磁感应元件可以包括磁性薄膜和围绕磁性薄膜的线圈。当第一供电模块230由上述构造形成时，磁感应元件可以在交流磁场的作用下通过与设置在根据本发明的示例性实施例的封装件200的外部的无线供电模块(未示出)耦合来产生电力，从而传输到芯片220(例如，能源处理芯片)，然而，本发明不限于此。
包封构件240可以设置在基板210的上方，从而可以包封设置在基板210的上方的各种元件(例如，芯片210、引线和第一供电模块230等)。此外，包封构件240可以包括环氧树脂塑封料，并且可以具有平坦的表面。此外，包封构件240可以通过点胶或者模塑成型等工艺来形成，但本发明不限于此。
第二供电模块260可以设置在包封构件240上，并且可以通过吸收太阳能等外部能量转化为电能来为芯片220提供电力。在这种情况下，第二供电模块260可以包括薄膜太阳能模块。根据本发明的一个示例性实施例，当第二供电模块260包括薄膜太阳能模块时，薄膜太阳能模块260可以包括顺序堆叠在包封构件240上的金属焊盘层261、具有PIN结构的非晶硅层262、透明导电氧化物层263以及透明薄膜层264，并且可以通过各向异性的导电胶265而结合到包封构件240上，但本发明不限于此。也就是说，本领域技术人员可以通过现有技术而合理地设置第二供电模块260的构造，从而实现通过第二供电模块260将其他形式的能量转化成电能。
连接构件250可以设置在基板210的焊盘上，并且可以设置在基板210和第二供电模块260之间。此外，连接构件250可以设置在包封构件240中，并且可以贯通包封构件240。在这种情况下，第二供电模块260可以(通过各向异性导电胶265)与连接构件250电连接，从而可以将第二供电模块260的电力通过连接构件250提供给芯片220(例如，能源处理芯片222)。根据本发明的一个示例性实施例，连接构件250可以为围绕芯片220设置的多个金属柱，且金属柱可以由锡、铜等金属或者合金制成。然而，本发明不限于此，也就是说，连接构件250可以由其他结构的金属构件制成，且连接构件250的形状和数量不受限制。
以上通过结合具体示例描述了根据本发明的一个示例性实施例的封装件的具体结构，通过上述结构的设置，可以使得封装件在室外环境下通过第二供电模块吸收环境能量(例如，太阳能)并转化为电力来自供电，并且可以使得封装件在室内环境下通过第一供电模块的电磁转化来自供电，从而省略了外部独立电源的设置，从而实现了电子系统的小型化。
图3是示出根据本发明的示例性实施例的系统封装件自供电的原理图。以下将结合图3来示出根据本发明的实施例的封装件200的自供电的原理图。
封装件自供电可以分为室外工作和室内工作两种情况。
结合图2与图3，在室外环境下，第二供电模块(例如，薄膜太阳能模块)260通过吸收太阳光接收能量，并且将能量通过连接构件(例如，金属柱)250传递到芯片220(例如，能源处理芯片222)。然后，芯片220(例如，能源处理芯片222)可以对能量进行管理，从而将其分配给芯片220中的其他各个元件(例如，诸如处理器、存储器、通讯模块和传感器等的功能芯片221)，以支持其运转。
此外，在室内环境下，第一供电模块(磁感应元件)230可以通过与室内的无线供电模块(未示出)耦合而产生电力(例如，在交流磁场的作用下产生电流)，并且将电力传输到芯片220(例如，能源处理芯片222)，再由芯片220(例如，能源处理芯片222)分配给其他各个元件(例如，诸如处理器222-1、存储器221-2和通讯模块221-3的功能芯片221)，以支持其运转。
通过上述描述，根据本发明的示例性实施例的封装件200通过在其中增加第一供电模块(例如，磁感应元件)和第二供电模块(例如，薄膜太阳能模块)，从而可以实现封装件的自供电，以达到电子系统的小型化的目的。
图4是示出根据本发明的另一示例性实施例的封装件300的结构的示意性剖视图。图4中示出了封装件300与图2中示出的封装件200除了无源器件310以外具有同样的构造，因此将省略同样构件的重复描述。
根据本发明的另一示例性实施例的封装件300包括：基板210，具有上表面和下表面；芯片220，设置在基板210的上表面上；第一供电模块230，设置在基板210的上表面上，并且设置在芯片220的一侧；包封构件240，包封芯片220和第一供电模块230；第二供电模块260，设置在包封构件240上，并通过设置在包封构件240中并且贯通包封构件240的连接构件250与基板210电连接。
此外，根据本发明的另一示例性实施例的封装件300中还可以在基板210的上表面上设置有无源器件310。无源器件310可以是电容器、电阻器或电感器等器件，用于在封装件中起到稳定电压的作用。
图5是示出根据本发明的又一示例性实施例的封装件400的结构的剖视图。图5中示出了封装件400与图4中示出的封装件300除了无源器件310的设置位置以外具有同样的构造，因此将省略同样构件的重复描述。
根据本发明的又一示例性实施例的封装件400包括：基板210，具有上表面和下表面；芯片220，设置在基板210的上表面上；第一供电模块230，设置在基板210的上表面上，并且设置在芯片220的一侧；包封构件240，包封芯片220和第一供电模块230；第二供电模块260，设置在包封构件240上，并通过设置在包封构件240中并且贯通包封构件240的连接构件250与基板210电连接。
此外，根据本发明的又一示例性实施例的封装件400中还可以在基板210中设置有无源器件410。换言之，无源器件410可以被埋置于基板210中，且无源器件410可以是电容器、电阻器或电感器等，在封装件中起到稳定电压的作用。
通过参照附图并结合示例性实施例的详细描述，根据本发明的示例性实施例的封装件，在室外环境下，第二供电模块通过吸收诸如太阳光而接收外部能量，以将能量转化为电能，从而通过连接构件和基板传递到芯片和无源器件，其中，芯片对通过连接构件传递的电能进行管理和分配，从而实现自供电，无源器件在自供电过程中起到稳定电压的作用。另外，在室内环境下，第一供电模块通过与设置在室内的无线供电模块(未示出)耦合而产生电力(例如，在交流磁场的作用下产生电流)，并且将产生的电力传输到芯片和无源器件，其中，芯片对通过连接构件传递的电能进行管理和分配，从而实现自供电，无源器件在自供电过程中起到稳定电压的作用。
前述内容是对示例实施例的举例说明，且不应被解释为对其的限制。虽然已经描述了一些示例实施例，但是本领域技术人员将容易地理解，在实质上不脱离本发明构思的新颖性教导的情况下，可在示例实施例中进行各种变形和修改。

Claims (9)

1.一种封装件，其特征在于，所述封装件包括：
基板，具有上表面和下表面；
芯片，设置在基板的上表面上；
第一供电模块，包括磁感应元件，所述第一供电模块设置在基板的上表面上并且设置在芯片的一侧；
包封构件，包封芯片和第一供电模块；
第二供电模块，设置在包封构件上而不接触所述芯片，并通过设置在包封构件中并且贯通包封构件的连接构件与基板电连接。
2.根据权利要求1所述的封装件，其中，所述磁感应元件包括磁性薄膜和围绕磁性薄膜的线圈。
3.根据权利要求1所述的封装件，其中，第二供电模块包括薄膜太阳能模块。
4.根据权利要求1所述的封装件，其中，所述连接构件由金属制成。
5.根据权利要求1所述的封装件，其中，所述封装件还包括：
无源器件，设置在基板的上表面上。
6.根据权利要求1所述的封装件，其中，所述封装件还包括：
无源器件，埋置于基板之中。
7.根据权利要求5或6所述的封装件，其中，所述无源器件包括电容器、电阻器或电感器。
8.根据权利要求1所述的封装件，其中，所述芯片包括：
功能芯片和能源处理芯片，顺序地叠置在基底的上表面上。
9.根据权利要求8所述的封装件，其中，所述功能芯片包括处理器、存储器和通讯模块中的一种或更多种。
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TWI672820B (zh) * 2018-02-06 2019-09-21 華星光通科技股份有限公司 光接收器及其製備方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1551719A (zh) * 2003-05-16 2004-12-01 ���µ�����ҵ��ʽ���� 具有内置电路元件的组件及其制造方法
TW201041084A (en) * 2009-03-13 2010-11-16 Stats Chippac Ltd Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors
CN103378074A (zh) * 2012-04-19 2013-10-30 联发科技股份有限公司 芯片封装
CN104769713A (zh) * 2013-01-09 2015-07-08 晟碟半导体（上海）有限公司 包括用于嵌入和/或隔开半导体裸芯的独立膜层的半导体器件

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU5095601A (en) 2000-03-24 2001-10-08 Cymbet Corp Thin-film battery having ultra-thin electrolyte and associated method
US20060245308A1 (en) * 2005-02-15 2006-11-02 William Macropoulos Three dimensional packaging optimized for high frequency circuitry
KR100680654B1 (ko) 2006-08-07 2007-02-08 해성쏠라(주) 발광소자가 일체형으로 구비된 태양전지모듈
US7948067B2 (en) 2009-06-30 2011-05-24 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Coil transducer isolator packages
JP2008066672A (ja) 2006-09-11 2008-03-21 Fuji Electric Device Technology Co Ltd 薄型磁気部品内蔵基板及びそれを用いたスイッチング電源モジュール
US20100244585A1 (en) * 2009-03-26 2010-09-30 General Electric Company High-temperature capacitors and methods of making the same
KR101080386B1 (ko) 2009-10-20 2011-11-04 에스티에스반도체통신 주식회사 태양 충전형 ｕｓｂ 메모리 장치
JP5341717B2 (ja) 2009-11-10 2013-11-13 ルネサスエレクトロニクス株式会社 半導体パッケージ及びシステム
CN101777565B (zh) 2009-12-30 2012-09-05 复旦大学 一种自供电低功耗集成电路芯片及其制备方法
KR101099585B1 (ko) * 2010-11-01 2011-12-28 앰코 테크놀로지 코리아 주식회사 솔라 셀 반도체 패키지
JP2013214593A (ja) 2012-04-02 2013-10-17 Auto Network Gijutsu Kenkyusho:Kk 光モジュールおよび光ユニット
KR101909202B1 (ko) * 2012-10-08 2018-10-17 삼성전자 주식회사 패키지-온-패키지 타입의 패키지
US8809078B1 (en) * 2013-02-13 2014-08-19 Freescale Semiconductor, Inc. Solar powered IC chip
JP2014187365A (ja) 2013-03-24 2014-10-02 Freescale Semiconductor Inc 太陽エネルギーを動力とする集積回路チップ

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1551719A (zh) * 2003-05-16 2004-12-01 ���µ�����ҵ��ʽ���� 具有内置电路元件的组件及其制造方法
TW201041084A (en) * 2009-03-13 2010-11-16 Stats Chippac Ltd Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors
CN103378074A (zh) * 2012-04-19 2013-10-30 联发科技股份有限公司 芯片封装
CN104769713A (zh) * 2013-01-09 2015-07-08 晟碟半导体（上海）有限公司 包括用于嵌入和/或隔开半导体裸芯的独立膜层的半导体器件

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