CN110767615A - 一种ssd存储芯片封装结构及制造方法 - Google Patents
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Abstract
本发明公开了一种SSD存储芯片封装结构及制造方法,结构包括:基板;存储芯片,多个所述存储芯片依次堆叠并粘在基板的正面上;相邻所述存储芯片之间、存储芯片基板之间均通过键合线电性连接;导电柱,所述导电柱设置在存储芯片周边的所述基板上;导电柱与基板电性连接;第一塑封体,所述第一塑封体包覆基板、存储芯片、键合线和导电柱;导电柱顶部露出第一塑封体表面;控制芯片,所述控制芯片贴装在基板的背面,控制芯片与基板电性连接;及第二塑封体,所述第二塑封体包覆在控制芯片和基板,且控制芯片底面裸露第二塑封体下表面。该结构既可以有效散热,又同时缩小了封装体积。从而提高封装质量。
Description
技术领域
本发明涉及存储芯片封装技术领域,尤其涉及一种SSD存储芯片封装结构 及制造方法。
背景技术
随着科技技术的不断发展,人们对消费类电子产品的需求也越来越高,电 子产品中的存储芯片是一个关键的核心零部件,对于此芯片的封装要求也越来 越高,体积小,容量大已成为一种趋势。
对于传统的SSD封装芯片,主要是面积大,产品散热不好,对产品性能和 封装尺寸难以满足客户的要求。
发明内容
为解决现有技术中封装面积大、散热差的问题,本发明是提供一种SSD存 储芯片封装结构,该结构既可以有效散热,又同时缩小了封装体积。从而提高 封装质量。
为实现上述目的,本发明采用以下技术手段:
一种SSD存储芯片封装结构,包括:
基板;
存储芯片,多个所述存储芯片依次堆叠并粘在基板的正面上;相邻所述存 储芯片之间、存储芯片基板之间均通过键合线电性连接;
导电柱,所述导电柱设置在存储芯片周边的所述基板上;导电柱与基板电 性连接;
第一塑封体,所述第一塑封体包覆基板、存储芯片、键合线和导电柱;导 电柱顶部露出第一塑封体表面;
控制芯片,所述控制芯片贴装在基板的背面,控制芯片与基板电性连接;
及第二塑封体,所述第二塑封体包覆在控制芯片和基板,且第二塑封体下 表面裸露出控制芯片表面。
所述的导电柱为铜柱。
所述的导电柱通过导电胶与基板连接;所述的导电胶为导电银胶或者锡膏。
所述的控制芯片通过多个导电凸块与基板底部连接,控制芯片外围、基板 底部以及控制芯片与基板之间的导电凸块的空隙通过第二塑封体封装;
所述的控制芯片通过多个导电凸块与基板底部连接,控制芯片与基板之间 的导电凸块的空隙中设有底部填充体,控制芯片外围、基板底部通过第二塑封 体封装。
所述的基板设置有基板孔,基板孔内填充导电材料,用于基板正反面的电 性导通。
所述的第一塑封体和第二塑封体材料相同。
一种SSD存储芯片封装结构的制造方法,包括以下步骤:
在基板上贴装存储芯片;
相邻所述存储芯片之间、存储芯片基板之间均通过键合线电性连接;
将导电柱贴装在存储芯片周边的所述基板上;导电柱与基板电性连接;
使用第一塑封体包覆基板、存储芯片、键合线和导电柱;
打磨第一塑封体上表面,使得导电柱顶部露出第一塑封体表面;
将控制芯片贴装在基板的背面,控制芯片与基板电性连接;
使用第二塑封体包覆控制芯片和基板,并使得第二塑封体下表面裸露出控 制芯片表面。
所述的控制芯片通过多个导电凸块与基板底部连接,控制芯片外围、基板 底部以及控制芯片与基板之间的导电凸块的空隙通过第二塑封体封装;
所述的控制芯片通过多个导电凸块与基板底部连接,控制芯片与基板之间 的导电凸块的空隙中设有底部填充体,控制芯片外围、基板底部通过第二塑封 体封装。
与现有技术相比,本发明具有以下优点:
本发明一种SSD存储芯片封装结构,采用双面封装方案,正面贴存储芯片, 键合后与基板导通,同时正面需贴铜柱,塑封后打磨塑封表面将铜柱露出,铜 柱作为引出的管脚,背面贴控制芯片,键合与基板导通,采用敞开式塑封工艺 (openmolding)工艺实现露芯片表面。该结构既可以使得存储芯片在基板得到 有效封装、控制芯片在基板背面封装,又可以实现芯片的有效散热,还缩小了 封装体积,提高封装质量。
本发明制造方法通过敞开式塑封工艺露芯片和两面塑封的方式,既达到有 效散热的目的和减小封装结构的体积,从而提升质量和降低成本。
附图说明
图1:本申请的SSD存储芯片封装结构示意图;
图2:本申请在基板载体上装上存储芯片示意图;
图3:本申请存储芯片使用键合线与基板键合示意图;
图4:本申请使用铜柱贴装在存储芯片周边示意图;
图5:本申请使用塑封料塑封包裹示意图;
图6:本申请打磨将铜柱表面露出示意图;
图7:本申请将控制芯片贴在基板的背面示意图;
图8:本申请采用敞开式塑封工艺露芯片工艺将控制芯片露出示意图;
图中,1:第二塑封体,2:基板,3:导电柱,4:第一塑封体,5:存储芯 片;6:键合线;7:控制芯片;8:导电凸块。
具体实施方式
为了使本技术领域的人员更好地理解本发明中的技术方案,下面将结合本 发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述, 显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基 于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动的前提下所 获得的所有其他实施例,都应当属于本发明保护的范围。
需要说明的是,当元件被称为“设置于”另一个元件,它可以直接在另一个元 件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件,它可 以是直接连接到另一个元件或者可能同时存在居中元件。本文所使用的术语“垂 直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的,并不表示 是唯一的实施例。
除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术 领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术 语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的 术语“和/或”包括一个或多个相关的所列项目的任意的和所有的组合。
如图1所示,为本发明一种SSD存储芯片封装结构,包括:
基板2;
存储芯片5,多个所述存储芯片5依次堆叠并粘在基板2的正面上;相邻所 述存储芯片5之间、存储芯片5基板2之间均通过键合线6电性连接;
导电柱3,所述导电柱3设置在存储芯片5周边的所述基板2上;导电柱3 与基板2电性连接;
第一塑封体4,所述第一塑封体4包覆基板2、存储芯片5、键合线6和导 电柱3;导电柱3顶部露出第一塑封体4表面;
控制芯片7,所述控制芯片7贴装在基板2的背面,控制芯片7与基板2电 性连接;
及第二塑封体1,所述第二塑封体1包覆在控制芯片7和基板2,且第二塑 封体1下表面裸露出控制芯片7表面。
优选地,导电柱3为铜柱,铜柱满足了经济性和导电性的要求。
导电柱3通过导电胶与基板2连接;所述的导电胶为导电银胶或者锡膏。 先进行粘接确保电导通,再进行后续的封装。基板2设置有基板孔,基板孔内 填充导电材料,用于基板2正反面的电性导通。
作为优选地实施例,控制芯片7通过多个导电凸块与基板2底部连接,控 制芯片外围、基板底部以及控制芯片7与基板2之间的导电凸块的空隙通过第 二塑封体1封装。
另一优选例为,控制芯片7通过多个导电凸块8与基板2底部连接,控制 芯片7与基板2之间的导电凸块8的空隙中设有底部填充体,控制芯片外围、 基板底部通过第二塑封体1封装。
第一塑封体4和第二塑封体1材料相同。例如采用环氧树脂封装材料。
本发明的一种SSD存储芯片封装结构原理为:采用双面封装方案,正面贴 存储芯片,键合后与基板导通,同时正面需贴铜柱,塑封后打磨塑封表面将铜 柱露出,铜柱作为引出的管脚,背面贴控制芯片,键合与基板导通,采用敞开 式塑封工艺(openmolding)工艺实现露芯片(die)。
如图2至图8所示,本发明还提供了一种SSD存储芯片封装结构的制造方 法,包括以下步骤:
在基板2上贴装存储芯片5;
相邻所述存储芯片5之间、存储芯片5基板2之间均通过键合线6电性连 接;
将导电柱3贴装在存储芯片5周边的所述基板2上;导电柱3与基板2电 性连接;
使用第一塑封体4包覆基板2、存储芯片5、键合线6和导电柱3;
打磨第一塑封体4上表面,使得导电柱3顶部露出第一塑封体4表面;
将控制芯片7贴装在基板2的背面,控制芯片7与基板2电性连接;
使用第二塑封体1包覆控制芯片7和基板2,并使得第二塑封体1下表面裸 露出控制芯片7表面。
作为优选地实施例,控制芯片(7)与基板(2)底部之间通过多个导电凸 块电性连接。确保控制芯片7与基板2电性能良好。
实施例
图2-图8是制造过程分解示意图。具体步骤如下:
步骤1),如图2是在基板2载体上装上存储芯片5,芯片之间使用DAF膜 进行粘接;
步骤2),如图3是存储芯片5使用键合线6与基板2键合;
步骤3),如图4是使用铜柱3贴装在存储芯片周边,使用导电银胶或者锡 膏等导电物质进行电连接;
步骤4),如图5是使用第一塑封料塑封包裹,第一塑封体4包覆基板2、 存储芯片5、键合线6和导电柱3;导电柱3顶部露出第一塑封体4表面;
步骤5),如图6是打磨将铜柱表面露出。
步骤6),如图7是将控制芯片贴在基板的背面(同时控制芯片7与基板2 之间的导电凸块8的空隙中可以增加或者不增加底部填充体);
步骤7),如图8是采敞开式塑封工艺露芯片工艺将控制芯片露出,使用第 二塑封体1包覆控制芯片7和基板2,并使得控制芯片7底面裸露第二塑封体1 下表面。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通 技术人员来说,在不脱离本发明原理的前提下,还可以作出若干改进和润饰, 这些改进和润饰也应视为本发明的保护范围。
Claims (10)
1.一种SSD存储芯片封装结构,其特征在于,包括:
基板(2);
存储芯片(5),多个所述存储芯片(5)依次堆叠并粘在基板(2)的正面上;相邻所述存储芯片(5)之间、存储芯片(5)基板(2)之间均通过键合线(6)电性连接;
导电柱(3),所述导电柱(3)设置在存储芯片(5)周边的所述基板(2)上;导电柱(3)与基板(2)电性连接;
第一塑封体(4),所述第一塑封体(4)包覆基板(2)、存储芯片(5)、键合线(6)和导电柱(3);导电柱(3)顶部露出第一塑封体(4)表面;
控制芯片(7),所述控制芯片(7)贴装在基板(2)的背面,控制芯片(7)与基板(2)电性连接;
及第二塑封体(1),所述第二塑封体(1)包覆在控制芯片(7)和基板(2),且第二塑封体(1)下表面裸露出控制芯片(7)表面。
2.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的导电柱(3)为铜柱。
3.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的导电柱(3)通过导电胶与基板(2)连接;所述的导电胶为导电银胶或者锡膏。
4.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的控制芯片(7)通过多个导电凸块与基板(2)底部连接,控制芯片外围、基板底部以及控制芯片(7)与基板(2)之间的导电凸块的空隙通过第二塑封体(1)封装。
5.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的控制芯片(7)通过多个导电凸块(8)与基板(2)底部连接,控制芯片(7)与基板(2)之间的导电凸块(8)的空隙中设有底部填充体,控制芯片外围、基板底部通过第二塑封体(1)封装。
6.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的基板(2)设置有基板孔,基板孔内填充导电材料,用于基板(2)正反面的电性导通。
7.根据权利要求1所述的一种SSD存储芯片封装结构,其特征在于,所述的第一塑封体(4)和第二塑封体(1)材料相同。
8.一种SSD存储芯片封装结构的制造方法,其特征在于,包括以下步骤:
在基板(2)上贴装存储芯片(5);
相邻所述存储芯片(5)之间、存储芯片(5)基板(2)之间均通过键合线(6)电性连接;
将导电柱(3)贴装在存储芯片(5)周边的所述基板(2)上;导电柱(3)与基板(2)电性连接;
使用第一塑封体(4)包覆基板(2)、存储芯片(5)、键合线(6)和导电柱(3);
打磨第一塑封体(4)上表面,使得导电柱(3)顶部露出第一塑封体(4)表面;
将控制芯片(7)贴装在基板(2)的背面,控制芯片(7)与基板(2)电性连接;
使用第二塑封体(1)包覆控制芯片(7)和基板(2),并使得第二塑封体(1)下表面裸露出控制芯片(7)表面。
9.根据权利要求8所述的一种SSD存储芯片封装结构的制造方法,其特征在于,所述的控制芯片(7)通过多个导电凸块与基板(2)底部连接,控制芯片外围、基板底部以及控制芯片(7)与基板(2)之间的导电凸块的空隙通过第二塑封体(1)封装。
10.根据权利要求8所述的一种SSD存储芯片封装结构的制造方法,其特征在于,所述的控制芯片(7)通过多个导电凸块(8)与基板(2)底部连接,控制芯片(7)与基板(2)之间的导电凸块(8)的空隙中设有底部填充体,控制芯片外围、基板底部通过第二塑封体(1)封装。
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