CN106847703A - 低温多晶硅薄膜晶体管的制造方法和显示装置 - Google Patents
低温多晶硅薄膜晶体管的制造方法和显示装置 Download PDFInfo
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- CN106847703A CN106847703A CN201710233784.6A CN201710233784A CN106847703A CN 106847703 A CN106847703 A CN 106847703A CN 201710233784 A CN201710233784 A CN 201710233784A CN 106847703 A CN106847703 A CN 106847703A
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- doped region
- layer
- polysilicon
- protective layer
- heavily doped
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 118
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 115
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 18
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
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- 238000005468 ion implantation Methods 0.000 description 4
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Classifications
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Abstract
本发明提供了一种低温多晶硅薄膜晶体管的制造方法和显示装置。制备方法包括:在基底上形成多晶硅层和保护层图案,保护层覆盖多晶硅层;进行第一次离子注入处理,使离子穿过保护层注入到多晶硅层中,形成重掺杂区域;灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案。本发明仅需采用半色调掩膜或灰色调掩膜的一次构图工艺即可形成LTPS有源层,简化了生产工艺,且通过在多晶硅层上设置保护层,保护层在光刻胶灰化处理过程中有效保护了多晶硅层,避免了多晶硅层的损伤和氧化,提高了薄膜晶体管性能的可靠性,提高了产品品质。
Description
技术领域
本发明涉及显示技术领域,具体涉及一种低温多晶硅薄膜晶体管的制造方法和显示装置。
背景技术
近年来,显示技术得到快速发展,薄膜晶体管(Thin Film Transistor,TFT)技术由原来的非晶硅(a-Si)薄膜晶体管发展到低温多晶硅(Low Temperature Poly-Silicon,LTPS)薄膜晶体管。LTPS薄膜晶体管具有多方面的优势,例如,其电子迁移率可以达到200cm2/V-sec以上,不仅可有效减小薄膜晶体管的面积,提高开口率,而且可以在提高显示亮度的同时降低整体功耗。又如,较高的电子迁移率可以将部分驱动电路集成在基板上,减少驱动集成电路IC,大幅度提升液晶显示面板的可靠度,大幅度降低制造成本。因此,LTPS薄膜晶体管逐步成为显示技术领域的研究热点。
在制备LTPS薄膜晶体管过程中,为了使源漏电极与LTPS有源层之间形成良好的电连接以及抑制漏电流,需要在LTPS有源层上用离子注入工艺进行掺杂,形成重掺杂区域和轻掺杂区域。目前,现有技术通常采用半色调或灰色调掩膜的构图工艺实现LTPS有源层的重掺杂和轻掺杂。但经本申请发明人研究发现,现有工艺存在损伤和氧化多晶硅层的问题,影响显示效果。
发明内容
本发明实施例所要解决的技术问题是,提供一种低温多晶硅薄膜晶体管的制造方法和显示装置,以解决现有工艺存在损伤和氧化多晶硅层的问题。
为了解决上述技术问题,本发明实施例提供了一种低温多晶硅薄膜晶体管的制备方法,包括:
在基底上形成多晶硅层和保护层图案,所述保护层覆盖所述多晶硅层;
进行第一次离子注入处理,使离子穿过所述保护层注入到所述多晶硅层中,形成重掺杂区域;
灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案。
可选地,所述在基底上形成多晶硅层和保护层图案,所述保护层覆盖所述多晶硅层,包括:
在基底上依次沉积缓冲层、非晶硅薄膜和保护薄膜;
对所述非晶硅薄膜进行处理,使所述非晶硅薄膜结晶成多晶硅薄膜;
通过构图工艺形成多晶硅层和保护层图案,所述保护层的图案与所述多晶硅层的图案相同。
可选地,所述进行第一次离子注入处理,使离子穿过保护层注入到所述多晶硅层中,形成重掺杂区域包括:
在形成有多晶硅层和保护层图案的基底上,涂覆光刻胶,采用半色调掩膜版或灰色调掩膜版进行阶梯曝光并显影,在未掺杂区域位置形成未曝光区域,在轻掺杂区域形成部分曝光区域,在包括重掺杂区域的其余位置形成完全曝光区域;
进行第一次离子注入处理,使离子穿过所述保护层注入到完全曝光区域的多晶硅层中,形成重掺杂区域。
可选地,所述灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案包括:
光刻胶灰化处理,去除部分曝光区域的光刻胶;
进行第二次离子注入处理,使离子注入到部分曝光区域的多晶硅层中,形成轻掺杂区域;
剥离剩余的光刻胶,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案。
可选地,在进行第二次离子注入处理之前,还包括刻蚀掉完全曝光区域和部分曝光区域的保护层的处理。
可选地,在剥离剩余的光刻胶后之后,还包括刻蚀掉未曝光区域的保护层的处理。
可选地,所述保护层的材料包括氮化硅、氧化硅或氮化硅/氧化硅的复合薄膜,厚度为5nm~20nm。
可选地,还包括:形成栅电极和源漏电极图形,包括:
依次沉积第一绝缘层和栅金属薄膜,通过构图工艺形成栅电极;
沉积第二绝缘层,通过构图工艺形成绝缘层过孔;
沉积源漏金属薄膜,通过构图工艺形成源漏电极,源漏电极通过绝缘层过孔与多晶硅有源层的重掺杂区域连接。
本发明实施例还提供了一种低温多晶硅薄膜晶体管,所述低温多晶硅薄膜晶体管采用前述的制备方法制备。
本发明实施例还提供了一种显示装置,显示装置包括前述的低温多晶硅薄膜晶体管。
本发明实施例所提供的低温多晶硅薄膜晶体管的制造方法,仅需采用半色调掩膜或灰色调掩膜的一次构图工艺即可形成LTPS有源层,简化了生产工艺,且通过在多晶硅层上设置保护层,保护层在光刻胶灰化处理过程中有效保护了多晶硅层,避免了多晶硅层的损伤和氧化,既不会出现源漏电极与重掺杂区域之间接触电阻增大的问题,也不会出现电连接不良的问题,提高了LTPS薄膜晶体管性能的可靠性,提高了产品品质。本发明实施例对现有工艺改动很小,具有广泛的应用前景。
当然,实施本发明的任一产品或方法并不一定需要同时达到以上所述的所有优点。本发明的其它特征和优点将在随后的说明书实施例中阐述,并且,部分地从说明书实施例中变得显而易见,或者通过实施本发明而了解。本发明实施例的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明技术方案的进一步理解,并且构成说明书的一部分,与本申请的实施例一起用于解释本发明的技术方案,并不构成对本发明技术方案的限制。附图中各部件的形状和大小不反映真实比例,目的只是示意说明本发明内容。
图1为本发明实施例低温多晶硅薄膜晶体管的制造方法的流程图;
图2为本发明第一实施例沉积缓冲层、非晶硅和保护薄膜后的示意图;
图3为本发明第一实施例非晶硅薄膜结晶成多晶硅薄膜后的示意图;
图4为本发明第一实施例形成多晶硅层和保护层图案后的示意图;
图5为本发明第一实施例光刻胶曝光并显影后的示意图;
图6为本发明第一实施例形成重掺杂区域后的示意图;
图7为本发明第一实施例灰化处理后的示意图;
图8本发明第一实施例形成轻掺杂区域后的示意图;
图9本发明第一实施例形成LTPS有源层图案后的示意图;
图10本发明第一实施例LTPS薄膜晶体管的结构示意图;
图11本发明第二实施例刻蚀掉未曝光区域保护层后的示意图;
图12本发明第二实施例形成轻掺杂区域后的示意图;
图13本发明第二实施例形成LTPS有源层图案后的示意图;
图14本发明第二实施例LTPS薄膜晶体管的结构示意图;
图15本发明第三实施例形成LTPS有源层图案后的示意图;
图16本发明第三实施例LTPS薄膜晶体管的结构示意图。
附图标记说明:
10—基底; | 11—缓冲层; | 12—LTPS有源层; |
13—第一绝缘层; | 14—栅电极; | 15—第二绝缘层; |
16—源漏电极; | 20—非晶硅薄膜; | 21—多晶硅薄膜; |
22—多晶硅层; | 30—保护薄膜; | 31—保护层; |
100—光刻胶; | 121—重掺杂区域; | 122—轻掺杂区域; |
123—未掺杂区域。 |
具体实施方式
下面结合附图和实施例对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明,但不用来限制本发明的范围。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互任意组合。
目前,现有技术通常采用半色调或灰色调掩膜的构图工艺实现LTPS有源层的重掺杂和轻掺杂,但现有工艺存在损伤和氧化多晶硅层的问题,影响显示效果。经本申请发明人研究发现,其原因是,在半色调或灰色调掩膜构图工艺的光刻胶灰化处理过程中,所采用的O2等离子体不仅会轰击多晶硅层的重掺杂区使其出现损伤,而且还会氧化多晶硅层的重掺杂区,造成源漏电极与重掺杂区域之间的接触电阻增大,甚至造成电连接不良。
为了克服现有工艺存在损伤和氧化多晶硅层的问题,本发明实施例提供了一种低温多晶硅薄膜晶体管的制造方法。图1为本发明实施例低温多晶硅薄膜晶体管的制造方法的流程图。如图1所示,低温多晶硅薄膜晶体管的制造方法包括:
S1、在基底上形成多晶硅层和保护层图案,所述保护层覆盖所述多晶硅层;
S2、进行第一次离子注入处理,使离子穿过保护层注入到所述多晶硅层中,形成重掺杂区域;
S3、灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的LTPS有源层图案。
本发明实施例所提供的低温多晶硅薄膜晶体管的制造方法,通过在多晶硅层上设置保护层,保护层用于在光刻胶灰化处理过程中保护重掺杂区域,避免了多晶硅层的损伤和氧化。与现有工艺相比,本发明实施例克服了因现有工艺损伤和氧化多晶硅层导致源漏电极与重掺杂区域之间接触电阻增大和电连接不良的问题,提高了低温多晶硅薄膜晶体管性能的可靠性。
其中,步骤S1包括:
S11、在基底上依次沉积缓冲层、非晶硅薄膜和保护薄膜;
S12、对所述非晶硅薄膜进行处理,使所述非晶硅薄膜结晶成多晶硅薄膜;
S13、通过单色调掩膜的构图工艺形成多晶硅层和保护层图案,所述保护层的图案与多晶硅层的图案相同。
其中,步骤S2包括:
S21、在形成有多晶硅层和保护层图案的基底上,涂覆光刻胶,采用半色调掩膜版或灰色调掩膜版进行阶梯曝光并显影,在未掺杂区域位置形成未曝光区域,在轻掺杂区域形成部分曝光区域,在包括重掺杂区域的其余位置形成完全曝光区域;
S22、进行第一次离子注入处理,使离子穿过保护层注入到完全曝光区域的多晶硅层中,形成重掺杂区域。
其中,步骤S3包括:
S31、光刻胶灰化处理,去除部分曝光区域的光刻胶,暴露出轻掺杂区域;
S32、进行第二次离子注入处理,使离子注入到部分曝光区域的多晶硅层中,形成轻掺杂区域;
S33、剥离剩余的光刻胶,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的LTPS有源层图案。
其中,步骤S31与S32之间还包括:刻蚀掉完全曝光区域和部分曝光区域的保护层。
其中,步骤S33剥离剩余的光刻胶后,还包括:刻蚀掉未曝光区域的保护层。
其中,形成LTPS有源层图案之后,还包括:形成栅电极和源漏电极图形。
下面通过LTPS薄膜晶体管的制备过程进一步说明本发明实施例的技术方案。
第一实施例
图2~10为本发明第一实施例制备LTPS薄膜晶体管的示意图。其中,本实施例中所说的“构图工艺”包括沉积膜层、涂覆光刻胶、掩模曝光、显影、刻蚀、剥离光刻胶等处理,是现有成熟的制备工艺。沉积可采用溅射、蒸镀、化学气相沉积等已知工艺,涂覆可采用已知的涂覆工艺,刻蚀可采用已知的方法,在此不做具体的限定。
第一次构图工艺中,在基底上通过构图工艺形成多晶硅层和保护层图案。形成多晶硅层和保护层图案包括:在基底10上依次沉积缓冲层11、非晶硅薄膜20以及保护薄膜30,如图2所示。其中,基底10可以采用玻璃基底或石英基底。缓冲层11可以采用氮化硅SiNx、氧化硅SiOx或氮氧化硅Si(ON)x,可以为单层、双层或者多层结构,缓冲层的作用是:防止基底中的金属离子扩散至有源层,防止对阈值电压和漏电流等特性产生影响。合适的缓冲层可以改善多晶硅层背面界面的质量,防止在多晶硅层背面界面出产生漏电流,进一步还可以降低热传导,减缓被激光加热的硅的冷却速率。保护薄膜30可以采用SiNx、SiOx或SiNx/SiOx的复合薄膜,厚度为5nm~20nm。优选地,保护薄膜30的厚度为10nm。
采用激光镭射的方法对非晶硅薄膜20进行处理,使非晶硅薄膜20结晶成多晶硅薄膜21,如图3所示。其中,激光镭射可以采用XeCl激光、ArF激光、KrF激光和XeF激光等,这类准分子激光器产生紫外波段的激光束,通过紫外波段的短脉冲激光束照射非晶硅薄膜,非晶硅薄膜会快速吸收激光能量而融化和再结晶。
在保护薄膜30上涂覆一层光刻胶,采用单色调掩膜版对光刻胶100进行曝光并显影,对保护薄膜30和多晶硅薄膜21进行刻蚀并剥离剩余的光刻胶,形成多晶硅层22和保护层31图案,保护层31覆盖多晶硅层22,保护层的图案与多晶硅层的图案相同,如图4所示。
第二次构图工艺中,在形成有多晶硅层和保护层图案的基底上,通过半色调掩膜或灰色调掩膜的构图工艺形成包括重掺杂(Heavily Drain Doping,HDD)区域、轻掺杂(Lightly Drain Doping,LDD)区域和未掺杂(Undoped)区域的LTPS有源层图案。形成LTPS有源层图案包括:
在形成有多晶硅层22和保护层31图案的基底上,涂覆一层光刻胶100。采用半色调掩膜版或灰色调掩膜版对光刻胶100进行阶梯曝光并显影,在未掺杂区域位置形成未曝光区域C,具有第一厚度的光刻胶,在轻掺杂区域形成部分曝光区域B,具有第二厚度的光刻胶,在包括重掺杂区域的其余位置形成完全曝光区域A,无光刻胶,第一厚度大于第二厚度,如图5所示。
采用离子注入的方法,对完全曝光区域A的多晶硅层22进行第一次离子注入处理。由于多晶硅层22的未曝光区域C和部分曝光区域B有光刻胶100遮挡,即轻掺杂区域和未掺杂区域有光刻胶保护,而位于完全曝光区域A的重掺杂区域无光刻胶,因此离子穿过保护层31注入到完全曝光区域A的多晶硅层22中,在多晶硅层的两侧形成重掺杂区域121,如图6所示。实际制备时,第一次离子注入为N型离子注入,N型离子可以采用磷离子。由于保护层31的厚度较薄,N型离子可以穿过保护层31从而注入到多晶硅层22中,可以保证离子注入效果。离子注入可采用具有质量分析仪的离子注入、不具有质量分析仪的离子云式注入、等离子注入或者固态扩散式注入等方法。
通过光刻胶100灰化处理,使光刻胶100在整体上去除第二厚度,即去除部分曝光区域B的光刻胶,暴露出轻掺杂区域,未曝光区域C的光刻胶厚度减小,如图7所示。由于本实施例在多晶硅层上设置有保护层,因此在光刻胶灰化处理过程中,通过保护层31的保护有效避免了O2等离子体直接轰击多晶硅层的重掺杂区域121,既不会使多晶硅层的重掺杂区出现损伤,也不会使多晶硅层的重掺杂区出现氧化。
采用离子注入的方法,对完全曝光区域A和部分曝光区域B的多晶硅层22进行第二次离子注入处理。由于未曝光区域C有光刻胶100遮挡,即未掺杂区域有光刻胶保护,而位于部分曝光区域的轻掺杂区域和完全曝光区域的重掺杂区域无光刻胶,因此离子穿过保护层31注入到完全曝光区域A和部分曝光区域B的多晶硅层22中,在多晶硅层的重掺杂区域121与未掺杂区域123之间形成轻掺杂区域122,轻掺杂区域122的离子浓度小于重掺杂区域121的离子浓度,未掺杂区域123是薄膜晶体管的沟道区,如图8所示。实际制备时,第二次离子注入为N型离子注入,N型离子可以采用磷离子。
随后,剥离掉剩余的光刻胶,形成LTPS有源层12和保护层31图案,LTPS有源层12包括位于中部的未掺杂(n)区域123、位于两侧的重掺杂(n+)区域121、以及位于未掺杂区域123与重掺杂区域121之间的轻掺杂(n-)区域122,保护层31覆盖LTPS有源层12,保护层31的图案与LTPS有源层12的图案相同,如图9所示。本实施例为了使源漏电极与LTPS有源层之间形成良好的电连接,通过在LTPS有源层的源漏区域用离子注入工艺进行重掺杂,形成重掺杂区域,源漏电极与LTPS有源层的重掺杂区域连接,降低了接触电阻,可以获得较好的TFT电学特性。同时,考虑到半导体区域越来越短,短沟道效应愈发明显,短沟道效应造成TFT特性异常,如截止电压Vth偏大、漏电流Ioff偏高等,为了避免此类异常,在重掺杂区与未掺杂区域之间增加一轻掺杂区域,相当于在源漏电极与沟道之间串联一个电阻,降低了沟道的水平电场,抑制漏电流。而且,仅需采用半色调掩膜或灰色调掩膜的一次构图工艺即形成了重掺杂区域和轻掺杂区域,简化了工艺步骤。
在后续构图工艺中,在形成有前述图案的基底上,依次形成栅电极和源漏电极图案。本实施例形成栅电极和源漏电极图案包括:依次沉积第一绝缘层13和栅金属薄膜,第一绝缘层13覆盖整个基底10,通过单色调掩膜的构图工艺形成栅电极14。沉积第二绝缘层15,第二绝缘层15覆盖栅电极14和整个基底10,通过单色调掩膜的构图工艺在第二绝缘层15位于LTPS有源层12的重掺杂区域121的上方形成绝缘层过孔,绝缘层过孔中的第二绝缘层15、第一绝缘层13和保护层31被刻蚀掉,暴露出重掺杂区域121的表面。沉积源漏金属薄膜,通过单色调掩膜的构图工艺形成源漏电极16,源漏电极16包括位于沟道区两侧的源电极和漏电极,源电极和漏电极分别通过绝缘层过孔与多晶硅有源层12的重掺杂区域121连接,形成LTPS薄膜晶体管,如图10所示。实际实施时,栅金属薄膜和源漏金属薄膜可以采用Pt、Ru、Au、Ag、Mo、Cr、Al、Ta、Ti、W等金属中的一种或多种,第一绝缘层和第二绝缘层可以采用SiNx、SiOx或SiNx/SiOx的复合薄膜。
实际实施时,轻掺杂区域可以设置一个,也可以设置两个,如当LTPS薄膜晶体管用作像素开关时,则需要设计如本实施例所示的两个,而当LTPS薄膜晶体管用作周边开关元件时,则只需要在漏电极一侧设置。
本实施例所制备的LTPS薄膜晶体管包括:
基底10;
设置在基底10上的缓冲层11;
设置在缓冲层11上的LTPS有源层12,LTPS有源层12包括未掺杂区域123、轻掺杂区域和重掺杂区域121;
设置在LTPS有源层12上的保护层31,保护层31的图案与LTPS有源层12的图案相同;
覆盖保护层31的第一绝缘层13;
设置在第一绝缘层13上的栅电极14;
覆盖栅电极14的第二绝缘层15;
设置在第二绝缘层15上的源漏电极16,源漏电极16通过绝缘层过孔与LTPS有源层12的重掺杂区域121连接。
采用本实施例LTPS薄膜晶体管的制造方法,仅需一次采用半色调掩膜或灰色调掩膜的构图工艺即可形成LTPS有源层,且通过在多晶硅层上设置保护层,保护层在光刻胶灰化处理过程中有效保护了重掺杂区域,避免了多晶硅层的损伤和氧化,简化了生产工艺,提高了品质。
第二实施例
图10~14为本发明第二实施例制备LTPS薄膜晶体管的示意图。本实施例是基于第一实施例的一种扩展,与第一实施例不同的是,本实施例中,在光刻胶灰化处理后,先刻蚀掉未曝光区域以外的保护层,然后进行第二次离子注入处理。
本实施例中,从沉积缓冲层、非晶硅薄膜以及保护薄膜开始,到进行光刻胶灰化处理,工艺过程与第一实施例相同,参见图2~7所示。其中,光刻胶灰化处理过程中,由于重掺杂区域121上设置有保护层31,通过保护层31的保护有效避免了O2等离子体直接轰击多晶硅层的重掺杂区域121,既不仅使多晶硅层的重掺杂区出现损伤,也不会使多晶硅层的重掺杂区出现氧化。
在光刻胶灰化处理后,采用刻蚀方法刻蚀掉未曝光区域C(光刻胶100保护区域)以外的保护层31,如图11所示。实际实施时,该处理是可选的,也可以采用第一实施例的方案直接进行第二次离子注入。本实施例这样处理,是考虑到第二次离子注入是对轻掺杂区域进行离子注入,轻掺杂区域注入的离子剂量比较少,去除轻掺杂区域上方的保护层31可以更精确地调控离子注入剂量,提高产品质量。实际制备时,可以使用热磷酸溶液腐蚀的刻蚀方式,也可以采用其它刻蚀方式。
采用离子注入的方法,对完全曝光区域和部分曝光区域的多晶硅层22进行第二次离子注入处理。由于未曝光区域C有光刻胶100遮挡,即未掺杂区域有光刻胶保护,而位于部分曝光区域的轻掺杂区域和完全曝光区域的重掺杂区域无光刻胶,因此离子注入到完全曝光区域和部分曝光区域的多晶硅层22中,在多晶硅层的重掺杂区域121与未掺杂区域123之间形成轻掺杂区域122,如图12所示。由于对轻掺杂区域进行离子注入时,轻掺杂区域上方的保护层被去掉,可以更精确地调控离子注入剂量,提高注入质量。
随后,剥离掉剩余的光刻胶,形成LTPS有源层12和保护层31图案,LTPS有源层12包括位于中部的未掺杂(n)区域123、位于两侧的重掺杂(n+)区域121、以及位于未掺杂区域123与重掺杂区域121之间的轻掺杂(n-)区域122,保护层31覆盖部分LTPS有源层12,保护层31的图案与LTPS有源层12中未掺杂区域123的图案相同,如图13所示。
在后续构图工艺中,在形成有前述图案的基底上,依次形成栅电极和源漏电极图案。本实施例形成栅电极和源漏电极图案包括:依次沉积第一绝缘层13和栅金属薄膜,第一绝缘层13覆盖整个基底10,通过单色调掩膜的构图工艺形成栅电极14。沉积第二绝缘层15,第二绝缘层15覆盖栅电极14和整个基底10,通过单色调掩膜的构图工艺在第二绝缘层15位于LTPS有源层12的重掺杂区域121的上方形成绝缘层过孔,绝缘层过孔中的第二绝缘层15和第一绝缘层13被刻蚀掉,暴露出重掺杂区域121的表面。沉积源漏金属薄膜,通过单色调掩膜的构图工艺形成源漏电极16,源漏电极16包括位于沟道区两侧的源电极和漏电极,源电极和漏电极分别通过绝缘层过孔与多晶硅有源层12的重掺杂区域121连接,形成LTPS薄膜晶体管,如图14所示。
本实施例所制备的LTPS薄膜晶体管包括:
基底10;
设置在基底10上的缓冲层11;
设置在缓冲层11上的LTPS有源层12,LTPS有源层12包括未掺杂区域123、轻掺杂区域和重掺杂区域121;
设置在LTPS有源层12上的保护层31,保护层31覆盖LTPS有源层12的未掺杂区域123;
覆盖保护层31和LTPS有源层12的第一绝缘层13;
设置在第一绝缘层13上的栅电极14;
覆盖栅电极14的第二绝缘层15;
设置在第二绝缘层15上的源漏电极16,源漏电极16通过绝缘层过孔与LTPS有源层12的重掺杂区域121连接。
本实施例LTPS薄膜晶体管的结构与第一实施例不同的是,第一实施例的保护层31覆盖整个LTPS有源层12,而本实施例的保护层31仅覆盖LTPS有源层12的未掺杂区域123,保护层31的图案与LTPS有源层12中未掺杂区域123的图案相同。本实施例中,各膜层的材料、厚度、以及采用的制备手段与第一实施例相同,这里不再赘述。
第三实施例
图15~16为本发明第三实施例制备LTPS薄膜晶体管的示意图。本实施例是基于第二实施例的一种扩展,与第二实施例不同的是,本实施例中,在第二次离子注入处理后,先刻蚀掉保护层,然后进行后续构图工艺。
本实施例中,从沉积缓冲层、非晶硅薄膜以及保护薄膜开始,到进行光刻胶剥离处理,工艺过程与第二实施例相同,参见图2~7和图10~13所示。其中,光刻胶灰化处理过程中,由于重掺杂区域121上设置有保护层31,通过保护层31的保护有效避免了O2等离子体直接轰击多晶硅层的重掺杂区域121,既不仅使多晶硅层的重掺杂区出现损伤,也不会使多晶硅层的重掺杂区出现氧化。
剥离掉剩余的光刻胶后,采用刻蚀方法刻蚀掉剩余的保护层,形成LTPS有源层12,LTPS有源层12包括位于中部的未掺杂(n)区域123、位于两侧的重掺杂(n+)区域121、以及位于未掺杂区域123与重掺杂区域121之间的轻掺杂(n-)区域122,如图15所示。实际实施时,该处理是可选的,也可以采用第二实施例的方案直接进行后续工艺。本实施例这样处理,是考虑到LTPS有源层12的平坦性有助于后续工艺的实施以及提高产品质量。实际制备时,可以使用热磷酸溶液腐蚀的刻蚀方式,也可以采用其它刻蚀方式。
在后续构图工艺中,在形成有前述图案的基底上,依次形成栅电极和源漏电极图案。本实施例形成栅电极和源漏电极图案包括:依次沉积第一绝缘层13和栅金属薄膜,第一绝缘层13覆盖整个基底10,通过单色调掩膜的构图工艺形成栅电极14。沉积第二绝缘层15,第二绝缘层15覆盖栅电极14和整个基底10,通过单色调掩膜的构图工艺在第二绝缘层15位于LTPS有源层12的重掺杂区域121的上方形成绝缘层过孔,绝缘层过孔中的第二绝缘层15和第一绝缘层13被刻蚀掉,暴露出重掺杂区域121的表面。沉积源漏金属薄膜,通过单色调掩膜的构图工艺形成源漏电极16,源漏电极16包括位于沟道区两侧的源电极和漏电极,源电极和漏电极分别通过绝缘层过孔与多晶硅有源层12的重掺杂区域121连接,形成LTPS薄膜晶体管,如图16所示。
本实施例所制备的LTPS薄膜晶体管包括:
基底10;
设置在基底10上的缓冲层11;
设置在缓冲层11上的LTPS有源层12,LTPS有源层12包括未掺杂区域123、轻掺杂区域和重掺杂区域121;
覆盖LTPS有源层12的第一绝缘层13;
设置在第一绝缘层13上的栅电极14;
覆盖栅电极14的第二绝缘层15;
设置在第二绝缘层15上的源漏电极16,源漏电极16通过绝缘层过孔与LTPS有源层12的重掺杂区域121连接。
本实施例LTPS薄膜晶体管的结构与前述第一、第二实施例不同的是,第一、第二实施例的LTPS有源层12上设置有保护层31,而本实施例LTPS有源层12上的保护层31被完全去掉。本实施例中,各膜层的材料、厚度、以及采用的制备手段与第一、第二实施例相同,这里不再赘述。
第四实施例
基于前述实施例的发明构思,本实施例还提供了一种LTPS薄膜晶体管,该LTPS薄膜晶体管采用前述实施例所述的制备方法制备。
基于前述实施例的发明构思,本实施例还提供了一种显示基板,该显示基板包括采用前述实施例所述的制备方法制备的LTPS薄膜晶体管。该显示基板可以是阵列基板。
基于前述实施例的发明构思,本实施例还提供了一种显示装置,该显示装置包括前述的LTPS薄膜晶体管或显示基板。显示装置可以为:手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件,可以是液晶(LiquidCrystal Display,LCD)显示面板,也可以是有机发光二极管(Organic Light-EmittingDiode,OLED)显示面板等。
在本发明实施例的描述中,需要理解的是,术语“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
在本发明实施例的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本发明中的具体含义。
虽然本发明所揭露的实施方式如上,但所述的内容仅为便于理解本发明而采用的实施方式,并非用以限定本发明。任何本发明所属领域内的技术人员,在不脱离本发明所揭露的精神和范围的前提下,可以在实施的形式及细节上进行任何的修改与变化,但本发明的专利保护范围,仍须以所附的权利要求书所界定的范围为准。
Claims (10)
1.一种低温多晶硅薄膜晶体管的制备方法,其特征在于,包括:
在基底上形成多晶硅层和保护层图案,所述保护层覆盖所述多晶硅层;
进行第一次离子注入处理,使离子穿过所述保护层注入到所述多晶硅层中,形成重掺杂区域;
灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案。
2.根据权利要求1所述的制备方法,其特征在于,所述在基底上形成多晶硅层和保护层图案,所述保护层覆盖所述多晶硅层,包括:
在基底上依次沉积缓冲层、非晶硅薄膜和保护薄膜;
对所述非晶硅薄膜进行处理,使所述非晶硅薄膜结晶成多晶硅薄膜;
通过构图工艺形成多晶硅层和保护层图案,所述保护层的图案与所述多晶硅层的图案相同。
3.根据权利要求2所述的制备方法,其特征在于,所述进行第一次离子注入处理,使离子穿过保护层注入到所述多晶硅层中,形成重掺杂区域包括:
在形成有多晶硅层和保护层图案的基底上,涂覆光刻胶,采用半色调掩膜版或灰色调掩膜版进行阶梯曝光并显影,在未掺杂区域位置形成未曝光区域,在轻掺杂区域形成部分曝光区域,在包括重掺杂区域的其余位置形成完全曝光区域;
进行第一次离子注入处理,使离子穿过所述保护层注入到完全曝光区域的多晶硅层中,形成重掺杂区域。
4.根据权利要求3所述的制备方法,其特征在于,所述灰化处理后进行第二次离子注入处理,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案包括:
光刻胶灰化处理,去除部分曝光区域的光刻胶;
进行第二次离子注入处理,使离子注入到部分曝光区域的多晶硅层中,形成轻掺杂区域;
剥离剩余的光刻胶,形成包括重掺杂区域、轻掺杂区域和未掺杂区域的低温多晶硅有源层图案。
5.根据权利要求4所述的制备方法,其特征在于,在进行第二次离子注入处理之前,还包括刻蚀掉完全曝光区域和部分曝光区域的保护层的处理。
6.根据权利要求4所述的制备方法,其特征在于,在剥离剩余的光刻胶后之后,还包括刻蚀掉未曝光区域的保护层的处理。
7.根据权利要求1所述的制备方法,其特征在于,所述保护层的材料包括氮化硅、氧化硅或氮化硅/氧化硅的复合薄膜,厚度为5nm~20nm。
8.根据权利要求1~7任一所述的制备方法,其特征在于,还包括:形成栅电极和源漏电极图形,包括:
依次沉积第一绝缘层和栅金属薄膜,通过构图工艺形成栅电极;
沉积第二绝缘层,通过构图工艺形成绝缘层过孔;
沉积源漏金属薄膜,通过构图工艺形成源漏电极,源漏电极通过绝缘层过孔与多晶硅有源层的重掺杂区域连接。
9.一种低温多晶硅薄膜晶体管,其特征在于,所述低温多晶硅薄膜晶体管采用如权利要求1~8任一所述的制备方法制备。
10.一种显示装置,其特征在于,包括如权利要求9所述的低温多晶硅薄膜晶体管。
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