CN106298645B - 一种tft基板的制备方法 - Google Patents
一种tft基板的制备方法 Download PDFInfo
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- CN106298645B CN106298645B CN201610683532.9A CN201610683532A CN106298645B CN 106298645 B CN106298645 B CN 106298645B CN 201610683532 A CN201610683532 A CN 201610683532A CN 106298645 B CN106298645 B CN 106298645B
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- amorphous silicon
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- 239000010410 layer Substances 0.000 claims abstract description 259
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- 239000011229 interlayer Substances 0.000 claims abstract description 22
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 20
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 239000007790 solid phase Substances 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 5
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
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Abstract
本发明提供了一种TFT基板的制备方法。方法包括在基板上沉积缓冲层;在缓冲层上沉积第一非晶硅层,准分子激光退火处理转变为第一多晶硅层;图案化得到第一有源层;沉积栅极绝缘层,在栅极绝缘层上沉积M1层和层间绝缘层,沉积第二非晶硅层,形成第二有源层,形成过孔;沉积M2层,并对源漏电极层进行图案化,同时在第二有源层表面形成沟道;沉浸钝化层,并对钝化层图案化,在钝化层上沉积平坦层,在所述平坦层上位于所述显示TFT区域形成第四过孔,在平坦层上沉积阳极电极和像素定义层,并进行图形定义,即完成TFT基板的制备。本发明将TFT基板中驱动TFT区域和显示TFT区域的主动层用不同的技术制造,以满足不同TFT的需求。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种TFT基板的制备方法。
背景技术
低温多晶硅(LTPS)技术是新一代TFT基板的制造技术,与传统非晶硅(a-Si)技术的最大差异在于,低温多晶硅显示器反应速度较快,且有高亮度、高解析度与低耗电量等优点。多晶硅(Poly-Si)具有优异的电学性能,对于主动式矩阵有机发光二极管具有较好的驱动能力。因此,基于低温多晶硅季度的AMOLED显示背板目前被广泛使用。
基于单纯的LTPS技术或者oxide技术的AMOLED显示背板是目前广为应用的背板制作方法,两者均有较好的电学性能可以有很好的AMOLED驱动能力。另外新的SPC结晶方式有较好的均一性和低的漏电,以及较好的稳定性,也成为AMOLED的背板制作较好的方式。
LTPS目前由ELA(excimer laser annealing)技术结晶,利用激光的瞬间脉冲照射到非晶硅表面,使其溶化并重新结晶。但是ELA结晶技术对于晶格的均一性和晶格结晶方向不能做到有效控制,所以结晶状况在整个基板的分布上很不均匀,造成显示效果画面的长程不均一,有mura出现,且漏电较高。
发明内容
针对上述现有技术中的问题,本申请一种TFT基板的制备方法。
本发明提供一种TFT基板的制备方法,包括:
步骤101:提供基板,所述基板包括驱动TFT区域和显示TFT区域,在所述基板上沉积缓冲层;
步骤102:在所述缓冲层上沉积第一非晶硅层,并对所述第一非晶硅层进行准分子激光退火处理(ELA scan),使所述第一非晶硅层结晶转变为第一多晶硅层;
对所述第一多晶硅层进行图案化处理,得到位于所述驱动TFT区域的第一有源层;
步骤103:在所述第一有源层及缓冲层上沉积栅极绝缘层,
在所述栅极绝缘层上沉积并图案化第一金属层(M1层),分别对应第一有源层的位置处形成第一栅电极,作为顶栅结构;对应未设置第一有源层的位置处形成第二栅电极,作为底栅结构;
步骤104:利用第一栅电极和第二栅电极作为遮挡层,对栅极绝缘层进行离子植入;
步骤105:然后在栅极绝缘层、第一栅电极和第二栅电极上沉积层间绝缘层,并在所述层间绝缘层上沉积第二非晶硅层,然后对第二非晶硅层进行离子植入,接着对所述第二非晶硅层进行固相晶化(SPC),使所述第二非晶硅层结晶转变为第二多晶硅层;
对所述第二多晶硅层进行图案化处理,形成第二有源层,第二有源层位于与第二栅电极相对应的位置处;
步骤106:在所述栅极绝缘层和层间绝缘层上对应所述第一有源层形成第一过孔和第二过孔,在所述层间绝缘层上对应所述第二栅电极形成第三过孔;
步骤107:沉积源漏电极层(M2层),并对源漏电极层进行图案化,同时在第二有源层表面形成沟道;
步骤108:沉浸钝化层,并对钝化层图案化,然后在钝化层上沉积平坦层,在所述平坦层上位于所述显示TFT区域的位置处形成第四过孔,所述第四过孔延伸至源漏电极层表面;
步骤109:在所述平坦层上沉积阳极电极,阳极电极经由第四过孔与所述源漏电极层相接触,然后沉积像素定义层,并进行图形定义,即完成TFT基板的制备。
进一步的,所述基板为玻璃基板。
进一步的,所述缓冲层的材料为氧化硅、氮化硅或二者的组合。
进一步的,所述栅极绝缘层的厚度为50nm~500nm。
优选的栅极绝缘层的厚度为100nm~200nm。
进一步的,所述层间绝缘层的材料为氧化硅、氮化硅或二者的组合。
进一步的,所述层间绝缘层的厚度为100nm~300nm。
优选的层间绝缘层的厚度为200nm。
进一步的,对第二非晶硅层进行离子植入,植入的为B离子。
进一步的,所述钝化层的厚度为50nm~300nm。
优选的钝化层的厚度为100nm~200nm。
进一步的,所述平坦层的厚度为100nm~500nm。
优选的平坦层的厚度为200nm~300nm。
进一步的,所述像素定义层的厚度为300nm~900nm。
优选的像素定义层的厚度为400nm~500nm。
本发明的有益效果:
本发明将TFT基板中驱动TFT区域和显示TFT区域的主动层用不同的技术制造,以满足不同TFT的需求。其中显示TFT区域需要较短的开关时间和漏电流,而驱动TFT区域需要足够的电子迁移率和电流输出均一性,以提高发光均一程度。本发明针对驱动TFT区域的非晶硅层进行准分子激光退火处理,获得LTPS TFT,同时对显示TFT区域的非晶硅层进行固相晶化(SPC),获得SPC poly TFT,来满足显示面板对不同TFT的特性要求。显示TFT区域采用LTPS的TFT,发挥其相应快速,器件较小的优势;而驱动TFT区域采用SPC poly TFT,可以做成电流恒定型的OLED器件,并且迁移率高,可靠性好,寄生电容小。二者配合,可以有效解决画面不均和降低功耗的要求。既可以节省制程支出,又可以提高OLED发光均一性。
上述技术特征可以各种适合的方式组合或由等效的技术特征来替代,只要能够达到本发明的目的。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中:
图1为本发明实施例的方法流程图;
图2为本发明实施例中在基板上沉积缓冲层的示意图;
图3为本发明实施例中在缓冲层上沉积第一非晶硅层的示意图;
图4为本发明实施例中位于驱动TFT区域形成第一有源层的示意图;
图5为本发明实施例中在第一有源层及缓冲层上沉积栅极绝缘层和第一金属层的示意图;
图6为本发明实施例中对栅极绝缘层进行离子植入的示意图;
图7为本发明实施例中在栅极绝缘层、第一栅电极和第二栅电极上沉积层间绝缘层及第二非晶硅层的示意图;
图8为本发明实施例中在第二栅电极相对应的位置处形成第二有源层的示意图;
图9为本发明实施例中在第一有源层和第二栅电极形成过孔的示意图;
图10为本发明实施例中沉积源漏电极层的示意图;
图11为本发明实施例中沉浸钝化层和平坦层的示意图;
图12为本发明实施例中制备的TFT基板的结构示意图。
在附图中,相同的部件使用相同的附图标记。附图并未按照实际的比例。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
如图1所示为根据本发明的一个实施例的方法流程图,以下参考图1来对本发明所述的TFT基板的制备方法进行详细说明。
在步骤101中,提供基板1,所述基板包括驱动TFT区域和显示TFT区域,在所述基板上沉积缓冲层2。
具体的,所述基板为玻璃基板。
具体的,通过物理气相沉积法、化学气相沉积法或是电浆辅助化学气相沉积法沉积缓冲层。
如图2所示,图2为本发明实施例中在基板上沉积缓冲层的示意图,1为基板,2为缓冲层。
具体的,所述缓冲层2的材料为氧化硅、氮化硅或二者的组合。
本实施例优选的是氧化硅。
接下来在步骤102中,在所述缓冲层2上沉积第一非晶硅层21,并对所述第一非晶硅层21进行准分子激光退火处理(ELAscan),使所述第一非晶硅层结晶转变为第一多晶硅层;
如图3所示,图3为本发明实施例中在缓冲层上沉积第一非晶硅层的示意图,1为基板,2为缓冲层,21为第一非晶硅层。
对所述第一多晶硅层进行图案化处理,得到位于所述驱动TFT区域的第一有源层3。
如图4所示,图4为本发明实施例中位于驱动TFT区域形成第一有源层的示意图,1为基板,2为缓冲层,3为第一有源层。
具体的,通过旋涂或者打印等方式沉积第一非晶硅层。
对所述非晶硅层进行准分子激光退火处理(ELAscan)以形成所述多晶硅层,以将所述非晶硅层熔融使所述非晶硅层内的硅分子再结晶,以形成所述多晶硅层,以作为有源层的材质层。
在步骤103中,在所述第一有源层3及缓冲层2上沉积栅极绝缘层4,
在所述栅极绝缘层4上沉积并图案化第一金属层(M1层),分别对应第一有源层3的位置处形成第一栅电极51,作为顶栅结构;对应未设置第一有源层3的位置处形成第二栅电极52,作为底栅结构。
如图5所示,图5为本发明实施例中在第一有源层及缓冲层上沉积栅极绝缘层和第一金属层的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极。
具体的,通过旋涂或者打印等方式沉积栅极绝缘层。
所述栅极绝缘层为无机绝缘层或者有机绝缘层,无机绝缘层为二氧化硅、氮化硅等,有机绝缘层为聚乙烯吡咯烷酮、聚酰亚胺、丙烯等。
具体的,还可以对栅极绝缘层表面进行等离子体处理,以修复该栅极绝缘层表面的缺陷。
在步骤104中,利用第一栅电极51和第二栅电极52作为遮挡层,对栅极绝缘层4进行离子植入;
如图6所示,图6为本发明实施例中对栅极绝缘层进行离子植入的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极。
步骤105中,在栅极绝缘层4、第一栅电极51和第二栅电极52上沉积层间绝缘层6,并在所述层间绝缘层6上沉积第二非晶硅层61,然后对第二非晶硅层61进行离子植入,接着对所述第二非晶硅层61进行固相晶化(SPC),使所述第二非晶硅层结晶转变为第二多晶硅层;
如图7所示,图7为本发明实施例中在栅极绝缘层、第一栅电极和第二栅电极上沉积层间绝缘层及第二非晶硅层的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,61为第二非晶硅层。
对所述第二多晶硅层61进行图案化处理,形成第二有源层7,第二有源层7位于与第二栅电极52相对应的位置处;
如图8所示,图8为本发明实施例中在第二栅电极形成第二有源层的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,7为第二有源层。
具体的,采用快速热退火(RTA)方法进行固相晶化。具有用时短、耗热少、产量大、过程容易控制的优点。而且晶化后的多晶硅缺陷少、内应力少。在快速热处理过程中,量子效应的作用有:a、在任何处理温度下,增大体扩散和表面扩散系数;b、缩短热处理过程的时间;c、减小微观缺陷密度,从而改善材料性能。
在步骤106中,在所述栅极绝缘层4和层间绝缘层6上对应所述第一有源层3形成第一过孔71和第二过孔72,在所述层间绝缘层6上对应所述第二栅电极52形成第三过孔73;
如图9所示,图9为本发明实施例中在第一有源层3和第二栅电极52上方形成过孔的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,7为第二有源层,71为第一过孔,72为第二过孔,73为第三过孔。
在步骤107中,沉积源漏电极层8(M2层),并对源漏电极层8进行图案化,同时在第二有源层7表面形成沟道74;
如图10所示,图10为本发明实施例中沉积源漏电极层的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,7为第二有源层,74为沟道,8为源漏电极层。
在步骤108中,沉浸钝化层9,并对钝化层9图案化,然后在钝化层9上沉积平坦层10,在所述平坦层10上位于所述显示TFT区域的位置处形成第四过孔100,所述第四过孔100延伸至源漏电极层8表面;
如图11所示,图11为本发明实施例中沉浸钝化层和平坦层的示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,7为第二有源层,8为源漏电极层,9为钝化层,10为平坦层,100为第四过孔。
在步骤109中,在所述平坦层10上沉积阳极电极11,阳极电极11经由第四过孔100与所述源漏电极层相接触,然后沉积像素定义层12,并进行图形定义,即完成TFT基板的制备。
如图12所示,图12为本发明实施例中制备的TFT基板的结构示意图,1为基板,2为缓冲层,3为第一有源层,4为栅极绝缘层,51为第一栅电极,52为第二栅电极,6为层间绝缘层,7为第二有源层,8为源漏电极层,9为钝化层,10为平坦层,11为阳极电极,12为像素定义层。
显示TFT区域需要较短的开关时间和漏电流,而驱动TFT区域需要足够的电子迁移率和电流输出均一性,以提高发光均一程度。因此,其中本发明针对驱动TFT区域的非晶硅层进行准分子激光退火处理,获得LTPS TFT,同时对显示TFT区域的非晶硅层进行固相晶化(SPC),获得SPC poly TFT,来满足显示面板对不同TFT的特性要求。显示TFT区域采用LTPS的TFT,发挥其相应快速,器件较小的优势;而驱动TFT区域采用SPC poly TFT,可以做成电流恒定型的OLED器件,并且迁移率高,可靠性好,寄生电容小。二者配合,可以有效解决画面不均和降低功耗的要求。既可以节省制程支出,又可以提高OLED发光均一性。
虽然在本文中参照了特定的实施方式来描述本发明,但是应该理解的是,这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是,可以对示例性的实施例进行许多修改,并且可以设计出其他的布置,只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是,可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是,结合单独实施例所描述的特征可以使用在其他所述实施例中。
Claims (9)
1.一种TFT基板的制备方法,其特征在于,包括:
步骤101:提供基板,所述基板包括驱动TFT区域和显示TFT区域,在所述基板上沉积缓冲层;
步骤102:在所述缓冲层上沉积第一非晶硅层,并对所述第一非晶硅层进行准分子激光退火处理,使所述第一非晶硅层结晶转变为第一多晶硅层;
对所述第一多晶硅层进行图案化处理,得到位于所述驱动TFT区域的第一有源层;
步骤103:在所述第一有源层及缓冲层上沉积栅极绝缘层,
在所述栅极绝缘层上沉积并图案化第一金属层,分别对应第一有源层的位置处形成第一栅电极,对应未设置第一有源层的位置处形成第二栅电极;
步骤104:利用第一栅电极和第二栅电极作为遮挡层,对栅极绝缘层进行离子植入;
步骤105:然后在栅极绝缘层、第一栅电极和第二栅电极上沉积层间绝缘层,并在所述层间绝缘层上沉积第二非晶硅层,然后对第二非晶硅层进行离子植入,接着对所述第二非晶硅层进行固相晶化,使所述第二非晶硅层结晶转变为第二多晶硅层;
对所述第二多晶硅层进行图案化处理,形成第二有源层,第二有源层位于与第二栅电极相对应的位置处;对第二非晶硅层进行离子植入,植入的为B离子;
步骤106:在所述栅极绝缘层和层间绝缘层上对应所述第一有源层形成第一过孔和第二过孔,在所述层间绝缘层上对应所述第二栅电极形成第三过孔;
步骤107:沉积源漏电极层,并对源漏电极层进行图案化,同时在第二有源层表面形成沟道;
步骤108:沉浸钝化层,并对钝化层图案化,然后在钝化层上沉积平坦层,在所述平坦层上位于所述显示TFT区域的位置处形成第四过孔,所述第四过孔延伸至源漏电极层表面;
步骤109:在所述平坦层上沉积阳极电极,阳极电极经由第四过孔与所述源漏电极层相接触,然后沉积像素定义层,并进行图形定义,即完成TFT基板的制备。
2.如权利要求1所述的TFT基板的制备方法,其特征在于,所述基板为玻璃基板。
3.如权利要求1或2所述的TFT基板的制备方法,其特征在于,所述缓冲层的材料为氧化硅、氮化硅或二者的组合。
4.如权利要求3所述的TFT基板的制备方法,其特征在于,所述栅极绝缘层的厚度为50nm~500nm。
5.如权利要求1或2所述的TFT基板的制备方法,其特征在于,所述层间绝缘层的材料为氧化硅、氮化硅或二者的组合。
6.如权利要求5所述的TFT基板的制备方法,其特征在于,所述层间绝缘层的厚度为100nm~300nm。
7.如权利要求1所述的TFT基板的制备方法,其特征在于,所述钝化层的厚度为50nm~300nm。
8.如权利要求1或2所述的TFT基板的制备方法,其特征在于,所述平坦层的厚度为100nm~500nm。
9.如权利要求8所述的TFT基板的制备方法,其特征在于,所述像素定义层的厚度为300nm~900nm。
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