CN104701265A - 低温多晶硅tft基板结构及其制作方法 - Google Patents

低温多晶硅tft基板结构及其制作方法 Download PDF

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CN104701265A
CN104701265A CN201510140649.8A CN201510140649A CN104701265A CN 104701265 A CN104701265 A CN 104701265A CN 201510140649 A CN201510140649 A CN 201510140649A CN 104701265 A CN104701265 A CN 104701265A
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polysilicon section
tft
polysilicon
amorphous silicon
insulating film
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张晓星
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2015/077160 priority patent/WO2016155056A1/zh
Priority to US14/779,336 priority patent/US20170098667A1/en
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Abstract

本发明提供一种低温多晶硅TFT基板结构及其制作方法，通过将驱动TFT区域与显示TFT区域的非晶硅层设置成不同的厚度，使驱动TFT区域的非晶硅层的厚度较小，显示TFT区域的非晶硅层的厚度较大，从而在准分子激光退火处理过程中，驱动TFT区域与显示TFT区域的非晶硅层在相同能量激光的作用下产生不同的结晶效果，实现了对结晶颗粒大小的控制，使得驱动TFT区域的多晶硅层在晶化过程中形成较大的晶格尺寸，提高了电子迁移率，使得显示TFT区域的多晶硅层在晶化过程中实现碎晶，保证了晶界均一性，提高了电流的均一性，从而满足了不同TFT的电性要求，提高了OLED发光的均一性。

Description

低温多晶硅TFT基板结构及其制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种低温多晶硅TFT基板结构及其制作方法。
背景技术
低温多晶硅(Low Temperature Poly-silicon，LTPS)技术是新一代TFT基板的制造技术，与传统非晶硅(a-Si)技术的最大差异在于，低温多晶硅显示器反应速度较快，且有高亮度、高解析度与低耗电量等优点。多晶硅(Poly-Si)具有优异的电学性能，对于主动式矩阵有机发光二极管(Active-Matrix OrganicLight Emitting Diode，AMOLED)具有较好的驱动能力。因此，基于低温多晶硅技术的AMOLED显示背板目前被广泛使用。
现有低温多晶硅TFT基板结构的制作方法主要包括如下步骤：
步骤1、如图1所示，提供基板100，所述基板100包括驱动TFT区域与显示TFT区域，在所述基板100上沉积缓冲层110；
步骤2、如图2所示，在所述缓冲层110上沉积非晶硅层，并经过准分子激光退火前处理后，对所述非晶硅层进行准分子激光退火处理，使所述非晶硅层结晶、转变为多晶硅层130；
步骤3、对所述多晶硅层130进行图案化处理，得到位于所述驱动TFT区域的第一多晶硅段140、及位于所述显示TFT区域的第二多晶硅段150；
步骤4、在所述第一多晶硅段140、第二多晶硅段150及缓冲层110上沉积栅极绝缘层160；
步骤5、在所述栅极绝缘层160上沉积并图案化第一金属层，分别对应第一多晶硅段140与第二多晶硅段150的上方形成第一栅极170与第二栅极180；
步骤6、在所述栅极绝缘层160、第一栅极170、及第二栅极180上沉积层间绝缘层190，并在所述层间绝缘层190、及栅极绝缘层160上分别对应所述第一多晶硅段140、及第二多晶硅段150上方形成第一过孔200与第二过孔200’；
步骤7、如图4所示，在所述层间绝缘层190上沉积并图案化第二金属层，分别形成位于所述驱动TFT区域的第一源/漏极210、及位于所述显示TFT区域的第二源/漏极220，所述第一源/漏极210经由第一过孔200与所述第一多晶硅段140相接触，所述第二源/漏极220经由第二过孔200’与第二多晶硅段150相接触。
其中，准分子激光退火处理(Excimer Laser Annealing，ELA)技术是利用激光的瞬间脉冲照射到非晶硅表面，使其溶化并重新结晶。因为AMOLED驱动需要驱动TFT和显示TFT，驱动TFT需要较高的电子迁移率，所以需要比较大的晶格，显示TFT需要有足够的电子迁移率和电流均一性，从而可以使OLED器件均匀发光。
然而目前的ELA结晶技术对于晶格的均一性和晶格结晶方向不能做到有效控制，所以结晶状况在整个基板的分布上很不均匀，造成显示效果的长程不均一。
发明内容
本发明的目的在于提供一种低温多晶硅TFT基板结构的制作方法，可对多晶硅的结晶过程进行控制，使驱动TFT区域的多晶硅层在晶化过程中形成较大的晶格尺寸，提高电子迁移率，使显示TFT区域的多晶硅层在晶化过程中实现碎晶，保证晶界的均一性，提高电流均一性，从而满足不同TFT的电性要求，提高OLED发光的均一性。
本发明的另一目的在于提供一种低温多晶硅TFT基板结构，驱动TFT区域的多晶硅层的晶格尺寸较大，具有较高的电子迁移率，显示TFT区域的多晶硅层的晶界均一性好，具有较高的电流均一性。
为实现上述目的，本发明提供一种低温多晶硅TFT基板结构的制作方法，包括如下步骤：
步骤1、提供基板，所述基板包括驱动TFT区域与显示TFT区域，在所述基板上沉积缓冲层；
步骤2、在所述缓冲层上沉积非晶硅层，并对所述非晶硅层进行图案化处理，使所述显示TFT区域的非晶硅层的厚度大于所述驱动TFT区域的非晶硅层的厚度；
步骤3、经过准分子激光退火前处理后，对所述非晶硅层进行准分子激光退火处理，使所述非晶硅层结晶，转变为多晶硅层；
步骤4、对所述多晶硅层进行图案化处理，得到位于所述驱动TFT区域的第一多晶硅段、及位于所述显示TFT区域的第二多晶硅段；
步骤5、在所述第一多晶硅段、第二多晶硅段及缓冲层上沉积栅极绝缘层；
步骤6、在所述栅极绝缘层上沉积并图案化第一金属层，分别对应第一多晶硅段、及第二多晶硅段的上方形成第一栅极、及第二栅极；
步骤7、在所述栅极绝缘层、第一栅极、及第二栅极上沉积层间绝缘层，并在所述层间绝缘层、及栅极绝缘层上分别对应所述第一多晶硅段、及第二多晶硅段上方形成第一过孔与第二过孔；
步骤8、在所述层间绝缘层上沉积并图案化第二金属层，分别形成位于所述驱动TFT区域的第一源/漏极、及位于所述显示TFT区域的第二源/漏极，所述第一源/漏极经由第一过孔与所述第一多晶硅段相接触，所述第二源/漏极经由第二过孔与第二多晶硅段相接触。
所述第二多晶硅段的厚度大于所述第一多晶硅段的厚度；所述第一多晶硅段中的晶格尺寸大于第二多晶硅段中的晶格尺寸；所述第二多晶硅段中的碎晶多于第一多晶硅段中的碎晶。
所述基板为玻璃基板，所述缓冲层的材料为氧化硅、氮化硅、或二者的组合。所述层间绝缘层的材料为氧化硅、氮化硅、或二者的组合。
所述驱动TFT区域的非晶硅层与所述显示TFT区域的非晶硅层的厚度差大于500A。
本发明还提供一种低温多晶硅TFT基板结构，其包括驱动TFT区域与显示TFT区域，所述驱动TFT区域包括基板、设于所述基板上的缓冲层、设于所述缓冲层上的第一多晶硅段、设于所述缓冲层及第一多晶硅段上的栅极绝缘层、对应所述第一多晶硅段上方设于所述栅极绝缘层上的第一栅极、设于所述栅极绝缘层及第一栅极上的层间绝缘层、及设于所述层间绝缘层上的第一源/漏极；
所述显示TFT区域包括基板、设于所述基板上的缓冲层、设于所述缓冲层上的第二多晶硅段、设于所述缓冲层及第二多晶硅段上的栅极绝缘层、对应所述第二多晶硅段上方设于所述栅极绝缘层上的第二栅极、设于所述栅极绝缘层及第二栅极上的层间绝缘层、及设于所述层间绝缘层上的第二源/漏极；
其中，所述第二多晶硅段的厚度大于所述第一多晶硅段的厚度。
所述第一多晶硅段中的晶格尺寸大于第二多晶硅段中的晶格尺寸；所述第二多晶硅段中的碎晶多于第一多晶硅段中的碎晶。
所述基板为玻璃基板，所述缓冲层的材料为氧化硅、氮化硅、或二者的组合，所述层间绝缘层的材料为氧化硅、氮化硅、或二者的组合。
所述驱动TFT区域的层间绝缘层及栅极绝缘层上对应所述第一多晶硅段上方形成有第一过孔，所述第一源/漏极经由所述第一过孔与所述第一多晶硅段相接触；
所述显示TFT区域的层间绝缘层及栅极绝缘层上对应所述第二多晶硅段上方形成有第二过孔，所述第二源/漏极经由所述第二过孔与所述第二多晶硅段相接触。
所述第二多晶硅段与所述第一多晶硅段的厚度差大于500A。
本发明的有益效果：本发明提供的一种低温多晶硅TFT基板结构及其制作方法，通过将驱动TFT区域与显示TFT区域的非晶硅层设置成不同的厚度，使驱动TFT区域的非晶硅层的厚度较小，显示TFT区域的非晶硅层的厚度较大，从而在准分子激光退火处理过程中，驱动TFT区域与显示TFT区域的非晶硅层在相同能量激光的作用下产生不同的结晶效果，实现了对结晶颗粒大小的控制，使得驱动TFT区域的多晶硅层在晶化过程中形成较大的晶格尺寸，提高了电子迁移率，使得显示TFT区域的多晶硅层在晶化过程中实现碎晶，保证了晶界均一性，提高了电流的均一性，从而满足了不同TFT的电性要求，提高了OLED发光的均一性。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为现有低温多晶硅TFT基板结构的制作方法的步骤1的示意图；
图2为现有低温多晶硅TFT基板结构的制作方法的步骤2的示意图；
图3为现有低温多晶硅TFT基板结构的制作方法的步骤3的示意图；
图4为现有低温多晶硅TFT基板结构的制作方法的步骤7的示意图；
图5为本发明低温多晶硅TFT基板结构的制作方法的流程图；
图6为本发明低温多晶硅TFT基板结构的制作方法的步骤1的示意图；
图7为本发明低温多晶硅TFT基板结构的制作方法的步骤2的示意图；
图8为本发明低温多晶硅TFT基板结构的制作方法的步骤3的示意图；
图9为本发明低温多晶硅TFT基板结构的制作方法的步骤4的示意图；
图10为本发明低温多晶硅TFT基板结构的制作方法的步骤5的示意图；
图11为本发明低温多晶硅TFT基板结构的制作方法的步骤6的示意图；
图12为本发明低温多晶硅TFT基板结构的制作方法的步骤7的示意图；
图13为本发明低温多晶硅TFT基板结构的制作方法的步骤8的示意图暨本发明低温多晶硅TFT基板结构的剖面示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图5，本发明首先提供一种低温多晶硅TFT基板结构的制作方法，包括如下步骤：
步骤1、如图6所示，提供基板1，所述基板1包括驱动TFT区域与显示TFT区域，在所述基板1上沉积缓冲层11。
具体地，所述基板1为玻璃基板，所述缓冲层11的材料可以是氧化硅(SiOx)、氮化硅(SiNx)、或二者的组合。
步骤2、如图7所示，在所述缓冲层11上沉积非晶硅层12，并对所述非晶硅层12进行图案化处理，使所述显示TFT区域的非晶硅层12的厚度大于所述驱动TFT区域的非晶硅层12的厚度。
将所述非晶硅层12对应不同的区域设置成不同的厚度，可以使后续准分子激光退火处理过程中产生不同的结晶效果。
优选的，所述驱动TFT区域的非晶硅层12与所述显示TFT区域的非晶硅层12的厚度差大于500A。
步骤3、如图8所示，经过准分子激光退火前处理后，对所述非晶硅层12进行准分子激光退火处理，使所述非晶硅层12结晶，转变为多晶硅层13。
步骤4、如图9所示，对所述多晶硅层13进行图案化处理，得到位于所述驱动TFT区域的第一多晶硅段14、及位于所述显示TFT区域的第二多晶硅段15。
在所述准分子激光退火处理过程中，由于驱动TFT区域的非晶硅层12的厚度较小，显示TFT区域的非晶硅层12的厚度较大，从而使驱动TFT区域与显示TFT区域的非晶硅层12在相同能量激光的作用下产生不同的结晶效果，所述驱动TFT区域的多晶硅层12在晶化过程中形成较大的晶格尺寸，提高了电子迁移率，所述显示TFT区域的多晶硅层12在晶化过程中实现碎晶，保证了晶界均一性，提高了电流的均一性。
因此在本实施例中，所述第一多晶硅段14的厚度大于所述第二多晶硅段15的厚度。所述第一多晶硅段14中的晶格尺寸大于第二多晶硅段15中的晶格尺寸；所述第二多晶硅段15中的碎晶多于第一多晶硅段14中的碎晶。
步骤5、如图10所示，在所述第一多晶硅段14、第二多晶硅段15及缓冲层11上沉积栅极绝缘层16。
步骤6、如图11所示，在所述栅极绝缘层16上沉积并图案化第一金属层，分别对应第一多晶硅段14、及第二多晶硅段15的上方形成第一栅极17、及第二栅极18。
步骤7、如图12所示，在所述栅极绝缘层16、第一栅极17、及第二栅极18上沉积层间绝缘层19，并在所述层间绝缘层19、及栅极绝缘层16上分别对应所述第一多晶硅段14、及第二多晶硅段15上方形成第一过孔20与第二过孔20’。
在所述栅极绝缘层16、第一栅极17、及第二栅极18上沉积层间绝缘层19，并在所述层间绝缘层19、及栅极绝缘层16上分别对应所述第一多晶硅段14、及第二多晶硅段15上方形成第一过孔20与第二过孔20’。
具体地，所述层间绝缘层19的材料可以是氧化硅、氮化硅、或二者的组合。
步骤8、如图13所示，在所述层间绝缘层19上沉积并图案化第二金属层，分别形成位于所述驱动TFT区域的第一源/漏极21、及位于所述显示TFT区域的第二源/漏极22，所述第一源/漏极21经由第一过孔20与所述第一多晶硅段14相接触，所述第二源/漏极22经由第二过孔20’与第二多晶硅段15相接触。
上述低温多晶硅TFT基板结构的制作方法，通过将驱动TFT区域与显示TFT区域的非晶硅层设置成不同的厚度，使驱动TFT区域的非晶硅层的厚度较小，显示TFT区域的非晶硅层的厚度较大，从而在准分子激光退火处理过程中，驱动TFT区域与显示TFT区域的非晶硅层在相同能量激光的作用下产生不同的结晶效果，实现了对结晶颗粒大小的控制，使得驱动TFT区域的多晶硅层在晶化过程中形成较大的晶格尺寸，提高了电子迁移率，使得显示TFT区域的多晶硅层在晶化过程中实现碎晶，保证了晶界均一性，提高了电流的均一性，从而满足了不同TFT的电性要求，提高了OLED发光的均一性。
请参阅图13，本发明还提供一种低温多晶硅TFT基板结构，其包括驱动TFT区域与显示TFT区域，所述驱动TFT区域包括基板1、设于所述基板1上的缓冲层11、设于所述缓冲层11上的第一多晶硅段14、设于所述缓冲层11及第一多晶硅段14上的栅极绝缘层16、对应所述第一多晶硅段14上方设于所述栅极绝缘层16上的第一栅极17、设于所述栅极绝缘层16及第一栅极17上的层间绝缘层19、及设于所述层间绝缘层19上的第一源/漏极21；
所述显示TFT区域包括基板1、设于所述基板1上的缓冲层11、设于所述缓冲层11上的第二多晶硅段15、设于所述缓冲层11及第二多晶硅段15上的栅极绝缘层16、对应所述第二多晶硅段15上方设于所述栅极绝缘层16上的第二栅极18、设于所述栅极绝缘层16及第二栅极18上的层间绝缘层19、及设于所述层间绝缘层19上的第二源/漏极22；
其中，所述第二多晶硅段15的厚度大于所述第一多晶硅段14的厚度。
所述第一多晶硅段14中的晶格尺寸大于第二多晶硅段15中的晶格尺寸；所述第二多晶硅段15中的碎晶多于第一多晶硅段14中的碎晶。
具体地，所述驱动TFT区域的层间绝缘层19及栅极绝缘层16上对应所述第一多晶硅段14上方形成有第一过孔20，所述第一源/漏极21经由所述第一过孔20与所述第一多晶硅段14相接触。
所述显示TFT区域的层间绝缘层19及栅极绝缘层16上对应所述第二多晶硅段15上方形成有第二过孔20’，所述第二源/漏极22经由所述第二过孔20’与所述第二多晶硅段15相接触。
具体地，所述基板1为玻璃基板，所述缓冲层11的材料为氧化硅、氮化硅、或二者的组合，所述层间绝缘层19的材料为氧化硅、氮化硅、或二者的组合。
优选的，所述第二多晶硅段15与所述第一多晶硅段14的厚度差大于500A。
上述低温多晶硅TFT基板结构，预先将驱动TFT区域与显示TFT区域的非晶硅层设置成不同的厚度，驱动TFT区域的非晶硅层的厚度较小，显示TFT区域的非晶硅层的厚度较大，从而在准分子激光退火处理过程中，驱动TFT区域与显示TFT区域的非晶硅层在相同能量激光的作用下产生不同的结晶效果，驱动TFT区域的多晶硅层在晶化过程中形成的晶格尺寸较大，具有较高的电子迁移率，显示TFT区域的多晶硅层在晶化过程中晶界均一性较好，具有较高的电流均一性，满足了不同TFT的电性要求，提高了OLED发光的均一性。
综上所述，本发明的低温多晶硅TFT基板结构及其制作方法，通过将驱动TFT区域与显示TFT区域的非晶硅层设置成不同的厚度，使驱动TFT区域的非晶硅层的厚度较小，显示TFT区域的非晶硅层的厚度较大，从而在准分子激光退火处理过程中，驱动TFT区域与显示TFT区域的非晶硅层在相同能量激光的作用下产生不同的结晶效果，实现了对结晶颗粒大小的控制，使得驱动TFT区域的多晶硅层在晶化过程中形成较大的晶格尺寸，提高了电子迁移率，使得显示TFT区域的多晶硅层在晶化过程中实现碎晶，保证了晶界均一性，提高了电流的均一性，从而满足了不同TFT的电性要求，提高了OLED发光的均一性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

1.一种低温多晶硅TFT基板结构的制作方法，其特征在于，包括如下步骤：
步骤1、提供基板(1)，所述基板(1)包括驱动TFT区域与显示TFT区域，在所述基板(1)上沉积缓冲层(11)；
步骤2、在所述缓冲层(11)上沉积非晶硅层(12)，并对所述非晶硅层(12)进行图案化处理，使所述显示TFT区域的非晶硅层(12)的厚度大于所述驱动TFT区域的非晶硅层(12)的厚度；
步骤3、经过准分子激光退火前处理后，对所述非晶硅层(12)进行准分子激光退火处理，使所述非晶硅层(12)结晶，转变为多晶硅层(13)；
步骤4、对所述多晶硅层(13)进行图案化处理，得到位于所述驱动TFT区域的第一多晶硅段(14)、及位于所述显示TFT区域的第二多晶硅段(15)；
步骤5、在所述第一多晶硅段(14)、第二多晶硅段(15)及缓冲层(11)上沉积栅极绝缘层(16)；
步骤6、在所述栅极绝缘层(16)上沉积并图案化第一金属层，分别对应第一多晶硅段(14)、及第二多晶硅段(15)的上方形成第一栅极(17)、及第二栅极(18)；
步骤7、在所述栅极绝缘层(16)、第一栅极(17)、及第二栅极(18)上沉积层间绝缘层(19)，并在所述层间绝缘层(19)、及栅极绝缘层(16)上分别对应所述第一多晶硅段(14)、及第二多晶硅段(15)上方形成第一过孔(20)与第二过孔(20’)；
步骤8、在所述层间绝缘层(19)上沉积并图案化第二金属层，分别形成位于所述驱动TFT区域的第一源/漏极(21)、及位于所述显示TFT区域的第二源/漏极(22)，所述第一源/漏极(21)经由第一过孔(20)与所述第一多晶硅段(14)相接触，所述第二源/漏极(22)经由第二过孔(20’)与第二多晶硅段(15)相接触。
2.如权利要求1所述的低温多晶硅TFT基板结构的制作方法，其特征在于，所述第一多晶硅段(14)的厚度大于所述第二多晶硅段(15)的厚度；所述第一多晶硅段(14)中的晶格尺寸大于第二多晶硅段(15)中的晶格尺寸；所述第二多晶硅段(15)中的碎晶多于第一多晶硅段(14)中的碎晶。
3.如权利要求1所述的低温多晶硅TFT基板结构的制作方法，其特征在于，所述基板(1)为玻璃基板，所述缓冲层(11)的材料为氧化硅、氮化硅、或二者的组合。
4.如权利要求1所述的低温多晶硅TFT基板结构的制作方法，其特征在于，所述层间绝缘层(19)的材料为氧化硅、氮化硅、或二者的组合。
5.如权利要求1所述的低温多晶硅TFT基板结构的制作方法，其特征在于，所述驱动TFT区域的非晶硅层(12)与所述显示TFT区域的非晶硅层(12)的厚度差大于500A。
6.一种低温多晶硅TFT基板结构，其特征在于，包括驱动TFT区域与显示TFT区域，所述驱动TFT区域包括基板(1)、设于所述基板(1)上的缓冲层(11)、设于所述缓冲层(11)上的第一多晶硅段(14)、设于所述缓冲层(11)及第一多晶硅段(14)上的栅极绝缘层(16)、对应所述第一多晶硅段(14)上方设于所述栅极绝缘层(16)上的第一栅极(17)、设于所述栅极绝缘层(16)及第一栅极(17)上的层间绝缘层(19)、及设于所述层间绝缘层(19)上的第一源/漏极(21)；
所述显示TFT区域包括基板(1)、设于所述基板(1)上的缓冲层(11)、设于所述缓冲层(11)上的第二多晶硅段(15)、设于所述缓冲层(11)及第二多晶硅段(15)上的栅极绝缘层(16)、对应所述第二多晶硅段(15)上方设于所述栅极绝缘层(16)上的第二栅极(18)、设于所述栅极绝缘层(16)及第二栅极(18)上的层间绝缘层(19)、及设于所述层间绝缘层(19)上的第二源/漏极(22)；
其中，所述第二多晶硅段(15)的厚度大于所述第一多晶硅段(14)的厚度。
7.如权利要求6所述的低温多晶硅TFT基板结构，其特征在于，所述第一多晶硅段(14)中的晶格尺寸大于第二多晶硅段(15)中的晶格尺寸；所述第二多晶硅段(15)中的碎晶多于第一多晶硅段(14)中的碎晶。
8.如权利要求6所述的低温多晶硅TFT基板结构，其特征在于，所述基板(1)为玻璃基板，所述缓冲层(11)的材料为氧化硅、氮化硅、或二者的组合，所述层间绝缘层(19)的材料为氧化硅、氮化硅、或二者的组合。
9.如权利要求6所述的低温多晶硅TFT基板结构，其特征在于，所述驱动TFT区域的层间绝缘层(19)及栅极绝缘层(16)上对应所述第一多晶硅段(14)上方形成有第一过孔(20)，所述第一源/漏极(21)经由所述第一过孔(20)与所述第一多晶硅段(14)相接触；
所述显示TFT区域的层间绝缘层(19)及栅极绝缘层(16)上对应所述第二多晶硅段(15)上方形成有第二过孔(20’)，所述第二源/漏极(22)经由所述第二过孔(20’)与所述第二多晶硅段(15)相接触。
10.如权利要求6所述的低温多晶硅TFT基板结构，其特征在于，所述第二多晶硅段(15)与所述第一多晶硅段(14)的厚度差大于500A。
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