CN106249023A - A kind of micro-current sensing circuit - Google Patents

Abstract

The invention belongs to electronic circuit technology field, relate to a kind of micro-current sensing circuit.The broadband micro-current sensing circuit of the present invention is divided into front and back stages, and prime is the trans-impedance amplifier of low input impedance, realizes the main transimpedance gain of circuit under sufficiently wide bandwidth；Rear class is voltage gain stages, provides certain gain for circuit and increases drives ability.The present invention can realize the bandwidth of more than tens megahertzs and more than 10⁶The transimpedance gain of magnitude.

Description

A kind of micro-current sensing circuit

Technical field

The invention belongs to electronic circuit technology field, relate to a kind of micro-current sensing circuit.

Background technology

In high speed optoelectronic integrated circuit (OEIC), photodiode receives optical signal and produces faint current signal, Current signal is converted to voltage signal by trans-impedance amplifier.Prime micro-current sensing circuit is to the speed of whole system and noise-induced Can there is vital impact.Its core is by trans-impedance amplifier, the weak current that photocell produces to be converted into voltage to believe Number.The electric current produced due to photocell is smaller, it is desirable to prime current detection circuit has enough gains；And photocell is parasitic Electric capacity is big, under high-speed applications, it is desirable to circuit has enough bandwidth, and therefore current detection circuit needs tool in higher frequency band There is sufficiently small input impedance.Especially in special applications, light intensity is less, and photocell area is bigger, the feelings that parasitic capacitance is bigger Condition, circuit to be made has bigger output voltage swing and conversion speed, with greater need for high-gain, micro-current detecting electricity of low input impedance Road.

In traditional micro-current sensing circuit system, owing to photocell area is less, photocell parasitic capacitance is little.Turn simultaneously After changing, the voltage signal magnitude of output is the least, and therefore gain and input impedance to current detection circuit require little.Existing Micro-current sensing circuit cannot take into account high-gain and requirement at a high speed, it is impossible to is applicable to the application that photosurface is big, optical responsivity is low.

Summary of the invention

To be solved by this invention, it is simply that high-gain cannot to be realized with high for above-mentioned existing micro-current sensing circuit simultaneously The restriction of bandwidth, the problem that especially bandwidth is the widest in the case of photocell parasitic capacitance is big.Propose a kind of new broadband High-gain micro-current sensing circuit.

The technical scheme is that a kind of micro-current sensing circuit, including photodiode, prime trans-impedance amplifier, Rear class voltage amplifier and biasing circuit；Described prime trans-impedance amplifier is by the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 6th resistance R6, the 9th resistance RF1, the tenth resistance RF2, the 11st resistance RF3, the first electric capacity CF1, One NMOS tube M1, the second NMOS tube M2, the 3rd NMOS tube M3, the 4th NMOS tube M4, the 5th NMOS tube M5, the 6th NMOS tube M6 and PMOS MP0 is constituted；The grid of the first NMOS tube M1 connects the negative pole of photodiode, the plus earth of photodiode, and first The drain electrode of NMOS tube M1 is followed by power supply by the first resistance R1, the source ground of the first NMOS tube M1；The grid of the second NMOS tube M2 Pole connects the drain electrode of the first NMOS tube M1, and the drain electrode of the second NMOS tube M2 connects power supply, and the source electrode of the second NMOS tube M2 is by the second electricity Ground connection after resistance R2；The drain electrode of the 3rd NMOS tube M3 is followed by power supply by the 3rd resistance R3, and the grid of the 3rd NMOS tube M3 connects second The source electrode of NMOS tube M2, the source ground of the 3rd NMOS tube M3；The drain electrode of the 4th NMOS tube M4 connects power supply, the 4th NMOS tube M4 Grid connects the drain electrode of the 3rd NMOS tube M3, and the source electrode of the 4th NMOS tube M4 is by ground connection after the 4th resistance R4；The source of PMOS MP0 Pole connects power supply, and its grid connects the outfan of biasing circuit；The drain electrode of the 5th NMOS tube M5 connects the drain electrode of PMOS MP0, and the 5th The grid of NMOS tube M5 connects the source electrode of the 4th NMOS tube M4, the source ground of the 5th NMOS tube M5；The drain electrode of the 6th NMOS tube M6 Connecing power supply, the grid of the 6th NMOS tube M6 connects the drain electrode of PMOS MP0, and the source electrode of the 6th NMOS tube M6 is by after the 6th resistance R6 Ground connection；The grid of the 5th NMOS tube M5 is followed by the 6th NMOS tube M6 source electrode and the connection of the 6th resistance R6 by the 9th resistance RF1 Point；The grid of the first NMOS tube M1 pass sequentially through the tenth resistance RF2 and the 11st resistance RF3 be followed by the 6th NMOS tube M6 source electrode with The junction point of the 6th resistance R6；First electric capacity CF1 and the 11st resistance RF3 is in parallel；9th resistance RF1, the 6th NMOS tube M6 source Pole, the 6th resistance R6, the outfan that junction point is prime trans-impedance amplifier of the first electric capacity CF1 and the 11st resistance RF3；Described Rear class voltage amplifier is by the 7th resistance R7, the 8th resistance R8, the 3rd electric capacity CBP, the second electric capacity CF2 and operational amplifier structure Become；The outfan of the positive input termination prime trans-impedance amplifier of operational amplifier, operational amplifier negative input end passes sequentially through the Ground connection after seven resistance R7 and the 3rd electric capacity CBP, the outfan of operational amplifier is the outfan of rear class voltage amplifier；8th electricity One termination operational amplifier negative input end and the junction point of the 7th resistance R7 of resistance R8, another termination computing of the 8th resistance R8 is put The power end of big device；Second electric capacity CF2 and the 8th resistance R8 is in parallel.

Beneficial effects of the present invention is, the broadband micro-current sensing circuit of the present invention is divided into front and back stages, and prime is low defeated Enter the trans-impedance amplifier of impedance, under sufficiently wide bandwidth, realize the main transimpedance gain of circuit；Rear class is voltage gain stages, for Circuit provides certain gain and increases drives ability, it is possible to achieve the bandwidth of more than tens megahertzs with more than 10⁶Amount The transimpedance gain of level.

Accompanying drawing explanation

Fig. 1 is micro-current detection circuit framework proposed by the invention；

Fig. 2 is trans-impedance amplifier electrical block diagram proposed by the invention；

Fig. 3 is carried rear class voltage amplifier circuit structural representation by the present invention.

Detailed description of the invention

Below in conjunction with the accompanying drawings, technical scheme is described in detail:

For trans-impedance amplifier, as shown in Figure 2, it is contemplated that output signal all the time more than quiescent point,

In order to increase the output signal amplitude of oscillation, quiescent point is arranged low as far as possible.In order to increase the matching of circuit, Being formed by three parameter identical common source common drain stage connection inside trans-impedance amplifier, feedback makes three common sources leak static point altogether Keep identical, i.e. the drain electrode of M1, grid, source voltage are equal with the drain electrode of M3 and M5, grid, source voltage respectively, M1, M3, M5 Leakage current identical；The drain electrode of M2, grid, source voltage are equal respectively at the drain electrode of M4 and M6, grid, source voltage, M2, M4, The leakage current of M6 is identical.Therefore, the present invention, the most only in the way of analyzing the common source common drain stage that M1 and M2 is constituted, illustrates circuit static Operating point.By V_gs1=V_gs3, have the M1 tube current to beM2 pipe isWill WithSubstitute in above-mentioned two formulas, available

$\left\{\begin{array}{c}{I}_{d1}=\frac{1}{R_1}(V_{DD}-\sqrt{\frac{2I_{d1}}{{\mathrm{\β}}_1}}-V_{th}-\sqrt{\frac{2I_{d2}}{{\mathrm{\β}}_2}}-V_{th})\\ I_{d2}=\frac{1}{R_2}(\sqrt{\frac{2I_{d1}}{{\mathrm{\β}}_1}}+V_{th})\end{array}\right.$

By the two expression formula it can be seen that can ensure that static work by the resistance and transistor parameter arranging R1 and R2 Making point stable, M1 pipe and M2 pipe are operated in saturation region.Place of the present invention sets the static work of each transistor by resistance R1～R6 Make a little, the current source or current mirror that circuit field is general can also be used equally as bias current, determine integrated circuit work Make a little.

Owing to circuit transimpedance gain is big especially, there is the relation conditioned each other in gain and bandwidth so that cannot be by defeated Entering outfan one big resistance of bridging and be directly realized by big transimpedance gain, therefore the circuit of present invention design is divided into two-stage, and first Level is trans-impedance amplifier, and the second level is voltage amplifier.Prime trans-impedance amplifier transimpedance gain is as shown in Figure 2:

A_R1=R_F2+R_F3

Rear class voltage gain shown in Fig. 3 is:

A_R2=1+R₈/R₇

Total transimpedance gain is:

A_R=A_R1·A_R2=(R_F2+R_F3)·(1+R₈/R₇)

Bandwidth and stability analysis

The input stage of current detection circuit connects photocell, and usual photocell exists parasitic capacitance, causes photoelectric switching circuit High-gain and high bandwidth cannot be realized simultaneously.This problem is even more serious in the case of large photosensistive surface photocell is applied.For For the application that high-gain requires, the resistance of the input of first order trans-impedance amplifier and outlet chamber bridging needs to use the biggest resistance Value, the node IIN that therefore photocell is connected, i.e. the grid of M1 is the dominant pole of first order circuit feedback loop, its frequency by The impedance of photocell parasitic capacitance C_pd and the bridging of trans-impedance amplifier input/output terminal determines.Then trans-impedance amplifier loop gain For:

LG=g_m1g_m3(R₁//r_M1)(R₃//r_M3)g_m4R_F1

Wherein gmx and rMx is respectively numbered the small-signal transconductance of transistor and the output resistance of MX.Dominant pole is:

${\mathrm{\ω}}_{p1}=\frac{1}{2\mathrm{\π}(R_{F2}+R_{F3})\·C_{pd}}$

Assume trans-impedance amplifier feedback control loop only exists one, input limit, then according to feedback principle, feedback The unit gain of loop and the closed loop-3db bandwidth of trans-impedance amplifier depend on photocell parasitic capacitance C_pd and input node IIN Equivalent input impedance Z_IIN determines.

So input impedance is:

$Z_{IIN}=\frac{R_{F2}+R_{F3}}{1+LG}$

Closed-loop bandwidth is:

${\mathrm{\ω}}_{-3dB}=\frac{1}{2\mathrm{\π}\·Z_{IIN}\·C_{pd}}$

By above-mentioned analysis, the gain of trans-impedance amplifier inputs and the resistance RF=RF2+ of outlet chamber with being connected across The resistance of RF3 is correlated with, and the bandwidth of amplifier is in the case of photocell parasitic capacitance determines, just becomes with gain around feedback Ratio, is inversely proportional to feedback resistance RF.Therefore, there is restricting relation between the gain of first order trans-impedance amplifier and bandwidth.And this Restricting relation can overcome by increasing amplifier feed-back loop gain.But the requirement of high-gain would generally bring the lowest Frequently the impact of limit, thus the stability under the stability to feedback control loop, especially high frequency proposes challenge.

The present invention all exists at outputs at different levels limit.Common drain stage is less due to output impedance, the pole frequency of its correspondence Higher, the impact on feedback control loop can be ignored.And often one-level common-source stage is for the consideration of gain requirement, all can introduce loop Produce the limit of impact, thus limit amplifier and realize broader bandwidth.The present invention is logical between the grid and the source electrode of M6 of M5 Cross resistance RF1, build additional feedback loop, thus raise the pole location of amplifier in feedback control loop further, widen across resistance Amplifier overall feedback loop bandwidth.Simultaneously as introduce internal feedback resistance RF1, the impedance at output node OUT0 is entered One step reduces.The limit making OUT0 is pushed to higher frequency position by this, also increases the driving force of trans-impedance amplifier simultaneously, The impact after reducing rear class cascade, prime trans-impedance amplifier brought.

In traditional trans-impedance amplifier, compensate electric capacity and be connected across between input and output, although loop stability can be improved, extension Loop bandwidth, but the rise time of output signal cannot be reduced, because output signal building up transient contains a large amount of high-frequency signal, Under this radio-frequency component, circuit equivalent will reduce across resistance, i.e. transimpedance gain also reduces.In the trans-impedance amplifier that the present invention is previously mentioned, It is divided into RF2 and RF3 two parts across resistance, compensates electric capacity CF1 with RF3 in parallel.Total transimpedance gain is:

$A_{R1}=R_{F2}+\frac{R_{F3}}{1+{\mathrm{sR}}_{F3}{C}_{F1}}$

By regulating the value of RF2, RF3 and CF1, micro-current signal input IIN can be made to trans-impedance amplifier outfan There is a high-speed channel in OUT0, simultaneously under signal rising edge radio-frequency component, it is ensured that transimpedance gain AR1 is sufficiently large, therefore can Accelerate the output signal rate of climb.

Claims (1)

1. a micro-current sensing circuit, including photodiode, prime trans-impedance amplifier, rear class voltage amplifier and biased electrical Road；Described prime trans-impedance amplifier is by the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 6th resistance R6, the 9th resistance RF1, the tenth resistance RF2, the 11st resistance RF3, the first electric capacity CF1, the first NMOS tube M1, the second NMOS tube M2, the 3rd NMOS tube M3, the 4th NMOS tube M4, the 5th NMOS tube M5, the 6th NMOS tube M6 and PMOS MP0 are constituted；First The grid of NMOS tube M1 connects the negative pole of photodiode, the plus earth of photodiode, and the drain electrode of the first NMOS tube M1 is passed through First resistance R1 is followed by power supply, the source ground of the first NMOS tube M1；The grid of the second NMOS tube M2 connects the first NMOS tube M1 Drain electrode, the drain electrode of the second NMOS tube M2 connects power supply, and the source electrode of the second NMOS tube M2 is by ground connection after the second resistance R2；3rd NMOS The drain electrode of pipe M3 is followed by power supply by the 3rd resistance R3, and the grid of the 3rd NMOS tube M3 connects the source electrode of the second NMOS tube M2, and the 3rd The source ground of NMOS tube M3；The drain electrode of the 4th NMOS tube M4 connects power supply, and the grid of the 4th NMOS tube M4 connects the 3rd NMOS tube M3 Drain electrode, the source electrode of the 4th NMOS tube M4 is by ground connection after the 4th resistance R4；The source electrode of PMOS MP0 connects power supply, and its grid connects The outfan of biasing circuit；The drain electrode of the 5th NMOS tube M5 connects the drain electrode of PMOS MP0, and the grid of the 5th NMOS tube M5 connects the 4th The source electrode of NMOS tube M4, the source ground of the 5th NMOS tube M5；The drain electrode of the 6th NMOS tube M6 connects power supply, the 6th NMOS tube M6 Grid connects the drain electrode of PMOS MP0, and the source electrode of the 6th NMOS tube M6 is by ground connection after the 6th resistance R6；The grid of the 5th NMOS tube M5 Pole is followed by the 6th NMOS tube M6 source electrode and the junction point of the 6th resistance R6 by the 9th resistance RF1；The grid of the first NMOS tube M1 Pass sequentially through the tenth resistance RF2 and the 11st resistance RF3 and be followed by the 6th NMOS tube M6 source electrode and the junction point of the 6th resistance R6；The One electric capacity CF1 and the 11st resistance RF3 is in parallel；9th resistance RF1, the 6th NMOS tube M6 source electrode, the 6th resistance R6, the first electric capacity The outfan that junction point is prime trans-impedance amplifier of CF1 and the 11st resistance RF3；Described rear class voltage amplifier is by the 7th electricity Resistance R7, the 8th resistance R8, the 3rd electric capacity CBP, the second electric capacity CF2 and operational amplifier are constituted；The positive input terminal of operational amplifier Connect the outfan of prime trans-impedance amplifier, after operational amplifier negative input end passes sequentially through the 7th resistance R7 and the 3rd electric capacity CBP Ground connection, the outfan of operational amplifier is the outfan of rear class voltage amplifier；The one termination operational amplifier of the 8th resistance R8 Negative input end and the junction point of the 7th resistance R7, the power end of another termination operational amplifier of the 8th resistance R8；Second electric capacity CF2 and the 8th resistance R8 is in parallel.