CN106206697A - 绝缘体上硅（soi）衬底上的横向双极结型晶体管（bjt） - Google Patents

绝缘体上硅（soi）衬底上的横向双极结型晶体管（bjt） Download PDF

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CN106206697A
CN106206697A CN201511016820.0A CN201511016820A CN106206697A CN 106206697 A CN106206697 A CN 106206697A CN 201511016820 A CN201511016820 A CN 201511016820A CN 106206697 A CN106206697 A CN 106206697A
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柳青
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Abstract

一种双极型晶体管由包括叠置于绝缘层上的半导体层的衬底支撑。晶体管基极由在该半导体层中的以第一掺杂浓度掺杂有第一导电类型掺杂物的基区形成。晶体管发射极和集电极由掺杂有第二导电类型掺杂物并且位于邻近于该基区的相对两侧的区形成。非本征基极包括与该基区的顶表面相接触的外延半导体层。该外延半导体层以大于该第一掺杂浓度的第二掺杂浓度掺杂有该第一导电类型掺杂物。在该非本征基极的每一侧上的侧壁间隔物包括在该外延半导体层的一侧和该基区的顶表面上的氧化物层。

Description

绝缘体上硅(SOI)衬底上的横向双极结型晶体管(BJT)
技术领域
本发明涉及集成电路，并且具体地涉及横向双极结型晶体管(BJT)类型的半导体晶体管器件。
背景技术
现在参照图1，图1示出了常规的横向双极结型晶体管(BJT)10器件的总体配置。绝缘体上硅衬底12支撑该晶体管。衬底12包括衬底层14、掩埋氧化物(BOX)层16和半导体层18。用于晶体管器件的有源区域20由穿透层18的周边环绕的浅沟槽隔离22界定。在有源区域20之内，层18被划分已经掺杂有第一导电类型掺杂物的基区30、已经掺杂有第二导电类型掺杂物的发射区32(在一侧上邻近于基区30)以及同样已经掺杂有第二导电类型掺杂物的集电区34(在与发射区32相对的侧上邻近于基区30)。当BJT 10器件是npn型时，第一导电类型掺杂物是p型的并且第二导电类型是n型的。反之，当BJT器件是pnp型时，第一导电类型掺杂物是n型的并且第二导电类型是p型的。在基区30上方提供非本征基区36。此非本征基区36通常包括多晶硅材料并且重掺杂有与在层18中所提供的基区30相同的导电类型掺杂物。由绝缘材料(如氮化硅(SiN))所制成的多个侧壁间隔物38被提供于非本征基区36的两侧上并且用于保护免受发射极(E)或集电极(C)对基极(B)的短路。
如图1中所示出的，BJT 10器件有几个顾虑。一个顾虑是难以对用于非本征基区36的多晶硅材料进行重掺杂。在没有不利地影响基区30内的掺杂物的情况下，难以实现在非本征基区36内的高掺杂浓度。另一个顾虑是在层18上的叠置于在发射区/集电区与基区30之间的界面上的那些氮化硅侧壁间隔物38的底部处存在过高的界面态密度(Dit)情况。
相应地，本领域中需要一种在SOI衬底上实现的横向BJT器件的改进配置。
发明内容
在一个实施例中，一种双极型晶体管器件包括：衬底，该衬底包括叠置于绝缘层上的半导体层；晶体管基极，该晶体管基极包括在该半导体层中的以第一掺杂浓度掺杂有第一导电类型掺杂物的基区；晶体管发射极，该晶体管发射极包括掺杂有第二导电类型掺杂物并且位于邻近于该基区的一侧的发射区；晶体管集电极，该晶体管集电极包括掺杂有该第二导电类型掺杂物并且位于邻近于该基区的相反侧的集电区；以及非本征基极，该非本征基极包括与该基区的顶表面相接触的外延半导体层，所述外延半导体层以大于该第一掺杂浓度的第二掺杂浓度掺杂有该第一导电类型掺杂物。
在一个实施例中，一种方法包括：从叠置于绝缘层上的半导体层的顶表面外延地生长外延半导体层，所述半导体层以第一掺杂浓度掺杂有第一导电类型掺杂物，并且所述外延半导体层以大于该第一掺杂浓度的第二掺杂浓度掺杂有该第一导电类型掺杂物；对该外延半导体层进行图案化以限定与晶体管基极相接触的非本征基极，该晶体管基极包括该半导体层的基区；形成晶体管发射极，该晶体管发射极包括掺杂有第二导电类型掺杂物并且位于邻近于该基区的一侧的发射区；以及形成晶体管集电极，该晶体管集电极包括掺杂有该第二导电类型掺杂物并且位于邻近于该基区的相反侧的集电区。
附图说明
为了更好地理解实施例，现在将仅以示例方式参考附图，在附图中：
图1展示了现有技术横向双极结型晶体管(BJT)器件的配置；以及
图2至图13展示了形成改进的横向BJT器件的工艺步骤。
具体实施方式
现在参照图2至图13，图2至图13展示了形成改进的横向BJT器件的工艺步骤。将理解的是，这些附图不一定示出按比例绘制的特征。
图2示出了包括堆叠的半导体衬底114、绝缘层116和硅半导体层118的绝缘体上硅(SOI)半导体衬底112。硅半导体层118根据应用可以是掺杂的，或者替代性地可以是未掺杂的(在这种情况下，SOI衬底112是“完全耗尽”型的)。例如，半导体层118可以具有6nm-12nm的厚度。绝缘层116在本领域中通常被称为掩埋氧化物(BOX)层并且具有10nm-30nm的厚度。
在替代性实施例中，半导体层118可以由不同的半导体材料(如硅锗(SiGe))形成。
然后，使用本领域中已知的外延生长或沉积工艺来增加半导体层118’的厚度。例如，层118’可以具有30nm-100nm的厚度并且由硅(或者替代性地，硅锗)制成。将第一导电类型的掺杂物注入到层118’中。使用退火来活化所注入的掺杂物。替代性地，在外延期间可以使用原位掺杂工艺。例如，掺杂物可以具有5×1018至1×1019原子/cm3的浓度。在图3中示出了结果。
接下来，使用本领域中已知的外延生长工艺来在半导体层118’上生长外延硅层120。例如，该层120可以具有大约5nm(例如，在3nm-10nm的范围内)的厚度。层120同样掺杂有第一导电类型掺杂物，但是层120中的掺杂浓度比层118’中的掺杂浓度更重(更大)。例如，层120可以具有2×1020至1×1021原子/cm3的重掺杂浓度。层120优选是原位掺杂的。在图4中示出了结果。层120相对较薄(如在3nm-10nm的范围内)是有利的，因为较薄的层在后续加工步骤期间可以得到更准确地蚀刻。
再次，在替代性实施例中，层120可以由不同的半导体材料(如硅锗(SiGe))形成。
然后，在层120的顶部提供焊盘氧化物层130。例如，焊盘氧化物层130可以具有3nm-5nm的厚度并且被生长(例如，使用热氧化)或被沉积(例如，使用化学气相沉积或原子层沉积)。然后，使用化学气相沉积工艺在焊盘氧化物层130上沉积多晶硅层132。此多晶硅层132可以具有40nm-80nm的厚度，并且可以是或者可以不是掺杂的。然后，使用化学气相沉积工艺以20nm-40nm的厚度在多晶硅层132上沉积硬掩模层134(例如，氮化硅的)。在图5中示出了结果。
然后，使用本领域中已知的光刻工艺来从重掺杂的硅层120、焊盘氧化物层130、多晶硅层132和硬掩模层134限定基极叠层140。基极叠层140包括从重掺杂的硅层120所形成的(薄)基极接触142、从焊盘氧化物层130所形成的牺牲焊盘144、从多晶硅层132所形成的牺牲多晶硅接触146以及从硬掩模层134所形成的牺牲帽盖148。在图6中示出了结果。用于限定基极叠层140的蚀刻应该优选地停止于半导体层118’的顶表面。
然后，在基极叠层140上形成多个侧壁间隔物150。这些侧壁间隔物150包括使用原子层沉积以大约3nm(例如，在2nm-5nm之间)的厚度沉积的二氧化硅(SiO2)层152、接着是使用原子层沉积以6nm-12nm的厚度沉积的氮化硅(SiN)层154或其他低k电介质材料(如SiBCN、SiOCN等)。重要的是，不仅在基极叠层140的两侧上而且还在半导体层118’的顶表面上提供层152。进行第一次蚀刻以优先从多个水平表面上去除层154，接着是去除层152的未被之前所蚀刻的层154覆盖的那些部分的第二次蚀刻。在图7中示出了结果。
接下来，执行掺杂物注入工艺以便将带有多个侧壁间隔物150的基极叠层140用作掩模将第二导电类型的掺杂物注入到层118’中。使用退火对所注入的掺杂物进行活化，以便在位于带有这些侧壁间隔物150的基极叠层140之下的基区162(掺杂有第一导电类型掺杂物)的一侧上的层118’内形成发射区160，并且进一步在基区162的相反侧上形成集电区164。例如，掺杂物可以具有1×1020至5×1020原子/cm3的浓度。在图8A中示出了结果。注意，对掺杂物的活化导致部分地在这些侧壁间隔物之下的发射区160和集电区164的延伸。
在替代性实现方式中，将带有多个侧壁间隔物150的基极叠层140用作掩模来进行蚀刻以使在带有侧壁间隔物150的基极叠层140的每一侧上的区156中的半导体层118’凹陷，以便留下下面的基区162(掺杂有第一导电类型掺杂物)。例如，蚀刻可以包括干法蚀刻工艺。将要注意的是，蚀刻可以被配置为用于从这些侧壁间隔物150下方去除半导体层118’的材料，从而在基区162的每一侧上形成底切(undercut)158。在图8B中示出了结果。将要注意的是，凹陷不一定去除与区156相关联的全部半导体层118’。然而，在一个实施例中，可以在区156中去除向下到氧化物层116的所有半导体层118’。
进一步关于此替代性实现方式，使用本领域中已知的外延生长工艺来在这些区156中从半导体层118’的那些剩余部分生长外延硅材料166。以第二导电类型掺杂物来掺杂外延生长的材料166。例如，该材料可以具有1×1020至5×1020原子/cm3的掺杂浓度。该材料优选是原位掺杂的。在图8C中示出了结果，其中，掺杂的外延材料166在基区162的一侧上形成发射区160并且在基区162的相反侧上形成集电区164。虽然，材料166的外延生长被展示为终止于与半导体层118’的基区部分相同的高度，将理解的是，如果期望的话则可以继续进行生长以提供具有延伸至接触这些侧壁间隔物的各侧的高度的升高的发射区和集电区。
当正在形成npn型BJT器件时，第一导电类型掺杂物是p型的并且第二导电类型是n型的。反之，当正在形成pnp型BJT器件时，第一导电类型掺杂物是n型的并且第二导电类型是p型的。
在对制造工艺的以下讨论中，附图示出了如在图8A中的实现方式，但是将理解的是，本描述可以等效地应用于在图8C中所示出的实现方式。
对可流动绝缘材料(如可流动的二氧化硅)的层170进行沉积，以便覆盖衬底、基极叠层140和这些侧壁间隔物150。执行化学机械抛光操作以便对基极叠层140的牺牲帽盖148处的层170进行平坦化。在图9中示出了结果。
然后，执行第一次蚀刻(例如，干法蚀刻)，以便去除牺牲帽盖148。然后，执行第二次蚀刻(例如，湿法蚀刻)，以便去除牺牲多晶硅接触146。然后，执行第三次蚀刻(例如，湿法蚀刻)，以便去除牺牲焊盘144以及层152的在重掺杂的基极接触142以上的多个部分。在图10中示出了结果，以开出基极接触孔180。蚀刻化学性质被具体选择为选择性的，以便最小化或消除对层154、层170和重掺杂基极接触142的腐蚀。
将要注意的是，在进行蚀刻以去除牺牲焊盘144时，还将发生对层170的部分蚀刻。这并不重要，并且后续的平坦化可以解决厚度的任何不均匀性。
然后，在孔180的这些侧壁和底部上沉积金属内衬190。例如，金属内衬可以包括使用等离子体气相沉积工艺以3nm-10nm的厚度所沉积的钛(Ti)。金属内衬可以替代性地包括使用等离子体气相沉积工艺以3nm-10nm的厚度所沉积的镍和铂的合金(NiPt)。然后，沉积金属填充物192以填充孔180。例如，金属填充物可以包括使用等离子体气相沉积工艺所沉积的钨(W)。执行化学机械抛光操作以去除内衬190和填充物192的存在于层170的顶部上的任何部分。在图11中示出了结果。
然后，可以执行退火工艺，以便将与在孔180的底部处的金属内衬190相接触的重掺杂基极接触142的至少一部分转换为金属内衬194。在图12中示出了结果。
对层170进行延伸以便形成预金属电介质(PMD)层172。执行化学机械抛光操作以对层172进行平坦化。然后，形成多个接触开口174以延伸穿过层172到达发射区160、金属填充物192(接触基区162)和集电区164。然后，以金属材料176(例如，钨)来填充这些接触开口，以产生对由发射区160、基区162和集电区164形成的横向BJT器件178的发射极端子、基极端子和集电极端子的电连接。将理解的是，这些接触开口174可以内衬有金属材料(如NiPt)，如果期望的话，该金属材料支持在与发射区160和集电区164的界面处形成多个硅化物区(未明确地示出)
图13进一步示出了存在多个浅沟槽隔离结构22，这些浅沟槽隔离针对横向BJT器件178周边地界定有源区20。可以根据本领域技术人员所熟知的工艺在任何合适的时间形成这些浅沟槽隔离结构22。例如，可以在提供层118’的制造工艺中的时刻上或在该时刻左右形成这些结构22。
如以上所描述以及图13中所示出的那样产生的BJT器件178解决了关于图1的现有技术器件的所提及的顾虑。首先，通过对原位掺杂的外延硅层120进行图案化以形成重掺杂的基极接触142来形成非本征基极的重掺杂部分。这避免了与如对本领域中的重掺杂多晶硅的努力相关的问题。第二，在这些侧壁间隔物150中供应二氧化硅层152提供了在层118’上在发射区/集电区与基区162之间的界面处的这些侧壁间隔物150的底部处的较低界面态密度(Dit)。
较薄的重掺杂基极接触142是有利的，因为其用于最小化对基极掺杂的影响并且进一步提高驱动电流。这些侧壁中SiO2层的存在减小了Dit，并且可以进一步引起更高的电流容量和更低的器件泄漏。
进一步的优势在于，用于形成横向BJT器件的工艺与本领域技术人员已知的针对使用用于CMOS集成电路制造(例如，与MOSFET器件或鳍式FET器件的制造相关，其中，正在对在相同的一组工艺步骤中的CMOS器件和BJT器件两者均进行替换金属栅极技术)的替换金属栅极(RMG)技术的工业工艺完全兼容。这使得能够将横向BJT器件和MOSFET/鳍式FET CMOS器件共同集成在公共衬底上(例如，其中，这些BJT器件用于输入/输出电路中，而CMOS器件用于其他/核心电路中)。随着CMOS工艺几何形状继续缩减，在此所披露的用于横向BJT器件制造的技术可以进一步调整到更小的几何形状节点。
在此所披露的用于使发射区和集电区凹陷接着进行外延再生长(通过原位掺杂)的实施例可以有利地用于形成横向BJT器件，这些横向BJT器件在发射区/集电区中展现了更高的有源掺杂浓度并且向发射区/集电区提供了锗含量。产生了对BJT器件效率的改进。
已经通过对本发明的示例性实施例的完整且信息性的描述的示例性且非限制性示例提供了之前的描述。然而，对于相关领域的技术人员而言，鉴于前面的描述，当结合附图和所附权利要求书来阅读本说明书时，各种修改和适配会变得明显。然而，对本发明教导的所有这样和类似的修改将仍然落入如所附权利要求书所确定的本发明的范围之内。

Claims (25)

1.一种双极型晶体管器件，包括：
衬底，所述衬底包括叠置于绝缘层上的半导体层；
晶体管基极，所述晶体管基极包括在所述半导体层中的以第一掺杂浓度掺杂有第一导电类型掺杂物的基区；
晶体管发射极，所述晶体管发射极包括掺杂有第二导电类型掺杂物并且位于邻近于所述基区的一侧的发射区；
晶体管集电极，所述晶体管集电极包括掺杂有所述第二导电类型掺杂物并且位于邻近于所述基区的相反侧的集电区；以及
非本征基极，所述非本征基极包括与所述基区的顶表面相接触的外延半导体层，所述外延半导体层以大于所述第一掺杂浓度的第二掺杂浓度掺杂有所述第一导电类型掺杂物。
2.如权利要求1所述的器件，其中，所述半导体层包括硅材料。
3.如权利要求1所述的器件，其中，所述发射区和所述集电区是由所述半导体层形成的。
4.如权利要求1所述的器件，其中，所述发射区和所述集电区是从所述半导体层生长的外延区。
5.如权利要求1所述的器件，其中，所述非本征基极的所述外延半导体层具有在3nm与10nm之间的厚度。
6.如权利要求5所述的器件，其中，所述非本征基极进一步包括所述外延半导体层的硅化物部分。
7.如权利要求6所述的器件，其中，所述非本征基极进一步包括与所述硅化物部分相接触的金属材料。
8.如权利要求5所述的器件，其中，所述非本征基极进一步包括与所述外延半导体层相接触的金属材料。
9.如权利要求1所述的器件，进一步包括在所述非本征基极的每一侧上的侧壁间隔物，所述侧壁间隔物包括与所述外延半导体层的一侧和所述基区的所述顶表面相接触的氧化物层。
10.如权利要求9所述的器件，其中，所述侧壁间隔物进一步包括与在所述非本征基极的每一侧上的所述氧化物层相接触的氮化物间隔物。
11.一种方法，包括：
从叠置于绝缘层上的半导体层的顶表面外延地生长外延半导体层，所述半导体层以第一掺杂浓度掺杂有第一导电类型掺杂物，并且所述外延半导体层以大于所述第一掺杂浓度的第二掺杂浓度掺杂有所述第一导电类型掺杂物；
对所述外延半导体层进行图案化以限定与晶体管基极相接触的非本征基极，所述晶体管基极包括所述半导体层的基区；
形成晶体管发射极，所述晶体管发射极包括掺杂有第二导电类型掺杂物并且位于邻近于所述基区的一侧的发射区；以及
形成晶体管集电极，所述晶体管集电极包括掺杂有所述第二导电类型掺杂物并且位于邻近于所述基区的相反侧的集电区。
12.如权利要求11所述的方法，进一步包括：
在所述非本征基极的每一侧上形成侧壁间隔物；以及
在形成所述发射区和所述集电区时将所述非本征基极和所述侧壁间隔物用作掩模。
13.如权利要求12所述的方法，其中，形成所述发射区和所述集电区包括向所述半导体层中注入所述第二导电类型的掺杂物。
14.如权利要求12所述的方法，其中，形成所述发射区和所述集电区包括：
去除所述半导体层在所述非本征基极和所述侧壁间隔物的每一侧上的至少一部分以产生多个凹陷的半导体区；以及
从所述凹陷的半导体区外延地生长所述发射区和所述集电区。
15.如权利要求12所述的方法，其中，形成多个侧壁间隔物包括在所述基区沉积与所述外延半导体层的一侧和所述半导体层的所述顶表面相接触的氧化物层。
16.如权利要求15所述的方法，其中，形成多个侧壁间隔物进一步包括形成与在所述非本征基极的每一侧上的所述氧化物层相接触的氮化物间隔物。
17.如权利要求11所述的方法，其中，所述非本征基极的所述外延半导体层具有在3nm与10nm之间的厚度。
18.如权利要求17所述的方法，进一步包括对所述外延半导体层的一部分进行硅化。
19.如权利要求18所述的方法，进一步包括形成所述非本征基极的与所述硅化的部分相接触的金属部分。
20.如权利要求17所述的方法，进一步包括形成所述非本征基极的与所述外延半导体层相接触的金属部分。
21.如权利要求11所述的方法，进一步包括：
在由所述图案化的外延半导体层制成的所述非本征基极之上形成多晶硅非本征基区；
在所述非本征基极和所述多晶硅非本征基区的每一侧上形成侧壁间隔物；以及
在形成所述发射区和所述集电区时将所述非本征基极、所述多晶硅非本征基区和所述侧壁间隔物用作掩模。
22.如权利要求21所述的方法，其中，形成所述发射区和所述集电区包括向所述半导体层中注入所述第二导电类型的掺杂物。
23.如权利要求21所述的方法，其中，形成所述发射区和所述集电区包括：
去除所述半导体层在所述非本征基极和所述侧壁间隔物的每一侧上的至少一部分以产生多个凹陷的半导体区；以及
从所述凹陷的半导体区外延地生长所述发射区和所述集电区。
24.如权利要求21所述的方法，进一步包括去除所述多晶硅非本征基区以及以替换金属栅极替换所述去除的多晶硅非本征基区。
25.如权利要求24所述的方法，进一步包括形成多个CMOS结构，并且其中，所述用于替换的工艺与针对所述CMOS结构所执行的替换金属栅极工艺相兼容。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111415977A (zh) * 2020-02-28 2020-07-14 深圳第三代半导体研究院 一种氮化水平异质p-n结结构器件及其制备方法
WO2023005819A1 (zh) * 2021-07-28 2023-02-02 无锡华润上华科技有限公司 超β晶体三极管及其制作方法
US11916109B2 (en) 2022-03-08 2024-02-27 Globalfoundries U.S. Inc. Bipolar transistor structures with base having varying horizontal width and methods to form same

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9461139B1 (en) * 2015-05-27 2016-10-04 Stmicroelectronics, Inc. Lateral bipolar junction transistor (BJT) on a silicon-on-insulator (SOI) substrate
US9673307B1 (en) * 2016-04-13 2017-06-06 International Business Machines Corporation Lateral bipolar junction transistor with abrupt junction and compound buried oxide
US9947778B2 (en) 2016-07-15 2018-04-17 International Business Machines Corporation Lateral bipolar junction transistor with controlled junction
US9852938B1 (en) * 2016-08-08 2017-12-26 International Business Machines Corporation Passivated germanium-on-insulator lateral bipolar transistors
US10998420B2 (en) 2018-04-04 2021-05-04 International Business Machines Corporation Direct growth of lateral III-V bipolar transistor on silicon substrate
US11133397B2 (en) 2019-06-04 2021-09-28 Globalfoundries U.S. Inc. Method for forming lateral heterojunction bipolar devices and the resulting devices
US11843034B2 (en) 2021-08-25 2023-12-12 Globalfoundries U.S. Inc. Lateral bipolar transistor
US11810969B2 (en) 2021-08-26 2023-11-07 Globalfoundries U.S. Inc. Lateral bipolar transistor
US11721722B2 (en) 2021-08-27 2023-08-08 Globalfoundries U.S. Inc. Bipolar junction transistors including a stress liner
US11837460B2 (en) 2021-09-03 2023-12-05 Globalfoundries U.S. Inc. Lateral bipolar transistor
US11848374B2 (en) 2021-09-10 2023-12-19 Globalfoundries U.S. Inc. Bipolar junction transistors including a portion of a base layer inside a cavity in a dielectric layer
US11894450B2 (en) 2021-11-18 2024-02-06 Globalfoundries U.S. Inc. Lateral bipolar transistor with emitter and collector regions including portions within In-insulator layer cavities and method
US11961901B2 (en) 2021-12-08 2024-04-16 Globalfoundries U.S. Inc. Bipolar transistor structure with base protruding from emitter/collector and methods to form same
US11855197B2 (en) 2022-01-20 2023-12-26 Globalfoundries U.S. Inc. Vertical bipolar transistors
US11881523B2 (en) 2022-05-10 2024-01-23 Globalfoundries U.S. Inc. Heterojunction bipolar transistors
US11869958B2 (en) 2022-05-16 2024-01-09 Globalfoundries U.S. Inc. Heterojunction bipolar transistors

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120139009A1 (en) * 2010-12-02 2012-06-07 International Business Machine Corporation SOI SiGe-Base Lateral Bipolar Junction Transistor
US20130260526A1 (en) * 2012-03-29 2013-10-03 International Business Machines Corporation Soi lateral bipolar junction transistor having a wide band gap emitter contact
CN205452291U (zh) * 2015-05-27 2016-08-10 意法半导体公司 双极型晶体管器件

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5298786A (en) 1990-12-06 1994-03-29 International Business Machines Corp. SOI lateral bipolar transistor with edge-strapped base contact and method of fabricating same
US20060060941A1 (en) 2004-08-27 2006-03-23 Sun I-Shan M Polysilicon sidewall spacer lateral bipolar transistor on SOI
US8531001B2 (en) * 2011-06-12 2013-09-10 International Business Machines Corporation Complementary bipolar inverter
US8558282B1 (en) * 2012-09-08 2013-10-15 International Business Machines Corporation Germanium lateral bipolar junction transistor
US20150214345A1 (en) * 2014-01-27 2015-07-30 Globalfoundries Inc. Dopant diffusion barrier to form isolated source/drains in a semiconductor device
US9059016B1 (en) * 2014-02-14 2015-06-16 International Business Machines Corporation Lateral heterojunction bipolar transistors
US9437718B1 (en) * 2015-05-12 2016-09-06 International Business Machines Corporation Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120139009A1 (en) * 2010-12-02 2012-06-07 International Business Machine Corporation SOI SiGe-Base Lateral Bipolar Junction Transistor
US20130260526A1 (en) * 2012-03-29 2013-10-03 International Business Machines Corporation Soi lateral bipolar junction transistor having a wide band gap emitter contact
CN205452291U (zh) * 2015-05-27 2016-08-10 意法半导体公司 双极型晶体管器件

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111415977A (zh) * 2020-02-28 2020-07-14 深圳第三代半导体研究院 一种氮化水平异质p-n结结构器件及其制备方法
CN111415977B (zh) * 2020-02-28 2022-02-15 深圳第三代半导体研究院 一种氮化水平异质p-n结结构器件及其制备方法
WO2023005819A1 (zh) * 2021-07-28 2023-02-02 无锡华润上华科技有限公司 超β晶体三极管及其制作方法
US11916109B2 (en) 2022-03-08 2024-02-27 Globalfoundries U.S. Inc. Bipolar transistor structures with base having varying horizontal width and methods to form same

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