CN105984219B - 电子装置以及电子装置的制造方法 - Google Patents

电子装置以及电子装置的制造方法 Download PDF

Info

Publication number
CN105984219B
CN105984219B CN201610145036.8A CN201610145036A CN105984219B CN 105984219 B CN105984219 B CN 105984219B CN 201610145036 A CN201610145036 A CN 201610145036A CN 105984219 B CN105984219 B CN 105984219B
Authority
CN
China
Prior art keywords
distribution
electronic installation
substrate
driving
basalis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610145036.8A
Other languages
English (en)
Other versions
CN105984219A (zh
Inventor
松尾刚秀
吉池政史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN105984219A publication Critical patent/CN105984219A/zh
Application granted granted Critical
Publication of CN105984219B publication Critical patent/CN105984219B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/015—Ink jet characterised by the jet generation process
    • B41J2/04—Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045—Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501—Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04541—Specific driving circuit
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B41J2/14201—Structure of print heads with piezoelectric elements
    • B41J2/14233—Structure of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/16—Production of nozzles
    • B41J2/1607—Production of print heads with piezoelectric elements
    • B41J2/161—Production of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/16—Production of nozzles
    • B41J2/1621—Manufacturing processes
    • B41J2/1626—Manufacturing processes etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/16—Production of nozzles
    • B41J2/1621—Manufacturing processes
    • B41J2/1631—Manufacturing processes photolithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B41J2/14201—Structure of print heads with piezoelectric elements
    • B41J2/14233—Structure of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm
    • B41J2002/14241—Structure of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm having a cover around the piezoelectric thin film element
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B41J2002/14491—Electrical connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0231—Manufacturing methods of the redistribution layers
    • H01L2224/02313—Subtractive methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0233—Structure of the redistribution layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0233—Structure of the redistribution layers
    • H01L2224/02331—Multilayer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0235—Shape of the redistribution layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0235—Shape of the redistribution layers
    • H01L2224/02351—Shape of the redistribution layers comprising interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0239—Material of the redistribution layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05541—Structure
    • H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05555—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/116—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/1161—Physical or chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/116—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/11618—Manufacturing methods by patterning a pre-deposited material with selective exposure, development and removal of a photosensitive bump material, e.g. of a photosensitive conductive resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/116—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/1162—Manufacturing methods by patterning a pre-deposited material using masks
    • H01L2224/11622—Photolithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13005—Structure
    • H01L2224/13008—Bump connector integrally formed with a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/1319—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/1356—Disposition
    • H01L2224/13562—On the entire exposed surface of the core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/1357—Single coating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/276—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/27618—Manufacturing methods by patterning a pre-deposited material with selective exposure, development and removal of a photosensitive layer material, e.g. of a photosensitive conductive resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/276—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/2762—Manufacturing methods by patterning a pre-deposited material using masks
    • H01L2224/27622—Photolithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/279—Methods of manufacturing layer connectors involving a specific sequence of method steps
    • H01L2224/27901—Methods of manufacturing layer connectors involving a specific sequence of method steps with repetition of the same manufacturing step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29005—Structure
    • H01L2224/29007—Layer connector smaller than the underlying bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29011—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2902—Disposition
    • H01L2224/29024—Disposition the layer connector being disposed on a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29191—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/301—Disposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/301—Disposition
    • H01L2224/3012—Layout
    • H01L2224/3014—Circular array, i.e. array with radial symmetry
    • H01L2224/30143—Circular array, i.e. array with radial symmetry covering only portions of the surface to be connected
    • H01L2224/30145—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32237—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731—Location prior to the connecting process
    • H01L2224/73101—Location prior to the connecting process on the same surface
    • H01L2224/73103—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81139—Guiding structures on the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8114—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/819—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector with the bump connector not providing any mechanical bonding
    • H01L2224/81901—Pressing the bump connector against the bonding areas by means of another connector
    • H01L2224/81903—Pressing the bump connector against the bonding areas by means of another connector by means of a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83466—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83471—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9211—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking
    • H01L2924/35121—Peeling or delaminating

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)

Abstract

本发明提供一种能够在将金或其合金用作配线的结构中进一步提高粘合可靠性的电子装置以及电子装置的制造方法。电子装置(14)具备：驱动基板(压力室基板(29)以及振动板(31))，其形成有压电元件(32)以及该压电元件的驱动所涉及的电极配线(44、45)；密封板(33)，其被接合在该驱动基板上，电极配线以含有金(Au)的配线金属隔着作为基底层的紧贴层(50)而被形成在驱动基板上的方式被形成，并具有去除部(49)，该去除部(49)将包括与接合树脂43接合的部分在内的区域中的配线金属的一部分去除而使紧贴层露出。

Description

电子装置以及电子装置的制造方法
技术领域
本发明涉及一种在形成有驱动元件以及该驱动元件的驱动所涉及的配线的驱动基板上接合有层压体的电子装置以及电子装置的制造方法。
背景技术
电子装置为具备通过电压的施加而发生变形的压电元件等驱动元件的装置，并被应用于各种装置或传感器等中。例如，在液体喷射装置中，从利用了电子装置的液体喷射头喷射各种液体。虽然作为该液体喷射装置而存在例如喷墨式打印机或喷墨式绘图机等图像记录装置，但最近产生了能够使极少量的液体准确地喷落在预定位置处的特长从而也被应用于各种制造装置中。例如，被应用于对液晶显示器等的滤色器进行制造的显示器制造装置、形成有机EL(Electro Luminescence，电致发光)显示器或FED(面发光显示器)等的电极的电极形成装置、对生物芯片(生物化学元件)进行制造的芯片制造装置中。而且，在图像记录装置用的记录头中喷射液状的油墨，在显示器制造装置用的颜色材料喷射头中喷射R(Red，红色)、G(Green，绿色)、B(Blue，蓝色)各种颜色材料的溶液。此外，在电极形成装置用的电极材料喷射头中喷射液状的电极材料，在芯片制造装置用的生物体有机物喷射头中喷射生物体有机物的溶液。
上述的液体喷射头具备层压有流道基板、压电元件(驱动元件的一种)、密封板(或者也称为保护基板)等的电子装置，其中，所述流道基板形成有与喷嘴连通的压力室，所述压电元件使压力室内的液体产生压力变动，所述密封板以与该压电元件隔开间隔的方式而被配置。近年来，也开发了一种将压电元件等致动器的驱动所涉及的驱动电路设置在密封板上的技术。而且，提出了如下的技术，即，这样的基板在彼此之间隔有空间的状态下通过由感光性树脂形成的粘合剂(粘合树脂)而被接合在一起。除此之外，在各种传感器等的MEMS(Micro Electro Mechanical Systems，微机电系统)中的半导体封装件中，为了应对配线的高密度化或小型化而采用了使基板彼此之间通过感光性树脂而被层压在一起的结构。此外，由于在这种的MEMS中，除了要求封装件的小型化以外，还要求高精度化或低耗电化等，因此对于驱动电路的驱动所涉及的配线，优选采用电阻更低且延性优异的金(Au)作为材料。例如，在专利文献1所公开的喷墨式打印机中，金被用作作为驱动元件的压电元件的驱动所涉及的配线。而且，密封板通过粘合剂而被接合在形成有压电元件或配线等的基板上。
但是，在通过粘合剂而将基板彼此接合的结构中采用金作为配线的情况下，存在有在该配线部分处粘合剂的粘合强度减弱从而容易发生剥离的问题。关于这一点，上述专利文献1的结构中，通过在配线以外的部分处获得粘合剂的有效的粘合面积从而确保了粘合强度。然而，如果配线部分处的接合强度较弱，则接合可靠性并不充分，尤其是在基板上配线被高密度化而占有较多的面积的结构中，无法获得充分的粘合强度。
专利文献1：日本特开2014-34114号公报
发明内容
本发明为鉴于这样的情况而完成的发明，其目的在于，提供一种能够在将金或其合金用作配线的结构中进一步提高粘合可靠性的电子装置以及电子装置的制造方法。
方式1
本发明的电子装置是为了达成上述目的而被提出的发明，其特征在于，具备：驱动基板，其设置有驱动元件以及该驱动元件的驱动所涉及的配线；层压体，其以隔着所述驱动元件、所述配线以及接合树脂而与所述驱动基板隔开间隔的方式被设置，所述配线以含有金(Au)的配线金属隔着基底层而被形成在所述驱动基板上的方式被形成，在通过去除所述配线金属的一部分而露出的所述基底层的一部分中，所露出的所述基底层具有被所述接合树脂覆盖的部分和未被所述接合树脂覆盖的部分。
根据方式1的结构，由于接合树脂被接合在通过去除含有与接合树脂粘合的粘合性较差的Au的配线金属而露出的基底层上，从而能够使驱动基板与层压体的接合强度更加牢固，由此能够提高粘合可靠性。尤其在由以Au为主的配线金属构成的配线以更高的密度被形成的结构中，本发明为优选。
方式2
此外，在方式1的结构中，优选为采用如下的结构，即，配线金属去除区域在俯视观察时被所述配线金属包围，所述配线金属去除区域为，由被所述接合树脂覆盖的部分和未被所述接合树脂覆盖的部分构成的所述基底层的一部分。
根据方式2的结构，由于配线金属去除区域在俯视观察时被配线金属包围，从而抑制了该部分中的电阻上升，由此能够确保导通。
方式3
此外，在方式1或方式2的结构中，优选为采用如下的结构，即，所述配线金属去除区域的在配线方向上的尺寸大于所述接合树脂与该基底层相接合的部分的在所述配线方向上的宽度。
根据方式3的结构，通过将配线金属去除区域的在配线方向上的尺寸设定为大于接合树脂与基底层相接合的部分的在配线方向上的宽度，从而能够使接合树脂与基底层的接合更加可靠。
方式4
此外，关于上述方式1至方式3中的任意一个结构，优选为采用如下的结构，即，所述配线金属去除区域通过具有与所述接合树脂化学键合的官能团的有机分子而被实施表面处理。
根据方式4的结构，通过对配线金属去除区域进行表面处理，从而该部分处的每单位面积的结合部位增加，从而能够进一步增加相对于接合树脂的粘合强度。
方式5
此外，关于上述方式1至方式4中的任意一个结构，能够采用如下的结构，即，所述接合树脂具有环氧基，所述有机分子具有氨基。
方式6
此外，关于上述方式1至方式5中的任意一个结构，优选为采用如下的结构，即，所述基底层为与Au不同的金属。
根据方式6的结构，如果基底层为与Au不同的金属，则除了能够确保与接合树脂接合的接合强度以外，还作为配线材料而发挥功能，因此能够确保导电性并将电阻抑制为较低。
方式7
而且，本发明的电子装置的制造方法的特征在于，所述电子装置具备驱动基板和层压体，其中，所述驱动基板形成有驱动元件以及该驱动元件的驱动所涉及的配线，所述层压体以隔着所述驱动元件、所述配线以及接合树脂而与所述驱动基板隔开间隔的方式被接合，所述电子装置的制造方法包括：在所述驱动基板上形成基底层的工序；以在重叠在所述基底层上的方式形成含有金(Au)的配线金属从而形成配线的工序；将所述配线金属的一部分去除而使所述基底层露出的工序；在所述驱动基板与所述层压体之间夹着所述接合树脂，并且该接合树脂被粘合于所述基底层所露出的部分上的状态下，对所述驱动基板与所述层压体进行接合的工序。
附图说明
图1为对打印机的结构进行说明的立体图。
图2为对记录头的结构进行说明的剖视图。
图3为对电子装置的主要部分进行了放大的剖视图。
图4为驱动基板的俯视图。
图5为配线的主要部分放大图。
图6为对电子装置的制造工序进行说明的模式图。
图7为对电子装置的制造工序进行说明的模式图。
图8为对第二实施方式中的电子装置的制造工序进行说明的模式图。
图9为对第二实施方式中的电子装置的制造工序进行说明的模式图。
具体实施方式
以下，参照附图对用于实施本发明的方式进行说明。另外，虽然在以下所叙述的实施方式中，作为本发明的优选的具体示例而作出了各种限定，但只要在以下的说明中没有旨在特别地对本发明进行限定的记载，则本发明的范围并不限定于这些方式。此外，在以下，列举作为液体喷射装置的一种的喷墨式打印机(以下，称之为打印机)为例而进行说明，所述喷墨式打印机搭载了作为具备本发明所涉及的电子装置的液体喷射头的一种的喷墨式记录头(以下，称之为记录头)。
参照图1对打印机1的结构进行说明。打印机1为，为向记录纸等记录介质2的表面喷射(喷出)油墨(液体的一种)从而实施图像等的记录的装置。该打印机1具备：记录头3；安装有该记录头3的滑架4；使滑架4在主扫描方向上移动的滑架移动机构；在副扫描方向上移送记录介质2的输送机构6等。在此，上述的油墨被贮留在作为液体供给源的墨盒7中。该墨盒7以能够拆装的方式而被安装于记录头3上。另外，也能够采用如下结构，即，墨盒被配置在打印机的主体侧，并从该墨盒通过油墨供给管而向记录头供给油墨。
上述的滑架移动机构5具备同步带8。而且，该同步带8通过DC电机等脉冲电机9而被驱动。因此，当脉冲电机9工作时，滑架4通过架设在打印机1上的导向杆10而被引导，从而在主扫描方向(记录介质2的宽度方向)上往返移动。滑架4的主扫描方向上的位置通过未图示的线性编码器而被检测。线性编码器将其检测信号即编码脉冲向打印机1的控制部发送。
此外，在滑架4的移动范围内的与记录区域相比靠外侧的端部区域内，设定有作为滑架4的扫描的基点的初始位置。在该初始位置处，从端部侧起依次配置有对形成于记录头3的喷嘴面(喷嘴板21)上的喷嘴22进行密封的盖11以及用于对喷嘴面进行擦拭的擦拭单元12。
接下来对记录头3进行说明。图2为对记录头3的结构进行说明的剖视图。图3为图2中的区域A的放大图，并且为将被安装在记录头3中的电子装置14的主要部分进行了放大的剖视图。此外，图4为对记录头3的结构进行说明的俯视图，且主要图示了振动板31的上表面(与密封板33接合的接合面)的结构。并且，图5为图4中的区域B的放大俯视图。如图2所示，本实施方式中的记录头3中，电子装置14以及流道单元15以被层压的状态而被安装在头外壳16上。另外，为了便于说明，将各部件的层压方向设为上下方向而进行说明。
头外壳16为合成树脂制的箱体状部件，在其内部形成有向各压力室30供给油墨的第一贮液器18。该第一贮液器18为被并排设置的多个压力室30所共用的对油墨进行贮留的空间，并沿着喷嘴列方向而形成。另外，在头外壳16的上方形成有将来自墨盒7侧的油墨向第一贮液器18导入的油墨导入通道(未图示)。此外，在头外壳16的下表面侧形成有从该下表面起以长方体形状凹陷至头外壳16的高度方向上的中途的收纳空间17。采用如下的结构，当后文所述的流道单元15以被定位的状态而被接合于头外壳16的下表面上时，层压在流道基板28上的电子装置14(压力室基板29、振动板31、密封板33等)将被收纳于收纳空间17内。
接合于头外壳16的下表面上的流道单元15具有流道基板28以及喷嘴板21。本实施方式中的流道基板28由单晶硅基板制作而成。如图2所示，在该流道基板28上，通过蚀刻而形成有第二贮液器25和独立连通通道26，其中，第二贮液器25由各压力室30所共用，并与第一贮液器18连通且对油墨进行贮留，独立连通通道26经由该第二贮液器25而将来自第一贮液器18的油墨向各压力室30单独地供给。第二贮液器25为沿着喷嘴列方向(压力室30的并排设置方向)的长条的空间部。独立连通通道26对应于各压力室30而沿着该压力室30的并排设置方向形成有多个。该独立连通通道26在流道基板28与压力室基板29接合在一起的状态下，与所对应的压力室30的长边方向上的一侧的端部连通。
此外，在流道基板28的对应于各喷嘴22的位置处，形成有贯穿流道基板28的板厚方向的喷嘴连通通道27。即，喷嘴连通通道27对应于喷嘴列而沿着该喷嘴列方向形成有多个。压力室30与喷嘴22经由该喷嘴连通通道27而连通。本实施方式中的喷嘴连通通道27与所对应的压力室30的长边方向上的另一侧(与独立连通通道26相反的一侧)的端部连通。
喷嘴板21为与流道基板28的下表面(与电子装置14侧相反的一侧的面)接合的硅制或者不锈钢等金属制的基板。多个喷嘴22以列状而被开口设置在该喷嘴板21上。该成列设置的多个喷嘴22(喷嘴列)从一端侧的喷嘴22到另一端侧的喷嘴22，以对应于点形成密度的间距，沿着与主扫描方向正交的副扫描方向而设置。在本实施方式中，在喷嘴板21上并排设置有两列喷嘴列。
本实施方式的电子装置14为，作为使各压力室30内的油墨产生压力变动的致动器而发挥功能的对薄板状的结构部件进行层压而形成的装置。如图2以及图3所示，该电子装置14通过对压力室基板29、振动板31、压电元件32以及密封板33进行层压从而被单元化。另外，电子装置14被形成为与收纳空间17相比较小，以便能够收纳在收纳空间17内。
本实施方式的压力室基板29由单晶硅基板制作而成。在该压力室基板29上，通过蚀刻而使一部分在板厚方向上被完全去除，从而形成应当成为压力室30的空间。该空间即压力室30对应于各喷嘴22而并排设置有多个。各压力室30为，以与喷嘴列方向正交的方向为长边方向的空间部，并且长边方向上的一侧的端部与独立连通通道26连通，另一侧的端部与喷嘴连通通道27连通。
振动板31为具有弹性的薄膜状的部件，并被层压在压力室基板29的上表面(与流道基板28侧相反的一侧的面)上。通过该振动板31而使应当成为压力室30的空间的上部开口被密封。换言之，通过振动板31而划分出压力室30。该振动板31中的对应于压力室30(详细而言为压力室30的上部开口)的部分作为随着压电元件32的挠曲变形而向远离或者接近喷嘴的方向进行位移的位移部而发挥功能。即，振动板31中的对应于压力室30的上部开口的区域成为容许挠曲变形的驱动区域。另一方面，振动板31中的从压力室30的上部开口偏离出的区域为挠曲变形被妨碍的非驱动区域。
上述振动板31例如由弹性膜与绝缘体膜形成，所述弹性膜被形成于压力室基板29的上表面上并由二氧化硅(SiO2)构成，所述绝缘体膜被形成在该弹性膜上并由氧化锆(ZrO2)构成。而且，在该绝缘膜上(振动板31的与压力室基板29侧相反的一侧的面)的对应于各压力室30的区域、即驱动区域上分别层压有压电元件32。另外，压力室基板29以及层压于其上的振动板31相当于本发明的驱动基板。此外，振动板31中层压有压电元件32的面为与密封板33接合的接合面。
本实施方式的压电元件32为所谓的挠曲振动模式的压电元件。如图3所示，该压电元件32例如在振动板31上依次层压有下电极层37、压电体层38以及上电极层39。在本实施方式中，上电极层39作为相对于每个压电元件32而独立的电极发挥功能，下电极层37作为各压电元件32共用的电极而发挥功能。当向下电极层37与上电极层39之间施加与两电极的电位差相对应的电场时，以这种方式被构成的压电元件32将向远离或者接近喷嘴22的方向发生挠曲变形。压电元件32对应于各喷嘴22而沿着喷嘴列方向并排设置有多个，如图4所示，两个压电元件组对应于两列喷嘴列而以将后文叙述的共用电极膜36夹在彼此之间的方式分别被形成在振动板31上。
作为上电极层39以及下电极层37，使用铱(Ir)、铂(Pt)、钛(Ti)、钨(W)、钽(Ta)、钼(Mo)等各种金属或它们的合金等。此外，作为压电体层38，使用锆钛酸铅(PZT)等铁电性压电性材料或者向其中添加了铌、镍、镁、铋或者钇等金属的驰豫型铁电体等。另外，也可以使用钛酸钡等非铅材料。
如图3所示，上电极层39的另一侧(图3中的左侧，或者图4中的与共用电极膜36侧相反的一侧)的端部越过压力室30的上部开口边缘而延伸至与非驱动区域对应的振动板31上。在该上电极层39之上，隔着紧贴层50(相当于本发明中的基底层)而层压有独立电极配线44(相当于本发明中的配线)。独立电极配线44以及紧贴层50对应于每个作为独立电极的上电极层39而被图案形成，并与各自对应的上电极层39导通。此外，如图4所示，下电极层37的一侧(图4中的共用电极膜36侧)的端部也同样地从驱动区域越过压力室30的上部开口边缘而延伸到与层压有上电极层39的非驱动区域的相反侧的非驱动区域对应的振动板31上。在该延伸的下电极层37之上，也隔着紧贴层50而层压有共用电极配线45(相当于本发明中的配线)。在振动板31中，在作为由压电元件组所夹持的区域的中央部分处，形成有作为共用电极的端子而发挥功能的共用电极膜36，共用电极配线45与该共用电极膜36导通。
作为上述独立电极配线44以及共用电极配线45的材料(本发明中的配线金属)，使用金(Au)或Au的合金。此外，作为紧贴层50，使用金以外的金属，例如，钛、镍、铬及它们的合金(不含有Au)等。本实施方式中的紧贴层50由镍铬(NiCr)合金制作而成。而且，紧贴层50也具有导电性，从而作为配线材料的一部分而发挥功能。而且，这些独立电极配线44以及共用电极配线45分别与所对应的凸块电极40电接合。对于该凸块电极40将在后文中进行叙述。
密封板33(相当于本发明中的层压体)为被形成为平板状的硅制的板材。如图3所示，在该密封板33的与压电元件32对置的区域中形成有各压电元件32的驱动所涉及的驱动电路46。驱动电路46利用半导体工艺(即，成膜工序、光刻工序以及蚀刻工序等)而被形成在成为密封板33的单晶硅基板的表面上。此外，与该驱动电路46连接的配线层47以露出于密封板33中的振动板31侧的表面、即与振动板31接合的接合面的状态，隔着紧贴层48而被形成在密封板33的压电元件32侧的面中的驱动电路46上。配线层47与上述驱动基板侧的电极配线44、45同样地由Au构成，并被引绕至与驱动电路46相比靠外侧且与延伸至非驱动区域内的下电极层37以及上电极层39对应的位置处。紧贴层48与上述紧贴层50同样地为由NiCr等金以外的金属构成的基底层。另外，虽然在图3中为了方便，配线层47被表示为一体，但其包括多个配线。具体而言，压电元件32的独立电极配线44(上电极层39)用的配线层47与各压电元件32的共用电极配线45(下电极层37)用的配线层47隔着紧贴层50而被图案形成在密封板33的表面上。各配线层47与驱动电路46内的对应的配线端子电连接。
由层压有振动板31以及压电元件32的压力室基板29形成的驱动基板与设置有压电元件32的驱动所涉及的驱动电路的密封板33以使凸块电极40介于它们之间的方式，通过接合树脂43而被接合。该接合树脂43具有作为确保基板彼此之间的间隔的隔板的功能、作为对基板彼此间的收纳压电元件32等的收纳空间45进行密封的密封材料的功能以及作为对基板彼此进行接合的粘合剂的功能。作为接合树脂43，例如优选使用以环氧树脂、丙烯树脂、酚醛树脂、聚酰亚胺树脂、硅酮树脂、苯乙烯树脂等为主要成分并含有光聚合引发剂等的树脂，在本实施方式中，采用了将环氧树脂作为主要成分的树脂。在本实施方式中，如图4所示，形成有第一接合树脂43a和第二接合树脂43b，其中，第一接合树脂43a在俯视观察时沿着振动板31以及密封板33的外周缘而被形成为框状，第二接合树脂43b在与该第一接合树脂43a相比靠内侧处，被形成为包围压电元件组的框状。通过该被形成为双重的接合树脂43a、43b而使振动板31与密封板33被分隔。振动板31与密封板33的间隙被设定为不会阻碍压电元件32的应变变形的程度。而且，在第二接合树脂43b的内侧的区域且在压电元件32的驱动区域与共用电极膜36之间的共用电极配线45上形成有第三接合树脂43c。
凸块电极40为，用于对驱动电路46与各压电元件32的独立电极配线44(上电极层39)以及共用电极配线45(下电极层37)进行连接的电极，并且被配置为能够与非驱动区域上的独立电极配线44以及共用电极膜36分别接触从而电连接。该凸块电极40由沿着压力室的并排设置方向(喷嘴列方向)而延伸的作为突条的内部树脂(树脂核)41和局部地形成在该内部树脂41的表面上的导电膜42构成。内部树脂41例如由聚酰亚胺树脂等具有弹性的树脂形成，并且在密封板33的接合面上，分别被形成在与振动板31的形成有独立电极配线44的非驱动区域对置的区域(图4的左右两侧)内以及与形成有共用电极膜36的中央区域对置的区域内，即，共计3处。此外，导电膜42为配线层47的一部分，并且分别被形成在与独立电极配线44对置的位置处。因此，导电膜42沿着喷嘴列方向而形成有多个。同样地，对应于共用电极膜36的导电膜42沿着喷嘴列方向而形成有多个。
图5为图4中的区域B的放大俯视图。如该图或图4所示，接合树脂43也与独立电极配线44以及共用电极配线45或者密封板33的配线层47接合。然而，由于这些电极配线44、45以及配线层47的表层为Au，因此接合树脂43不易粘合，从而以这种方式无法充分地获得接合树脂43的粘合强度。因此，在本发明所涉及的电子装置14中，如图5所示，对于独立电极配线44以及共用电极配线45，通过将与接合树脂43接合的部分的Au去除而使作为下层的紧贴层50露出，并且将接合树脂43接合在该露出的部分上，从而确保了粘合强度。更具体而言，包括与接合树脂43接合的部分在内且与该部分相比略大的区域内的作为配线金属的Au的一部被去除而使作为基底层的紧贴层50露出的去除部49(相当于本发明中的配线金属去除区域)，分别被形成在电极配线44、45上。同样，在密封板33侧的配线层47上，也形成有与接合树脂43接合的部分的Au被去除而使作为下层的紧贴层48露出的去除部47a(参照图3)。由于配线层47中的去除部47a与电极配线44、45中的去除部49为相同的结构，因此在下文中，主要对电极配线44、45侧的去除部49进行说明。
本实施方式中的去除部49为，通过蚀刻而以在俯视观察时呈椭圆形状的方式将Au挖除(保留周围而将中间挖掉)的部分。该去除部49的在配线方向(配线延伸方向)上的尺寸(长径)L1长于在去除部49中接合树脂43与紧贴层50相接合的部分的宽度L2。即，在去除部49中露出的紧贴层50具有被接合树脂43覆盖的部分和未被接合树脂43覆盖的部分。由此，能够更可靠地确保接合树脂43与紧贴层50的接合区域。此外，去除部49的在配线宽度方向上的尺寸(短径)W1短于电极配线44、45的宽度W2。因此，去除部49被Au包围。换言之，电极配线44、45在形成有去除部49的部分处未被切断而是连续的。由此，抑制了该部分处的电阻显著上升的情况，从而能够确保导通。另外，关于去除部49的形状，并不限定于椭圆状，也可以为矩形形状等。
接下来，对电子装置14的制造工序，尤其是对层压有压电元件32以及振动板31的作为驱动基板的压力室基板29与作为层压体的密封板33的接合工序进行说明。另外，本实施方式中的电子装置14通过如下方式而获得，即，在将形成有多个作为密封板33的区域的单晶硅基板与形成有多个层压有振动板31以及压电元件32并成为压力室基板29的区域的单晶硅基板接合在一起之后，进行切断从而分片化的方式。
图6以及图7为对电子装置14的制造工序进行说明的模式图，并且图示了被接合在独立电极配线44上的凸块电极40以及接合树脂43的附近的结构。首先，相对于压力室基板29，在表面(与密封板33接合的接合面)上层压振动板31，并在其上依次层压以及图案形成下电极层37、压电体层38以及上电极层39等，从而形成压电元件32。
在此，在如图6(a)所示那样，上电极层39及下电极层37被形成在非驱动区域上的状态下，如图6(b)所示，依次对紧贴层50(NiCr层)以及电极配线44、45的配线金属(Au层)进行成膜。接下来，紧贴层50及电极配线44、45被图案形成为预定的形状。在该图案形成时，去除部49被形成。具体而言，经由抗蚀剂的涂布、利用掩膜的曝光以及显影，从而如图6(c)所示，在电极配线44、45的Au层上形成抗蚀层51。在该抗蚀层51上，在与去除部49对应的部分处形成有开口52。然后，通过利用例如含有碘化钾的溶液(或者王水类溶液或NaCN类溶液)等蚀刻溶液对电极配线44、45的Au层实施湿式蚀刻，并利用例如含有硝酸铈铵的蚀刻溶液对紧贴层50实施湿式蚀刻，从而对电极配线44、45以及紧贴层50进行图案形成。由此，如图6(d)所示，与去除部49对应的部分的Au层被去除而使紧贴层50露出。
接下来，通过具有官能团的有机分子而对露出于该去除部49中的紧贴层50实施表面处理。由于本实施方式中的接合树脂43具有环氧基，因此在表面处理中，使用作为具有与该接合树脂43化学键合的官能团的有机分子的、具有氨基的硅烷偶联剂。具体而言，例如，通过在形成了去除部49的阶段，使单晶硅基板在溶解有上述硅烷偶联剂的处理用溶液中浸泡了预定的时间之后，进行干燥从而实施处理。在该情况下，包括露出于去除部49中的紧贴层50在内，驱动基板的整个表面被实施处理。此外，例如也可以采用如下的方法，即，在露出于去除部49中的紧贴层50中配置羟基，相对于此，使用CVD法而使硅烷偶联剂进行键合反应的方法。通过以这种方式实施表面处理，从而使该部分中的每单位面积的结合部位增加，从而能够进一步增加相对于接合树脂43的粘合强度。此外，相应地，也能够缩小紧贴层50的在与配线方向交叉的方向上的尺寸W1，从而还能够对由于形成去除部49而导致的配线电阻的增加进行抑制。
经由以上的工序，在单晶硅基板上形成有多个成为驱动基板的区域。另一方面，在密封板33侧的单晶硅基板上，首先通过半导体工艺而在与振动板31接合的接合面上形成驱动电路46。在形成了驱动电路46之后，在密封板33的接合面上形成凸块电极40的内部树脂41。具体而言，在将作为材料的树脂(例如聚酰亚胺树脂)以预定的厚度进行了涂布之后，经由预焙处理、光刻处理以及蚀刻处理而将呈突条的内部树脂41图案形成在预定的位置处。在形成了内部树脂41之后，在对成为紧贴层48、配线层47以及凸块电极40的导电膜42的金属进行了制膜之后，通过光刻工序以及蚀刻工序而形成紧贴层48、配线层47以及导电膜42。由此，在单晶硅基板上形成有多个作为密封板33的区域。此外，与电极配线44、45的去除部49同样地，在配线层47上也形成去除部47a，且被设为紧贴层48露出于该部分的状态。
接下来，移至驱动基板(压力室基板29以及振动板31)侧的单晶硅基板与密封板33侧的单晶硅基板的接合工序。在被层压在压力室基板29上的振动板31的表面(密封板33侧的接合面)或者密封板33的表面(振动板31侧的接合面)中的任意一方的接合面上，涂布接合树脂43(感光性树脂涂布工序)。在本实施方式中，如图6(e)所示，感光性树脂49以覆盖电极配线44、45和压电元件32等结构体的状态，通过旋涂法而被涂布在驱动基板中的振动板31上。在此，接合树脂43会进入电极配线44、45中的去除部49内，从而也被层压在紧贴层50上。
在涂布了接合树脂43之后，接下来，在隔着预定的图案的掩膜而实施了曝光后，通过加热处理而使该接合树脂43预固化(预固化工序)。或者，也可以在涂布了接合树脂43之后，经过加热处理后再实施曝光。在预固化工序中，接合树脂43的固化度通过曝光时的曝光量或者加热时的加热量来调节。接下来，如图7(a)所示，实施显影从而在预定的位置处将接合树脂43图案形成为预定的形状(图案形成工序)。在接合树脂43被图案形成之后，将两单晶硅基板接合(接合工序)。具体而言，如图7(b)所示，在将两单晶硅基板的相对位置对准的状态下，使任意一方的单晶硅基板朝向另一方的单晶硅基板侧相对地移动，从而以将凸块电极40、压电元件32以及电极配线44、45等结构体以及接合树脂43夹在两单晶硅基板之间的方式而将两单晶硅基板粘在一起。此时，在该状态下，如图7(c)所示，在克服凸块电极40的弹性恢复力的同时从上下方向对两单晶硅基板进行加压。在非驱动区域内的下电极层37以及上电极层39上电连接有凸块电极40的状态下，两基板通过接合树脂43而被接合。此时，与电极配线44、45以及配线层47重叠的接合树脂43分别与去除部47a、49内的紧贴层48、50粘合。
在两单晶硅基板被接合在一起之后，针对于压力室基板29侧的单晶硅基板，经由研磨工序、光刻工序以及蚀刻工序而形成压力室30。最后，沿着单晶硅基板中的预定的切割线而进行切割，从而切断并分割为各个电子装置14。另外，虽然在本实施方式中，例示了在两张单晶硅基板接合后被分片化的结构，但并不限定于此。例如，也可以先对密封板以及流道基板分别进行分片化，然后再将它们接合。
然后，通过上述的过程而制造的电子装置14使用粘合剂等而被定位并固定在流道单元15(流道基板28)上。然后，在将电子装置14收纳于头外壳16的收纳空间部17内的状态下，通过将头外壳16与流道单元15接合，从而制造出上述的记录头3。
如此，由于在电极配线44、45以及配线层47上接合有接合树脂43的部分处，包括该部分在内的区域中的Au被去除，从而接合树脂43分别被接合在露出于这些去除部47a、49中的紧贴层48、50上，因此能够确保接合树脂43对基板彼此的接合强度，从而能够提高粘合可靠性。尤其是在由以Au为主的金属形成的配线以更高的密度被形成在基板上的结构中，本发明为优选。
图8及图9为对本发明的第二实施方式中的电子装置14的制造工序进行说明的模式图。在本实施方式中，直至在电极配线44、45上形成去除部49为止(图8(a)～图8(c))，经由与上述第一实施方式相同的工序，与此相对，如图8(d)所示，在密封板33侧的单晶硅基板上涂布接合树脂43，这一点与上述第一实施方式不同。即，接合树脂43以覆盖配线层47和驱动电路等结构体的状态而被涂布在密封板33的驱动基板侧的面上。此时，接合树脂43会进入配线层47中的去除部47a内，从而也被层压在紧贴层48上。如图8(e)所示，被涂布于密封板33侧的单晶硅基板上的接合树脂43经由曝光、加热以及显影而在预定的位置处被图案形成为预定的形状。在接合树脂43被图案形成之后，如图9(a)所示，在两单晶硅基板的相对位置被对准的状态下而将两单晶硅基板粘在一起。此时，被配置在电极配线44、45上的接合树脂43被粘合于去除部49内的紧贴层50上，从而两基板被接合在一起。在该结构中，也与上述第一实施方式相同，由于接合树脂43分别被接合在露出于去除部47a、49中的紧贴层48、50上，因此能够确保接合树脂43对基板彼此的接合强度，从而能够提高粘合可靠性。另外，由于其他的结构与上述的实施方式相同因而省略说明。
另外，虽然作为与电极配线44、45或配线层47接合的接合树脂43，例示了具有感光性的粘合剂，但并不限定于此，只要为能够对基板彼此(驱动基板与层压体)进行接合的树脂，则能够采用各种树脂。
此外，虽然在以上，作为液体喷射头而例示了被搭载于喷墨式打印机中的喷墨式记录头，但也能够应用于对油墨以外的液体进行喷射的喷射头中。例如，也能够将本发明应用于液晶显示器等的滤色器的制造所使用的颜色材料喷射头、有机EL(ElectroLuminescence，电致发光)显示器、FED(面发光显示器)等的电极形成所使用的电极材料喷射头、生物芯片(生物化学元件)的制造所使用的生物体有机物喷射头等中。
而且，本发明并不限定于作为致动器而被使用在液体喷射头中的电子装置，例如也能够应用于各种传感器等所使用的电子装置等中。
符号说明
1…打印机；3…记录头；14…电子装置；22…喷嘴；29…压力室基板；30…压力室；31…振动板；32…压电元件；33…密封板；36…共用电极膜；37…下电极层，38…压电体层；39…上电极层；40…凸块电极；41…内部树脂；42…导电膜；43…接合树脂；44…独立电极配线；45…共用配线电极；46…驱动电路；47…配线层；47a…去除部；48…紧贴层；49…去除部；50…紧贴层。

Claims (8)

1.一种电子装置，其特征在于，具备：
驱动基板，其设置有驱动元件以及该驱动元件的驱动所涉及的配线；
层压体，其以隔着所述驱动元件、所述配线以及接合树脂而与所述驱动基板隔开间隔的方式被设置，
所述配线以含有金(Au)的配线金属隔着基底层而被形成在所述驱动基板上的方式被形成，
在通过去除所述配线金属的一部分而露出的所述基底层的一部分中，所露出的所述基底层具有被所述接合树脂覆盖的部分和未被所述接合树脂覆盖的部分。
2.如权利要求1所述的电子装置，其特征在于，
配线金属去除区域在俯视观察时被所述配线金属包围，所述配线金属去除区域为，由被所述接合树脂覆盖的部分和未被所述接合树脂覆盖的部分构成的所述基底层的一部分。
3.如权利要求2所述的电子装置，其特征在于，
所述配线金属去除区域的在配线方向上的尺寸大于所述接合树脂与该基底层相接合的部分的在所述配线方向上的宽度。
4.如权利要求2或3所述的电子装置，其特征在于，
所述配线金属去除区域通过具有与所述接合树脂化学键合的官能团的有机分子而被实施表面处理。
5.如权利要求4所述的电子装置，其特征在于，
所述接合树脂具有环氧基，所述有机分子具有氨基。
6.如权利要求1、2、3、5中任一项所述的电子装置，其特征在于，
所述基底层为与Au不同的金属。
7.如权利要求4所述的电子装置，其特征在于，
所述基底层为与Au不同的金属。
8.一种电子装置的制造方法，其特征在于，所述电子装置具备驱动基板和层压体，其中，所述驱动基板形成有驱动元件以及该驱动元件的驱动所涉及的配线，所述层压体以隔着所述驱动元件、所述配线以及接合树脂而与所述驱动基板隔开间隔的方式被接合，
所述电子装置的制造方法包括：
在所述驱动基板上形成基底层的工序；
以重叠在所述基底层上的方式形成含有金(Au)的配线金属从而形成配线的工序；
将所述配线金属的一部分去除而使所述基底层露出的工序；
在所述驱动基板与所述层压体之间夹着所述接合树脂，并且该接合树脂被粘合于所述基底层所露出的部分上的状态下，对所述驱动基板与所述层压体进行接合的工序。
CN201610145036.8A 2015-03-20 2016-03-14 电子装置以及电子装置的制造方法 Active CN105984219B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-057122 2015-03-20
JP2015057122A JP6596860B2 (ja) 2015-03-20 2015-03-20 電子デバイス、および、電子デバイスの製造方法

Publications (2)

Publication Number Publication Date
CN105984219A CN105984219A (zh) 2016-10-05
CN105984219B true CN105984219B (zh) 2017-12-05

Family

ID=56924001

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610145036.8A Active CN105984219B (zh) 2015-03-20 2016-03-14 电子装置以及电子装置的制造方法

Country Status (3)

Country Link
US (1) US9553064B2 (zh)
JP (1) JP6596860B2 (zh)
CN (1) CN105984219B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018057040A1 (en) * 2016-09-26 2018-03-29 Brown Andrew J Semiconductor device and method of making
JP7000770B2 (ja) * 2017-09-26 2022-01-19 ブラザー工業株式会社 液体吐出装置
JP2019134019A (ja) * 2018-01-30 2019-08-08 セイコーエプソン株式会社 発光装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101083297A (zh) * 2006-06-01 2007-12-05 精工爱普生株式会社 压电元件单元制造法、压电元件单元及采用其的液体喷头
CN101274518A (zh) * 2007-03-30 2008-10-01 索尼株式会社 打印头模块,液体释放头,和液体释放装置
US7461451B2 (en) * 2002-04-10 2008-12-09 Sony Corporation Method for manufacturing liquid discharge head

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62292456A (ja) * 1986-06-11 1987-12-19 Nec Corp サ−マルヘツドの製造方法
JPH11179917A (ja) * 1997-12-24 1999-07-06 Canon Inc インクジェット記録ヘッド、その製造方法、及びインクジェット記録ヘッドを備えた記録装置
TW595283B (en) * 2001-04-25 2004-06-21 Benq Corp Flexible circuit board and its manufacturing method
JP4623287B2 (ja) * 2005-03-30 2011-02-02 セイコーエプソン株式会社 液体噴射ヘッド及びその製造方法並びに液体噴射装置
JP2009214522A (ja) * 2008-03-13 2009-09-24 Seiko Epson Corp 液体噴射ヘッド及び液体噴射ヘッドの製造方法並びに液体噴射装置
JP5540623B2 (ja) 2009-09-18 2014-07-02 セイコーエプソン株式会社 基板接合方法
JPWO2012165041A1 (ja) * 2011-05-31 2015-02-23 コニカミノルタ株式会社 インクジェットヘッドおよびそれを備えたインクジェット描画装置
JP2014034114A (ja) 2012-08-07 2014-02-24 Seiko Epson Corp 液体噴射ヘッド、及び、液体噴射装置
JP6179153B2 (ja) * 2013-03-26 2017-08-16 セイコーエプソン株式会社 液体噴射ヘッド、及び、液体噴射装置
JP6163983B2 (ja) * 2013-09-04 2017-07-19 株式会社リコー 液体吐出ヘッド及び画像形成装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7461451B2 (en) * 2002-04-10 2008-12-09 Sony Corporation Method for manufacturing liquid discharge head
CN101083297A (zh) * 2006-06-01 2007-12-05 精工爱普生株式会社 压电元件单元制造法、压电元件单元及采用其的液体喷头
CN101274518A (zh) * 2007-03-30 2008-10-01 索尼株式会社 打印头模块,液体释放头,和液体释放装置

Also Published As

Publication number Publication date
JP2016175273A (ja) 2016-10-06
US9553064B2 (en) 2017-01-24
JP6596860B2 (ja) 2019-10-30
US20160276300A1 (en) 2016-09-22
CN105984219A (zh) 2016-10-05

Similar Documents

Publication Publication Date Title
CN105966069B (zh) 液体喷射头以及液体喷射头的制造方法
CN107405918B (zh) 液体喷射头以及液体喷射头的制造方法
CN105984218B (zh) 电子装置
CN107310272B (zh) Mems器件、液体喷射头以及液体喷射装置
CN105984225B (zh) 电子装置以及电子装置的制造方法
CN110114221A (zh) Mems装置、液体喷射头、液体喷射装置、mems装置的制造方法、液体喷射头的制造方法、以及液体喷射装置的制造方法
CN105984219B (zh) 电子装置以及电子装置的制造方法
CN108656748A (zh) 压电器件、mems器件、液体喷射头以及液体喷射装置
CN107538914A (zh) Mems器件及其制造方法、液体喷射头及其制造方法
CN105936183B (zh) 电子装置以及电子装置的制造方法
CN106466966A (zh) 接合结构体及其制造方法、压电装置、液体喷射头
US10328697B2 (en) Electronic device
CN107020819A (zh) Mems装置以及液体喷射头
CN107856416A (zh) 液体喷射头、液体喷射装置以及液体喷射头的制造方法
CN107878028A (zh) Mems 装置、液体喷射头、液体喷射装置及 mems 装置的制造方法
CN107428166B (zh) 喷墨头和喷墨打印机
CN109304936A (zh) 微机电系统器件的制造方法以及微机电系统器件
JP6569359B2 (ja) 電子デバイス、液体噴射ヘッド、および、電子デバイスの製造方法
CN107032285A (zh) Mems器件、液体喷射头以及液体喷射装置
CN107405920B (zh) 喷墨头和喷墨打印机
CN107791688A (zh) 接合结构体及其制造方法、液体喷射头、液体喷射装置
EP3261845B1 (en) Electronic device
JP6358068B2 (ja) 圧電デバイス、液体噴射ヘッド、圧電デバイスの製造方法、及び、液体噴射ヘッドの製造方法
CN105984224A (zh) 电子装置以及电子装置的制造方法
CN107856415B (zh) Mems器件、液体喷射头以及液体喷射装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant